^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ALSA driver for ICEnsemble ICE1712 (Envy24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * AK4524 / AK4528 / AK4529 / AK4355 / AK4381 interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "ice1712.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MODULE_DESCRIPTION("ICEnsemble ICE17xx <-> AK4xxx AD/DA chip interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void snd_ice1712_akm4xxx_lock(struct snd_akm4xxx *ak, int chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) struct snd_ice1712 *ice = ak->private_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) snd_ice1712_save_gpio_status(ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void snd_ice1712_akm4xxx_unlock(struct snd_akm4xxx *ak, int chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct snd_ice1712 *ice = ak->private_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) snd_ice1712_restore_gpio_status(ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * write AK4xxx register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static void snd_ice1712_akm4xxx_write(struct snd_akm4xxx *ak, int chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned char addr, unsigned char data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int addrdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct snd_ice1712 *ice = ak->private_data[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) if (snd_BUG_ON(chip < 0 || chip >= 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) tmp = snd_ice1712_gpio_read(ice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) tmp |= priv->add_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) tmp &= ~priv->mask_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (priv->cs_mask == priv->cs_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (priv->cif) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) tmp |= priv->cs_mask; /* start without chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) tmp &= ~priv->cs_mask; /* chip select low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* doesn't handle cf=1 yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) tmp &= ~priv->cs_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) tmp |= priv->cs_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* build I2C address + data byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) addrdata = (priv->caddr << 6) | 0x20 | (addr & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) addrdata = (addrdata << 8) | data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) for (idx = 15; idx >= 0; idx--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* drop clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) tmp &= ~priv->clk_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* set data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (addrdata & (1 << idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) tmp |= priv->data_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) tmp &= ~priv->data_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* raise clock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tmp |= priv->clk_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (priv->cs_mask == priv->cs_addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (priv->cif) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* assert a cs pulse to trigger */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) tmp &= ~priv->cs_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) tmp |= priv->cs_mask; /* chip select high to trigger */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) tmp &= ~priv->cs_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) tmp |= priv->cs_none; /* deselect address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) snd_ice1712_gpio_write(ice, tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * initialize the struct snd_akm4xxx record with the template
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int snd_ice1712_akm4xxx_init(struct snd_akm4xxx *ak, const struct snd_akm4xxx *temp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) const struct snd_ak4xxx_private *_priv, struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct snd_ak4xxx_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) if (_priv != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) priv = kmalloc(sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (priv == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) *priv = *_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) priv = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *ak = *temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ak->card = ice->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) ak->private_value[0] = (unsigned long)priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ak->private_data[0] = ice;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (ak->ops.lock == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ak->ops.lock = snd_ice1712_akm4xxx_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (ak->ops.unlock == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ak->ops.unlock = snd_ice1712_akm4xxx_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (ak->ops.write == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ak->ops.write = snd_ice1712_akm4xxx_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) snd_akm4xxx_init(ak);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) void snd_ice1712_akm4xxx_free(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned int akidx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (ice->akm == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) for (akidx = 0; akidx < ice->akm_codecs; akidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct snd_akm4xxx *ak = &ice->akm[akidx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) kfree((void*)ak->private_value[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) kfree(ice->akm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * build AK4xxx controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int snd_ice1712_akm4xxx_build_controls(struct snd_ice1712 *ice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned int akidx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) for (akidx = 0; akidx < ice->akm_codecs; akidx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct snd_akm4xxx *ak = &ice->akm[akidx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) err = snd_akm4xxx_build_controls(ak);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) EXPORT_SYMBOL(snd_ice1712_akm4xxx_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) EXPORT_SYMBOL(snd_ice1712_akm4xxx_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) EXPORT_SYMBOL(snd_ice1712_akm4xxx_build_controls);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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