^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Universal Interface for Intel High Definition Audio Codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * HD audio interface patch for SigmaTel STAC92xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2005 Embedded Alley Solutions, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Matt Porter <mporter@embeddedalley.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Based on patch_cmedia.c and patch_realtek.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/dmi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/jack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <sound/hda_codec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "hda_local.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "hda_auto_parser.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "hda_beep.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "hda_jack.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "hda_generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) STAC_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) STAC_9200_OQO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) STAC_9200_DELL_D21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) STAC_9200_DELL_D22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) STAC_9200_DELL_D23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) STAC_9200_DELL_M21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) STAC_9200_DELL_M22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) STAC_9200_DELL_M23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) STAC_9200_DELL_M24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) STAC_9200_DELL_M25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) STAC_9200_DELL_M26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) STAC_9200_DELL_M27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) STAC_9200_M4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) STAC_9200_M4_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) STAC_9200_PANASONIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) STAC_9200_EAPD_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) STAC_9200_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) STAC_9205_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) STAC_9205_DELL_M42,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) STAC_9205_DELL_M43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) STAC_9205_DELL_M44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) STAC_9205_EAPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) STAC_9205_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) STAC_92HD73XX_NO_JD, /* no jack-detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) STAC_92HD73XX_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) STAC_92HD73XX_INTEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) STAC_DELL_M6_AMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) STAC_DELL_M6_DMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) STAC_DELL_M6_BOTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) STAC_DELL_EQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) STAC_ALIENWARE_M17X,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) STAC_ELO_VUPOINT_15MX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) STAC_92HD89XX_HP_FRONT_JACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) STAC_92HD73XX_ASUS_MOBO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) STAC_92HD73XX_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) STAC_92HD83XXX_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) STAC_92HD83XXX_PWR_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) STAC_DELL_S14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) STAC_DELL_VOSTRO_3500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) STAC_92HD83XXX_HP_cNB11_INTQUAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) STAC_HP_DV7_4000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) STAC_HP_ZEPHYR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) STAC_92HD83XXX_HP_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) STAC_92HD83XXX_HP_INV_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) STAC_92HD83XXX_HP_MIC_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) STAC_HP_LED_GPIO10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) STAC_92HD83XXX_HEADSET_JACK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) STAC_HP_ENVY_BASS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) STAC_HP_BNB13_EQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) STAC_HP_ENVY_TS_BASS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) STAC_HP_ENVY_TS_DAC_BIND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) STAC_92HD83XXX_GPIO10_EAPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) STAC_92HD83XXX_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) STAC_92HD71BXX_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) STAC_DELL_M4_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) STAC_DELL_M4_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) STAC_DELL_M4_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) STAC_HP_M4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) STAC_HP_DV4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) STAC_HP_DV5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) STAC_HP_HDX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) STAC_92HD71BXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) STAC_92HD71BXX_NO_DMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) STAC_92HD71BXX_NO_SMUX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) STAC_92HD71BXX_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) STAC_92HD95_HP_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) STAC_92HD95_HP_BASS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) STAC_92HD95_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) STAC_925x_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) STAC_M1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) STAC_M1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) STAC_M2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) STAC_M2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) STAC_M3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) STAC_M5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) STAC_M6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) STAC_925x_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) STAC_D945_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) STAC_D945GTP3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) STAC_D945GTP5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) STAC_INTEL_MAC_V1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) STAC_INTEL_MAC_V2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) STAC_INTEL_MAC_V3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) STAC_INTEL_MAC_V4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) STAC_INTEL_MAC_V5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) STAC_INTEL_MAC_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) STAC_ECS_202,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) STAC_922X_DELL_D81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) STAC_922X_DELL_D82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) STAC_922X_DELL_M81,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) STAC_922X_DELL_M82,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) STAC_922X_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) STAC_D965_REF_NO_JD, /* no jack-detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) STAC_D965_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) STAC_D965_3ST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) STAC_D965_5ST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) STAC_D965_5ST_NO_FP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) STAC_D965_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) STAC_DELL_3ST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) STAC_DELL_BIOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) STAC_NEMO_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) STAC_DELL_BIOS_AMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) STAC_DELL_BIOS_SPDIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) STAC_927X_DELL_DMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) STAC_927X_VOLKNOB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) STAC_927X_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) STAC_9872_VAIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) STAC_9872_MODELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct sigmatel_spec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct hda_gen_spec gen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned int eapd_switch: 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) unsigned int linear_tone_beep:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned int volknob_init:1; /* special volume-knob initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) unsigned int powerdown_adcs:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) unsigned int have_spdif_mux:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* gpio lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned int eapd_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned int gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) unsigned int gpio_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned int gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) unsigned int gpio_mute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned int gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned int gpio_led_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned int vref_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) int default_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int mic_enabled; /* current mic mute state (bitmask) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /* stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned int stream_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* analog loopback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) const struct snd_kcontrol_new *aloopback_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) unsigned int aloopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) unsigned char aloopback_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) unsigned char aloopback_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* power management */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) unsigned int power_map_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) unsigned int num_pwrs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) const hda_nid_t *pwr_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) unsigned int active_adcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* beep widgets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) hda_nid_t anabeep_nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* SPDIF-out mux */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) const char * const *spdif_labels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) struct hda_input_mux spdif_mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) unsigned int cur_smux[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define AC_VERB_IDT_GET_POWER_MAP 0xfec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x0f, 0x10, 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0x0f, 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 0x0a, 0x0d, 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * PCM hooks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) msleep(spec->stream_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) int i, idx = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (!spec->powerdown_adcs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) for (i = 0; i < spec->gen.num_all_adcs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (spec->gen.all_adcs[i] == hinfo->nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) idx = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) switch (action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) case HDA_GEN_PCM_ACT_OPEN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) msleep(40);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) snd_hda_codec_write(codec, hinfo->nid, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) spec->active_adcs |= (1 << idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) case HDA_GEN_PCM_ACT_CLOSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) snd_hda_codec_write(codec, hinfo->nid, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) spec->active_adcs &= ~(1 << idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * funky external mute control using GPIO pins.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) unsigned int dir_mask, unsigned int data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) unsigned int gpiostate, gpiomask, gpiodir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) hda_nid_t fg = codec->core.afg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) gpiostate = snd_hda_codec_read(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) AC_VERB_GET_GPIO_DATA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) gpiomask = snd_hda_codec_read(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) AC_VERB_GET_GPIO_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) gpiomask |= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) gpiodir = snd_hda_codec_read(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) AC_VERB_GET_GPIO_DIRECTION, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) gpiodir |= dir_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Configure GPIOx as CMOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) snd_hda_codec_write(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) AC_VERB_SET_GPIO_MASK, gpiomask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) snd_hda_codec_read(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) snd_hda_codec_read(codec, fg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* hook for controlling mic-mute LED GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static int stac_capture_led_update(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) spec->gpio_data |= spec->mic_mute_led_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) spec->gpio_data &= ~spec->mic_mute_led_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static int stac_vrefout_set(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) hda_nid_t nid, unsigned int new_vref)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) int error, pinctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) pinctl = snd_hda_codec_read(codec, nid, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (pinctl < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return pinctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) pinctl &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) pinctl &= ~AC_PINCTL_VREFEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) pinctl |= (new_vref & AC_PINCTL_VREFEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (error < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) return error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* this hook is set in stac_setup_gpio() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) unsigned int power_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (nid == codec->core.afg && power_state == AC_PWRST_D3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return AC_PWRST_D1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) return snd_hda_gen_path_power_filter(codec, nid, power_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* update mute-LED accoring to the master switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static void stac_update_led_status(struct hda_codec *codec, bool muted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (!spec->gpio_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* LED state is inverted on these systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (spec->gpio_led_polarity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) muted = !muted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (!spec->vref_mute_led_nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (muted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) spec->gpio_data |= spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) spec->gpio_data &= ~spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) stac_gpio_set(codec, spec->gpio_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) spec->gpio_dir, spec->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) stac_vrefout_set(codec, spec->vref_mute_led_nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) spec->vref_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* vmaster hook to update mute LED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static int stac_vmaster_hook(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) enum led_brightness brightness)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct hda_codec *codec = dev_to_hda_codec(led_cdev->dev->parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) stac_update_led_status(codec, brightness);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /* automute hook to handle GPIO mute and EAPD updates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) static void stac_update_outputs(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (spec->gpio_mute)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) spec->gen.master_mute =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) !(snd_hda_codec_read(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) snd_hda_gen_update_outputs(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (spec->eapd_mask && spec->eapd_switch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) unsigned int val = spec->gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (spec->gen.speaker_muted)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) val &= ~spec->eapd_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) val |= spec->eapd_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (spec->gpio_data != val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) spec->gpio_data = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) bool enable, bool do_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) unsigned int idx, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) for (idx = 0; idx < spec->num_pwrs; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (spec->pwr_nids[idx] == nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (idx >= spec->num_pwrs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) idx = 1 << idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) val = spec->power_map_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) val &= ~idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) val |= idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* power down unused output ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (val != spec->power_map_bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) spec->power_map_bits = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (do_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) snd_hda_codec_write(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) AC_VERB_IDT_SET_POWER_MAP, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* update power bit per jack plug/unplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) static void jack_update_power(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct hda_jack_callback *jack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) if (!spec->num_pwrs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (jack && jack->nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) stac_toggle_power_map(codec, jack->nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) snd_hda_jack_detect(codec, jack->nid),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* update all jacks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) for (i = 0; i < spec->num_pwrs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) hda_nid_t nid = spec->pwr_nids[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (!snd_hda_jack_tbl_get(codec, nid))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) stac_toggle_power_map(codec, nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) snd_hda_jack_detect(codec, nid),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) snd_hda_codec_write(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) AC_VERB_IDT_SET_POWER_MAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) spec->power_map_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static void stac_vref_event(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct hda_jack_callback *event)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) unsigned int data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) data = snd_hda_codec_read(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) AC_VERB_GET_GPIO_DATA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* toggle VREF state based on GPIOx status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) !!(data & (1 << event->private_data)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /* initialize the power map and enable the power event to jacks that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * haven't been assigned to automute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) static void stac_init_power_map(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) for (i = 0; i < spec->num_pwrs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) hda_nid_t nid = spec->pwr_nids[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) def_conf = get_defcfg_connect(def_conf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (def_conf == AC_JACK_PORT_COMPLEX &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) spec->vref_mute_led_nid != nid &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) is_jack_detectable(codec, nid)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) snd_hda_jack_detect_enable_callback(codec, nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) jack_update_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (def_conf == AC_JACK_PORT_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) stac_toggle_power_map(codec, nid, false, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) stac_toggle_power_map(codec, nid, true, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static inline bool get_int_hint(struct hda_codec *codec, const char *key,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int *valp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) return !snd_hda_get_int_hint(codec, key, valp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) /* override some hints from the hwdep entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) static void stac_store_hints(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) spec->gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) spec->gpio_dir &= spec->gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) spec->gpio_data &= spec->gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) spec->eapd_mask &= spec->gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) spec->gpio_mute &= spec->gpio_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) val = snd_hda_get_bool_hint(codec, "eapd_switch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (val >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) spec->eapd_switch = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * loopback controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) #define stac_aloopback_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) ucontrol->value.integer.value[0] = !!(spec->aloopback &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) (spec->aloopback_mask << idx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) unsigned int dac_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) unsigned int val, idx_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) idx_val = spec->aloopback_mask << idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) if (ucontrol->value.integer.value[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) val = spec->aloopback | idx_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) val = spec->aloopback & ~idx_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (spec->aloopback == val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) spec->aloopback = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* Only return the bits defined by the shift value of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) * first two bytes of the mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) kcontrol->private_value & 0xFFFF, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) dac_mode >>= spec->aloopback_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if (spec->aloopback & idx_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) snd_hda_power_up(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) dac_mode |= idx_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) snd_hda_power_down(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dac_mode &= ~idx_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) snd_hda_codec_write_cache(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) kcontrol->private_value >> 16, dac_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .name = "Analog Loopback", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .count = cnt, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .info = stac_aloopback_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .get = stac_aloopback_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .put = stac_aloopback_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .private_value = verb_read | (verb_write << 16), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * Mute LED handling on HP laptops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /* check whether it's a HP laptop with a docking port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static bool hp_bnb2011_with_dock(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (codec->core.vendor_id != 0x111d7605 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) codec->core.vendor_id != 0x111d76d1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) switch (codec->core.subsystem_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) case 0x103c1618:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) case 0x103c1619:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) case 0x103c161a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) case 0x103c161b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) case 0x103c161c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) case 0x103c161d:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) case 0x103c161e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) case 0x103c161f:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) case 0x103c162a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) case 0x103c162b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) case 0x103c1630:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) case 0x103c1631:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) case 0x103c1633:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) case 0x103c1634:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) case 0x103c1635:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) case 0x103c3587:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) case 0x103c3588:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) case 0x103c3589:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) case 0x103c358a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) case 0x103c3667:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) case 0x103c3668:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) case 0x103c3669:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) static bool hp_blike_system(u32 subsystem_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) switch (subsystem_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) case 0x103c1473: /* HP ProBook 6550b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) case 0x103c1520:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) case 0x103c1521:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) case 0x103c1523:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) case 0x103c1524:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) case 0x103c1525:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) case 0x103c1722:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) case 0x103c1723:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) case 0x103c1724:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) case 0x103c1725:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) case 0x103c1726:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) case 0x103c1727:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) case 0x103c1728:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) case 0x103c1729:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) case 0x103c172a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) case 0x103c172b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) case 0x103c307e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) case 0x103c307f:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) case 0x103c3080:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) case 0x103c3081:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) case 0x103c7007:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) case 0x103c7008:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) static void set_hp_led_gpio(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) unsigned int gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (spec->gpio_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) gpio &= AC_GPIO_IO_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) if (gpio > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) spec->gpio_led = 0x08; /* GPIO 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) spec->gpio_led = 0x01; /* GPIO 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * This method searches for the mute LED GPIO configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * provided as OEM string in SMBIOS. The format of that string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) * is HP_Mute_LED_P_G or HP_Mute_LED_P
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) * that corresponds to the NOT muted state of the master volume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) * and G is the index of the GPIO to use as the mute LED control (0..9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * If _G portion is missing it is assigned based on the codec ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * SMBIOS - at least the ones I have seen do not have them - which include
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * my own system (HP Pavilion dv6-1110ax) and my cousin's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * HP Pavilion dv9500t CTO.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) * Need more information on whether it is true across the entire series.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * -- kunal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) const struct dmi_device *dev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) get_int_hint(codec, "gpio_led_polarity",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) &spec->gpio_led_polarity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) &spec->gpio_led_polarity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) &spec->gpio_led) == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) unsigned int max_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) max_gpio = snd_hda_param_read(codec, codec->core.afg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) AC_PAR_GPIO_CAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) max_gpio &= AC_GPIO_IO_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) if (spec->gpio_led < max_gpio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) spec->gpio_led = 1 << spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) spec->vref_mute_led_nid = spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) if (sscanf(dev->name, "HP_Mute_LED_%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) &spec->gpio_led_polarity) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) set_hp_led_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) /* BIOS bug: unfilled OEM string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (strstr(dev->name, "HP_Mute_LED_P_G")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) set_hp_led_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) if (default_polarity >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) spec->gpio_led_polarity = default_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) spec->gpio_led_polarity = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * Fallback case - if we don't find the DMI strings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) * we statically set the GPIO - if not a B-series system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * and default polarity is provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) if (!hp_blike_system(codec->core.subsystem_id) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) (default_polarity == 0 || default_polarity == 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) set_hp_led_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) spec->gpio_led_polarity = default_polarity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) /* check whether a built-in speaker is included in parsed pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static bool has_builtin_speaker(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) const hda_nid_t *nid_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) int nids, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) nid_pin = spec->gen.autocfg.line_out_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) nids = spec->gen.autocfg.line_outs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) nid_pin = spec->gen.autocfg.speaker_pins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) nids = spec->gen.autocfg.speaker_outs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) for (i = 0; i < nids; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * PC beep controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) /* create PC beep volume controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) static int stac_auto_create_beep_ctls(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) struct snd_kcontrol_new *knew;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) static const struct snd_kcontrol_new abeep_mute_ctl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) HDA_CODEC_MUTE(NULL, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) static const struct snd_kcontrol_new dbeep_mute_ctl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static const struct snd_kcontrol_new beep_vol_ctl =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) HDA_CODEC_VOLUME(NULL, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) /* check for mute support for the amp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) const struct snd_kcontrol_new *temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) if (spec->anabeep_nid == nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) temp = &abeep_mute_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) temp = &dbeep_mute_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) knew = snd_hda_gen_add_kctl(&spec->gen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) "Beep Playback Switch", temp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) if (!knew)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) knew->private_value =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /* check to see if there is volume support for the amp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) knew = snd_hda_gen_add_kctl(&spec->gen,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) "Beep Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) &beep_vol_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) if (!knew)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) knew->private_value =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) #ifdef CONFIG_SND_HDA_INPUT_BEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) ucontrol->value.integer.value[0] = codec->beep->enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) .name = "Beep Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) .info = stac_dig_beep_switch_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) .get = stac_dig_beep_switch_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) .put = stac_dig_beep_switch_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) static int stac_beep_switch_ctl(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) * SPDIF-out mux controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) spec->gen.autocfg.dig_out_pins[smux_idx],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) &spec->cur_smux[smux_idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) static const struct snd_kcontrol_new stac_smux_mixer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .name = "IEC958 Playback Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) /* count set later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) .info = stac_smux_enum_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) .get = stac_smux_enum_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .put = stac_smux_enum_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) static const char * const stac_spdif_labels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) struct auto_pin_cfg *cfg = &spec->gen.autocfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) const char * const *labels = spec->spdif_labels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) struct snd_kcontrol_new *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) int i, num_cons;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) if (cfg->dig_outs < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) if (num_cons <= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) if (!labels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) labels = stac_spdif_labels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) for (i = 0; i < num_cons; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) if (snd_BUG_ON(!labels[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (!kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) kctl->count = cfg->dig_outs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static const struct hda_verb stac9200_eapd_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) /* set dac0mux for dac converter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) static const struct hda_verb dell_eq_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /* set master volume to max value without distortion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) static const struct hda_verb stac92hd73xx_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) /* set master volume and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) static const struct hda_verb stac92hd83xxx_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) /* power state controls amps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) { 0x01, AC_VERB_SET_EAPD, 1 << 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) { 0x22, 0x785, 0x43 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) { 0x22, 0x782, 0xe0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) { 0x22, 0x795, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static const struct hda_verb stac92hd71bxx_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) /* set master volume and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 0x0f, 0x0a, 0x0d, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) static const struct hda_verb stac925x_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) /* set dac0mux for dac converter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) /* mute the master volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) static const struct hda_verb stac922x_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) /* set master volume and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) static const struct hda_verb d965_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) /* unmute node 0x1b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) /* select node 0x03 as DAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) static const struct hda_verb dell_3st_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) /* don't set delta bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) /* unmute node 0x1b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) /* select node 0x03 as DAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) static const struct hda_verb stac927x_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) /* set master volume and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) /* enable analog pc beep path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) static const struct hda_verb stac927x_volknob_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) /* don't set delta bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) /* enable analog pc beep path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) static const struct hda_verb stac9205_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) /* set master volume and direct control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) /* enable analog pc beep path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) static const struct snd_kcontrol_new stac92hd71bxx_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) static const struct snd_kcontrol_new stac9205_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) static const struct snd_kcontrol_new stac927x_loopback =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) static const struct hda_pintbl ref9200_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) { 0x08, 0x01c47010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) { 0x09, 0x01447010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) { 0x0d, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) { 0x0e, 0x01114010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) { 0x0f, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) { 0x10, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) { 0x11, 0x90100140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) { 0x12, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) { 0x08, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) { 0x09, 0x404500f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) { 0x0d, 0x400100f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) { 0x0e, 0x90110010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) { 0x0f, 0x400100f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) { 0x10, 0x02a1902e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) { 0x11, 0x500000f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) { 0x12, 0x500000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) { 0x08, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) { 0x09, 0x404500f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) { 0x0d, 0x400100f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) { 0x0e, 0x90110010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) { 0x0f, 0x400100f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) { 0x10, 0x02a1902e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) { 0x11, 0x500000f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) { 0x12, 0x500000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) STAC 9200 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) 102801A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 102801DE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) 102801E8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static const struct hda_pintbl dell9200_d21_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) { 0x08, 0x400001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) { 0x09, 0x400001f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) { 0x0d, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) { 0x0e, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) { 0x0f, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) { 0x10, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) { 0x11, 0x90100140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) { 0x12, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) STAC 9200 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) 102801C0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) 102801C1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) static const struct hda_pintbl dell9200_d22_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) { 0x08, 0x400001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) { 0x09, 0x400001f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) { 0x0d, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) { 0x0e, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) { 0x0f, 0x01813020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) { 0x10, 0x02a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) { 0x11, 0x90100140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) { 0x12, 0x400001f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) STAC 9200 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) 102801C4 (Dell Dimension E310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) 102801C5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) 102801C7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) 102801D9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) 102801DA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) 102801E3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) static const struct hda_pintbl dell9200_d23_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) { 0x08, 0x400001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) { 0x09, 0x400001f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) { 0x0d, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) { 0x0e, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) { 0x0f, 0x01813020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) { 0x10, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) { 0x11, 0x90100140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) { 0x12, 0x400001f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) 102801B5 (Dell Inspiron 630m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) 102801D8 (Dell Inspiron 640m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) static const struct hda_pintbl dell9200_m21_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) { 0x09, 0x03441340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) { 0x0d, 0x0321121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) { 0x0f, 0x408003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) { 0x10, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) { 0x11, 0x401003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) { 0x12, 0x403003fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) 102801C2 (Dell Latitude D620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) 102801C8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) 102801CC (Dell Latitude D820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) 102801D4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) 102801D6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) static const struct hda_pintbl dell9200_m22_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) { 0x09, 0x0144131f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) { 0x0d, 0x0321121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) { 0x0f, 0x90a70321 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) { 0x10, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) { 0x11, 0x401003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) { 0x12, 0x40f000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) 102801CE (Dell XPS M1710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) 102801CF (Dell Precision M90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static const struct hda_pintbl dell9200_m23_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) { 0x09, 0x01441340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) { 0x0d, 0x0421421f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) { 0x0f, 0x408003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) { 0x10, 0x04a1102e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) { 0x11, 0x90170311 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) { 0x12, 0x403003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) 102801C9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) 102801CA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) 102801CB (Dell Latitude 120L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) 102801D3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) static const struct hda_pintbl dell9200_m24_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) { 0x09, 0x404003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) { 0x0d, 0x0321121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) { 0x0f, 0x408003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) { 0x10, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) { 0x11, 0x401003fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) { 0x12, 0x403003fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) 102801BD (Dell Inspiron E1505n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) 102801EE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) 102801EF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) static const struct hda_pintbl dell9200_m25_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) { 0x09, 0x01441340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) { 0x0d, 0x0421121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) { 0x0f, 0x408003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) { 0x10, 0x04a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) { 0x11, 0x401003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) { 0x12, 0x403003fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) STAC 9200-32 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) 102801F5 (Dell Inspiron 1501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) 102801F6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) static const struct hda_pintbl dell9200_m26_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) { 0x09, 0x404003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) { 0x0d, 0x0421121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) { 0x0f, 0x408003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) { 0x10, 0x04a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) { 0x11, 0x401003fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) { 0x12, 0x403003fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) STAC 9200-32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) 102801CD (Dell Inspiron E1705/9400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) static const struct hda_pintbl dell9200_m27_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) { 0x08, 0x40c003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) { 0x09, 0x01441340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) { 0x0d, 0x0421121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) { 0x0e, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) { 0x0f, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) { 0x10, 0x04a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) { 0x11, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) { 0x12, 0x40f003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) static const struct hda_pintbl oqo9200_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) { 0x08, 0x40c000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) { 0x09, 0x404000f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) { 0x0d, 0x0221121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) { 0x0e, 0x02211210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) { 0x0f, 0x90170111 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) { 0x10, 0x90a70120 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) { 0x11, 0x400000f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) { 0x12, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * STAC 92HD700
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) * 18881000 Amigaone X1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) static const struct hda_pintbl nemo_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) { 0x0a, 0x02214020 }, /* Front panel HP socket */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) { 0x0b, 0x02a19080 }, /* Front Mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) { 0x0c, 0x0181304e }, /* Line in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) { 0x0d, 0x01014010 }, /* Line out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) { 0x0e, 0x01a19040 }, /* Rear Mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) { 0x0f, 0x01011012 }, /* Rear speakers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) { 0x10, 0x01016011 }, /* Center speaker */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) { 0x11, 0x01012014 }, /* Side speakers (7.1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) { 0x13, 0x411111f0 }, /* Unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) { 0x14, 0x411111f0 }, /* Unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) { 0x21, 0x01442170 }, /* S/PDIF line out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) { 0x22, 0x411111f0 }, /* Unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) { 0x23, 0x411111f0 }, /* Unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) static void stac9200_fixup_panasonic(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) spec->gpio_mask = spec->gpio_dir = 0x09;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) spec->gpio_data = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) /* CF-74 has no headphone detection, and the driver should *NOT*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) * do detection and HP/speaker toggle because the hardware does it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) spec->gen.suppress_auto_mute = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) static const struct hda_fixup stac9200_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) [STAC_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) .v.pins = ref9200_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) [STAC_9200_OQO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) .v.pins = oqo9200_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) .chain_id = STAC_9200_EAPD_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) [STAC_9200_DELL_D21] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) .v.pins = dell9200_d21_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) [STAC_9200_DELL_D22] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) .v.pins = dell9200_d22_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) [STAC_9200_DELL_D23] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) .v.pins = dell9200_d23_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) [STAC_9200_DELL_M21] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) .v.pins = dell9200_m21_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) [STAC_9200_DELL_M22] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) .v.pins = dell9200_m22_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) [STAC_9200_DELL_M23] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) .v.pins = dell9200_m23_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) [STAC_9200_DELL_M24] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) .v.pins = dell9200_m24_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) [STAC_9200_DELL_M25] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) .v.pins = dell9200_m25_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) [STAC_9200_DELL_M26] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) .v.pins = dell9200_m26_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) [STAC_9200_DELL_M27] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) .v.pins = dell9200_m27_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) [STAC_9200_M4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) .v.pins = gateway9200_m4_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) .chain_id = STAC_9200_EAPD_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) [STAC_9200_M4_2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) .v.pins = gateway9200_m4_2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) .chain_id = STAC_9200_EAPD_INIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) [STAC_9200_PANASONIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) .v.func = stac9200_fixup_panasonic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) [STAC_9200_EAPD_INIT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) .type = HDA_FIXUP_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) .v.verbs = (const struct hda_verb[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) static const struct hda_model_fixup stac9200_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) { .id = STAC_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) { .id = STAC_9200_OQO, .name = "oqo" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) { .id = STAC_9200_M4, .name = "gateway-m4" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) { .id = STAC_9200_PANASONIC, .name = "panasonic" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) "DFI LanParty", STAC_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) "DFI LanParty", STAC_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /* Dell laptops have BIOS problem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) "unknown Dell", STAC_9200_DELL_D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) "Dell Inspiron 630m", STAC_9200_DELL_M21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) "Dell Inspiron E1505n", STAC_9200_DELL_M25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) "unknown Dell", STAC_9200_DELL_D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) "unknown Dell", STAC_9200_DELL_D22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) "Dell Latitude D620", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) "unknown Dell", STAC_9200_DELL_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) "unknown Dell", STAC_9200_DELL_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) "unknown Dell", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) "unknown Dell", STAC_9200_DELL_M24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) "unknown Dell", STAC_9200_DELL_M24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) "Dell Latitude 120L", STAC_9200_DELL_M24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) "Dell Latitude D820", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) "Dell XPS M1710", STAC_9200_DELL_M23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) "Dell Precision M90", STAC_9200_DELL_M23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) "unknown Dell", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) "unknown Dell", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) "unknown Dell", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) "Dell Inspiron 640m", STAC_9200_DELL_M21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) "unknown Dell", STAC_9200_DELL_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) "unknown Dell", STAC_9200_DELL_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) "unknown Dell", STAC_9200_DELL_D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) "unknown Dell", STAC_9200_DELL_D23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) "unknown Dell", STAC_9200_DELL_D21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) "unknown Dell", STAC_9200_DELL_M25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) "unknown Dell", STAC_9200_DELL_M25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) "Dell Inspiron 1501", STAC_9200_DELL_M26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) "unknown Dell", STAC_9200_DELL_M26),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) "Dell Latitude D430", STAC_9200_DELL_M22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) /* Panasonic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) /* Gateway machines needs EAPD to be set on resume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) /* OQO Mobile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) static const struct hda_pintbl ref925x_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) { 0x07, 0x40c003f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) { 0x0a, 0x01813022 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) { 0x0b, 0x02a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) { 0x0c, 0x90a70320 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) { 0x0d, 0x02214210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) { 0x10, 0x01019020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) static const struct hda_pintbl stac925xM1_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) static const struct hda_pintbl stac925xM2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) static const struct hda_pintbl stac925xM3_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) { 0x11, 0x503303f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) static const struct hda_pintbl stac925xM5_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) { 0x11, 0x9033032e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) static const struct hda_pintbl stac925xM6_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) { 0x07, 0x40c003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) { 0x08, 0x424503f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) { 0x0a, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) { 0x0c, 0x40a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) { 0x0d, 0x90100210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) { 0x10, 0x400003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) { 0x11, 0x90330320 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) static const struct hda_fixup stac925x_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) [STAC_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) .v.pins = ref925x_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) [STAC_M1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) .v.pins = stac925xM1_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) [STAC_M1_2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) .v.pins = stac925xM1_2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) [STAC_M2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) .v.pins = stac925xM2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) [STAC_M2_2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) .v.pins = stac925xM2_2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) [STAC_M3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) .v.pins = stac925xM3_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) [STAC_M5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) .v.pins = stac925xM5_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) [STAC_M6] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) .v.pins = stac925xM6_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) static const struct hda_model_fixup stac925x_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) { .id = STAC_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) { .id = STAC_M1, .name = "m1" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) { .id = STAC_M1_2, .name = "m1-2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) { .id = STAC_M2, .name = "m2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) { .id = STAC_M2_2, .name = "m2-2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) { .id = STAC_M3, .name = "m3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) { .id = STAC_M5, .name = "m5" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) { .id = STAC_M6, .name = "m6" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) /* Default table for unknown ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) /* gateway machines are checked via codec ssid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) /* Not sure about the brand name for those */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) { 0x0b, 0x02a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) { 0x0c, 0x01a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) { 0x0d, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) { 0x0e, 0x0181302e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) { 0x0f, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) { 0x10, 0x01014020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) { 0x11, 0x01014030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) { 0x12, 0x02319040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) { 0x13, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) { 0x14, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) { 0x22, 0x01452050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) { 0x23, 0x01452050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) static const struct hda_pintbl dell_m6_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) { 0x0a, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) { 0x0b, 0x4f00000f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) { 0x0c, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) { 0x0e, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) { 0x0f, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) { 0x10, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) { 0x11, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) { 0x12, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) { 0x13, 0x90a60160 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) { 0x14, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) { 0x22, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) { 0x23, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) static const struct hda_pintbl alienware_m17x_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) { 0x0a, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) { 0x0b, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) { 0x0c, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) { 0x0d, 0x03014020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) { 0x0e, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) { 0x0f, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) { 0x10, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) { 0x11, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) { 0x12, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) { 0x13, 0x90a60160 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) { 0x14, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) { 0x22, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) { 0x23, 0x904601b0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) static const struct hda_pintbl intel_dg45id_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) { 0x0a, 0x02214230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) { 0x0b, 0x02A19240 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) { 0x0c, 0x01013214 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) { 0x0d, 0x01014210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) { 0x0e, 0x01A19250 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) { 0x0f, 0x01011212 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) { 0x10, 0x01016211 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) { 0x0b, 0x02A19010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) { 0x0e, 0x400000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) spec->eapd_switch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) stac92hd73xx_fixup_dell(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) snd_hda_add_verbs(codec, dell_eq_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) spec->volknob_init = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) /* Analog Mics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) stac92hd73xx_fixup_dell(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) /* Digital Mics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) stac92hd73xx_fixup_dell(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) /* Both */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) stac92hd73xx_fixup_dell(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) spec->eapd_switch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) codec->no_jack_detect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) static void stac92hd73xx_disable_automute(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) spec->gen.suppress_auto_mute = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) static const struct hda_fixup stac92hd73xx_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) [STAC_92HD73XX_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) .v.func = stac92hd73xx_fixup_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) [STAC_DELL_M6_AMIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) .v.func = stac92hd73xx_fixup_dell_m6_amic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) [STAC_DELL_M6_DMIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) .v.func = stac92hd73xx_fixup_dell_m6_dmic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) [STAC_DELL_M6_BOTH] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) .v.func = stac92hd73xx_fixup_dell_m6_both,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) [STAC_DELL_EQ] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) .v.func = stac92hd73xx_fixup_dell_eq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) [STAC_ALIENWARE_M17X] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) .v.func = stac92hd73xx_fixup_alienware_m17x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) [STAC_ELO_VUPOINT_15MX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) .v.func = stac92hd73xx_disable_automute,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) [STAC_92HD73XX_INTEL] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) .v.pins = intel_dg45id_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) [STAC_92HD73XX_NO_JD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) .v.func = stac92hd73xx_fixup_no_jd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) [STAC_92HD89XX_HP_FRONT_JACK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) [STAC_92HD73XX_ASUS_MOBO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) /* enable 5.1 and SPDIF out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) { 0x0c, 0x01014411 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) { 0x0d, 0x01014410 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) { 0x0e, 0x01014412 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) { 0x22, 0x014b1180 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) static const struct hda_model_fixup stac92hd73xx_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) { .id = STAC_92HD73XX_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) { .id = STAC_92HD73XX_INTEL, .name = "intel" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) { .id = STAC_DELL_EQ, .name = "dell-eq" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) "DFI LanParty", STAC_92HD73XX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) "DFI LanParty", STAC_92HD73XX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) "Intel DG45ID", STAC_92HD73XX_INTEL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) "Intel DG45FC", STAC_92HD73XX_INTEL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) "Dell Studio 1535", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) "unknown Dell", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) "unknown Dell", STAC_DELL_M6_BOTH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) "unknown Dell", STAC_DELL_M6_BOTH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) "unknown Dell", STAC_DELL_M6_AMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) "unknown Dell", STAC_DELL_M6_AMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) "unknown Dell", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) "unknown Dell", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) "Dell Studio 1537", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) "Dell Studio 17", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) "Dell Studio 1555", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) "Dell Studio 1557", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) "Dell Studio 1558", STAC_DELL_M6_DMIC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) /* codec SSID matching */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) "Alienware M17x", STAC_ALIENWARE_M17X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) "Alienware M17x", STAC_ALIENWARE_M17X),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) "Alienware M17x R3", STAC_DELL_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) SND_PCI_QUIRK(0x1059, 0x1011,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) STAC_92HD73XX_ASUS_MOBO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) { 0x0b, 0x02211010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) { 0x0c, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) { 0x0d, 0x02170130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) { 0x0e, 0x01014050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) { 0x0f, 0x01819040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) { 0x10, 0x01014020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) { 0x11, 0x90a3014e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) { 0x1f, 0x01451160 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) { 0x20, 0x98560170 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) static const struct hda_pintbl dell_s14_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) { 0x0a, 0x0221403f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) { 0x0b, 0x0221101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) { 0x0c, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) { 0x0e, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) { 0x0f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) { 0x10, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) { 0x11, 0x90a60160 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) { 0x1f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) { 0x20, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) { 0x0a, 0x02a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) { 0x0b, 0x0221101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) { 0x0c, 0x400000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) { 0x0e, 0x400000f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) { 0x0f, 0x400000f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) { 0x10, 0x400000f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) { 0x11, 0x90a60160 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) { 0x1f, 0x400000f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) { 0x20, 0x400000f5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) { 0x0a, 0x03a12050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) { 0x0b, 0x0321201f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) { 0x0c, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) { 0x0e, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) { 0x0f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) { 0x10, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) { 0x11, 0xd5a30140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) { 0x1f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) { 0x20, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) static const struct hda_pintbl hp_zephyr_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) { 0x0a, 0x01813050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) { 0x0b, 0x0421201f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) { 0x0c, 0x04a1205e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) { 0x0d, 0x96130310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) { 0x0e, 0x96130310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) { 0x0f, 0x0101401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) { 0x10, 0x1111611f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) { 0x11, 0xd5a30130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) { 0x0a, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) { 0x0b, 0x0221101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) { 0x0c, 0x02a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) { 0x0d, 0x92170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) { 0x0e, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) { 0x0f, 0x92170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) { 0x10, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) { 0x11, 0xd5a30130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) { 0x1f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) { 0x20, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) if (hp_bnb2011_with_dock(codec)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) if (find_mute_led_cfg(codec, spec->default_polarity))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) codec_dbg(codec, "mute LED gpio %d polarity %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) spec->gpio_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) spec->gpio_led_polarity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) /* allow auto-switching of dock line-in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) spec->gen.line_in_auto_switch = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) spec->default_polarity = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) spec->default_polarity = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) /* resetting controller clears GPIO, so we need to keep on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) spec->gpio_led = 0x10; /* GPIO4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) spec->default_polarity = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) spec->headset_jack = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) const struct hda_fixup *fix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) spec->gpio_data = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) spec->eapd_switch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) const struct hda_fixup *fix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) static const hda_nid_t preferred_pairs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) 0xd, 0x13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) spec->gen.preferred_dacs = preferred_pairs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) static const struct hda_verb hp_bnb13_eq_verbs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) /* 44.1KHz base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) { 0x22, 0x7A7, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) { 0x22, 0x7A8, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) { 0x22, 0x7AA, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) { 0x22, 0x7AB, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) { 0x22, 0x7AC, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) { 0x22, 0x7A6, 0x83 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) { 0x22, 0x7A7, 0x2F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) { 0x22, 0x7A8, 0xD1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) { 0x22, 0x7A9, 0x83 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) { 0x22, 0x7AA, 0x2F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) { 0x22, 0x7AB, 0xD1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) { 0x22, 0x7AC, 0x01 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) { 0x22, 0x7A7, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) { 0x22, 0x7A8, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) { 0x22, 0x7AA, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) { 0x22, 0x7AB, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) { 0x22, 0x7AC, 0x02 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) { 0x22, 0x7A6, 0x7C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) { 0x22, 0x7A7, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) { 0x22, 0x7A8, 0x0C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) { 0x22, 0x7A9, 0x7C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) { 0x22, 0x7AA, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) { 0x22, 0x7AB, 0x0C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) { 0x22, 0x7AC, 0x03 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) { 0x22, 0x7A6, 0xC3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) { 0x22, 0x7A7, 0x25 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) { 0x22, 0x7A8, 0xAF },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) { 0x22, 0x7A9, 0xC3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) { 0x22, 0x7AA, 0x25 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) { 0x22, 0x7AB, 0xAF },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) { 0x22, 0x7AC, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) { 0x22, 0x7A7, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) { 0x22, 0x7A8, 0x73 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) { 0x22, 0x7AA, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) { 0x22, 0x7AB, 0x73 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) { 0x22, 0x7AC, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) { 0x22, 0x7A6, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) { 0x22, 0x7A7, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) { 0x22, 0x7A8, 0xC7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) { 0x22, 0x7A9, 0x85 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) { 0x22, 0x7AA, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) { 0x22, 0x7AB, 0xC7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) { 0x22, 0x7AC, 0x06 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) { 0x22, 0x7A6, 0x3C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) { 0x22, 0x7A7, 0x90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) { 0x22, 0x7A8, 0xB0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) { 0x22, 0x7A9, 0x3C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) { 0x22, 0x7AA, 0x90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) { 0x22, 0x7AB, 0xB0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) { 0x22, 0x7AC, 0x07 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) { 0x22, 0x7A6, 0x7A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) { 0x22, 0x7A7, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) { 0x22, 0x7A8, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) { 0x22, 0x7A9, 0x7A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) { 0x22, 0x7AA, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) { 0x22, 0x7AB, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) { 0x22, 0x7AC, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) { 0x22, 0x7A6, 0xC4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) { 0x22, 0x7A7, 0xE9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) { 0x22, 0x7A8, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) { 0x22, 0x7A9, 0xC4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) { 0x22, 0x7AA, 0xE9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) { 0x22, 0x7AB, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) { 0x22, 0x7AC, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) { 0x22, 0x7A6, 0x3D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) { 0x22, 0x7A7, 0xE1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) { 0x22, 0x7A8, 0x0D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) { 0x22, 0x7A9, 0x3D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) { 0x22, 0x7AA, 0xE1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) { 0x22, 0x7AB, 0x0D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290) { 0x22, 0x7AC, 0x0A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) { 0x22, 0x7A6, 0x89 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) { 0x22, 0x7A7, 0xB6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) { 0x22, 0x7A8, 0xEB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) { 0x22, 0x7A9, 0x89 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) { 0x22, 0x7AA, 0xB6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) { 0x22, 0x7AB, 0xEB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) { 0x22, 0x7AC, 0x0B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) { 0x22, 0x7A6, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) { 0x22, 0x7A7, 0x9D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) { 0x22, 0x7A8, 0xFE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) { 0x22, 0x7A9, 0x39 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) { 0x22, 0x7AA, 0x9D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) { 0x22, 0x7AB, 0xFE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) { 0x22, 0x7AC, 0x0C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) { 0x22, 0x7A6, 0x76 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) { 0x22, 0x7A7, 0x49 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) { 0x22, 0x7A8, 0x15 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) { 0x22, 0x7A9, 0x76 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) { 0x22, 0x7AA, 0x49 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) { 0x22, 0x7AB, 0x15 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) { 0x22, 0x7AC, 0x0D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) { 0x22, 0x7A6, 0xC8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) { 0x22, 0x7A7, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) { 0x22, 0x7A8, 0xF5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) { 0x22, 0x7A9, 0xC8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) { 0x22, 0x7AA, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) { 0x22, 0x7AB, 0xF5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) { 0x22, 0x7AC, 0x0E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) { 0x22, 0x7AC, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) { 0x22, 0x7A6, 0x90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) { 0x22, 0x7A7, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) { 0x22, 0x7A8, 0xF1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) { 0x22, 0x7A9, 0x90 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) { 0x22, 0x7AA, 0x68 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) { 0x22, 0x7AB, 0xF1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) { 0x22, 0x7AC, 0x10 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) { 0x22, 0x7A6, 0x34 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) { 0x22, 0x7A7, 0x47 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) { 0x22, 0x7A8, 0x6C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) { 0x22, 0x7A9, 0x34 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) { 0x22, 0x7AA, 0x47 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) { 0x22, 0x7AB, 0x6C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) { 0x22, 0x7AC, 0x11 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) { 0x22, 0x7A6, 0x6F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) { 0x22, 0x7A7, 0x97 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) { 0x22, 0x7A8, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) { 0x22, 0x7A9, 0x6F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) { 0x22, 0x7AA, 0x97 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) { 0x22, 0x7AB, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) { 0x22, 0x7AC, 0x12 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) { 0x22, 0x7A6, 0xCB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) { 0x22, 0x7A7, 0xB8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) { 0x22, 0x7A8, 0x94 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) { 0x22, 0x7A9, 0xCB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) { 0x22, 0x7AA, 0xB8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) { 0x22, 0x7AB, 0x94 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) { 0x22, 0x7AC, 0x13 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) { 0x22, 0x7AC, 0x14 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) { 0x22, 0x7A6, 0x95 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) { 0x22, 0x7A7, 0x76 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) { 0x22, 0x7A8, 0x5B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) { 0x22, 0x7A9, 0x95 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) { 0x22, 0x7AA, 0x76 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) { 0x22, 0x7AB, 0x5B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) { 0x22, 0x7AC, 0x15 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) { 0x22, 0x7A6, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) { 0x22, 0x7A7, 0xAC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) { 0x22, 0x7A8, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) { 0x22, 0x7A9, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) { 0x22, 0x7AA, 0xAC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) { 0x22, 0x7AB, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) { 0x22, 0x7AC, 0x16 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) { 0x22, 0x7A6, 0x6A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) { 0x22, 0x7A7, 0x89 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) { 0x22, 0x7A8, 0xA5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) { 0x22, 0x7A9, 0x6A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) { 0x22, 0x7AA, 0x89 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) { 0x22, 0x7AB, 0xA5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) { 0x22, 0x7AC, 0x17 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) { 0x22, 0x7A6, 0xCE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) { 0x22, 0x7A7, 0x53 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) { 0x22, 0x7A8, 0xCF },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) { 0x22, 0x7A9, 0xCE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) { 0x22, 0x7AA, 0x53 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) { 0x22, 0x7AB, 0xCF },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) { 0x22, 0x7AC, 0x18 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) { 0x22, 0x7AC, 0x19 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) /* 48KHz base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) { 0x22, 0x7A7, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) { 0x22, 0x7A8, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) { 0x22, 0x7AA, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) { 0x22, 0x7AB, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) { 0x22, 0x7AC, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) { 0x22, 0x7A6, 0x82 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) { 0x22, 0x7A7, 0xEE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) { 0x22, 0x7A8, 0x46 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) { 0x22, 0x7A9, 0x82 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) { 0x22, 0x7AA, 0xEE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) { 0x22, 0x7AB, 0x46 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) { 0x22, 0x7AC, 0x1B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) { 0x22, 0x7A7, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) { 0x22, 0x7A8, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) { 0x22, 0x7AA, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) { 0x22, 0x7AB, 0xDC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) { 0x22, 0x7AC, 0x1C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) { 0x22, 0x7A6, 0x7D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) { 0x22, 0x7A7, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) { 0x22, 0x7A8, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) { 0x22, 0x7A9, 0x7D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) { 0x22, 0x7AA, 0x09 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) { 0x22, 0x7AB, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) { 0x22, 0x7AC, 0x1D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) { 0x22, 0x7A6, 0xC2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) { 0x22, 0x7A7, 0xE5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) { 0x22, 0x7A8, 0xB4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) { 0x22, 0x7A9, 0xC2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) { 0x22, 0x7AA, 0xE5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) { 0x22, 0x7AB, 0xB4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) { 0x22, 0x7AC, 0x1E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) { 0x22, 0x7A7, 0xA3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) { 0x22, 0x7A8, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) { 0x22, 0x7AA, 0xA3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) { 0x22, 0x7AB, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) { 0x22, 0x7AC, 0x1F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) { 0x22, 0x7A6, 0x84 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) { 0x22, 0x7A7, 0xCA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) { 0x22, 0x7A8, 0xF1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) { 0x22, 0x7A9, 0x84 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) { 0x22, 0x7AA, 0xCA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) { 0x22, 0x7AB, 0xF1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) { 0x22, 0x7AC, 0x20 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) { 0x22, 0x7A6, 0x3C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) { 0x22, 0x7A7, 0xD5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) { 0x22, 0x7A8, 0x9C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) { 0x22, 0x7A9, 0x3C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) { 0x22, 0x7AA, 0xD5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) { 0x22, 0x7AB, 0x9C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) { 0x22, 0x7AC, 0x21 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) { 0x22, 0x7A6, 0x7B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) { 0x22, 0x7A7, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) { 0x22, 0x7A8, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) { 0x22, 0x7A9, 0x7B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) { 0x22, 0x7AA, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) { 0x22, 0x7AB, 0x0F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) { 0x22, 0x7AC, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) { 0x22, 0x7A6, 0xC4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) { 0x22, 0x7A7, 0x87 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) { 0x22, 0x7A8, 0x45 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) { 0x22, 0x7A9, 0xC4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) { 0x22, 0x7AA, 0x87 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) { 0x22, 0x7AB, 0x45 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) { 0x22, 0x7AC, 0x23 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) { 0x22, 0x7A6, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) { 0x22, 0x7A7, 0x0A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) { 0x22, 0x7A8, 0x78 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) { 0x22, 0x7A9, 0x3E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) { 0x22, 0x7AA, 0x0A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) { 0x22, 0x7AB, 0x78 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) { 0x22, 0x7AC, 0x24 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) { 0x22, 0x7A6, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) { 0x22, 0x7A7, 0xE2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) { 0x22, 0x7A8, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) { 0x22, 0x7A9, 0x88 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) { 0x22, 0x7AA, 0xE2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) { 0x22, 0x7AB, 0x05 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) { 0x22, 0x7AC, 0x25 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) { 0x22, 0x7A6, 0x3A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) { 0x22, 0x7A7, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) { 0x22, 0x7A8, 0xA3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) { 0x22, 0x7A9, 0x3A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) { 0x22, 0x7AA, 0x1A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) { 0x22, 0x7AB, 0xA3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) { 0x22, 0x7AC, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) { 0x22, 0x7A6, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) { 0x22, 0x7A7, 0x1D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) { 0x22, 0x7A8, 0xFB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) { 0x22, 0x7A9, 0x77 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) { 0x22, 0x7AA, 0x1D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) { 0x22, 0x7AB, 0xFB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) { 0x22, 0x7AC, 0x27 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) { 0x22, 0x7A6, 0xC7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) { 0x22, 0x7A7, 0xDA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) { 0x22, 0x7A8, 0xE5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) { 0x22, 0x7A9, 0xC7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) { 0x22, 0x7AA, 0xDA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) { 0x22, 0x7AB, 0xE5 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) { 0x22, 0x7AC, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) { 0x22, 0x7AC, 0x29 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) { 0x22, 0x7A6, 0x8E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) { 0x22, 0x7A7, 0xD7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) { 0x22, 0x7A8, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) { 0x22, 0x7A9, 0x8E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) { 0x22, 0x7AA, 0xD7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) { 0x22, 0x7AB, 0x22 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) { 0x22, 0x7AC, 0x2A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) { 0x22, 0x7A6, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) { 0x22, 0x7A7, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) { 0x22, 0x7A8, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) { 0x22, 0x7A9, 0x35 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) { 0x22, 0x7AA, 0x26 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) { 0x22, 0x7AB, 0xC6 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) { 0x22, 0x7AC, 0x2B },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) { 0x22, 0x7A6, 0x71 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) { 0x22, 0x7A7, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) { 0x22, 0x7A8, 0xDE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) { 0x22, 0x7A9, 0x71 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) { 0x22, 0x7AA, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) { 0x22, 0x7AB, 0xDE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) { 0x22, 0x7AC, 0x2C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) { 0x22, 0x7A6, 0xCA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) { 0x22, 0x7A7, 0xD9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) { 0x22, 0x7A8, 0x3A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) { 0x22, 0x7A9, 0xCA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) { 0x22, 0x7AA, 0xD9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) { 0x22, 0x7AB, 0x3A },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) { 0x22, 0x7AC, 0x2D },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) { 0x22, 0x7AC, 0x2E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) { 0x22, 0x7A6, 0x93 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) { 0x22, 0x7A7, 0x5E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) { 0x22, 0x7A8, 0xD8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584) { 0x22, 0x7A9, 0x93 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) { 0x22, 0x7AA, 0x5E },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) { 0x22, 0x7AB, 0xD8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) { 0x22, 0x7AC, 0x2F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) { 0x22, 0x7A6, 0x32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) { 0x22, 0x7A7, 0xB7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) { 0x22, 0x7A8, 0xB1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) { 0x22, 0x7A9, 0x32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) { 0x22, 0x7AA, 0xB7 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) { 0x22, 0x7AB, 0xB1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) { 0x22, 0x7AC, 0x30 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) { 0x22, 0x7A6, 0x6C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) { 0x22, 0x7A7, 0xA1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) { 0x22, 0x7A8, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) { 0x22, 0x7A9, 0x6C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) { 0x22, 0x7AA, 0xA1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) { 0x22, 0x7AB, 0x28 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) { 0x22, 0x7AC, 0x31 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) { 0x22, 0x7A6, 0xCD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) { 0x22, 0x7A7, 0x48 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) { 0x22, 0x7A8, 0x4F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) { 0x22, 0x7A9, 0xCD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) { 0x22, 0x7AA, 0x48 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) { 0x22, 0x7AB, 0x4F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) { 0x22, 0x7AC, 0x32 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) { 0x22, 0x7A6, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) { 0x22, 0x7A7, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) { 0x22, 0x7A8, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) { 0x22, 0x7A9, 0x40 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) { 0x22, 0x7AA, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) { 0x22, 0x7AB, 0x00 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) { 0x22, 0x7AC, 0x33 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) { 0x22, 0x7AD, 0x80 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) /* common */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) { 0x22, 0x782, 0xC1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) { 0x22, 0x771, 0x2C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) { 0x22, 0x772, 0x2C },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) { 0x22, 0x788, 0x04 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) { 0x01, 0x7B0, 0x08 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) static const struct hda_fixup stac92hd83xxx_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) [STAC_92HD83XXX_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) .v.pins = ref92hd83xxx_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) [STAC_92HD83XXX_PWR_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) .v.pins = ref92hd83xxx_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) [STAC_DELL_S14] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) .v.pins = dell_s14_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) [STAC_DELL_VOSTRO_3500] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) .v.pins = dell_vostro_3500_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) .v.pins = hp_cNB11_intquad_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) [STAC_92HD83XXX_HP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) .v.func = stac92hd83xxx_fixup_hp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) [STAC_HP_DV7_4000] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) .v.pins = hp_dv7_4000_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) [STAC_HP_ZEPHYR] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) .v.func = stac92hd83xxx_fixup_hp_zephyr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) [STAC_92HD83XXX_HP_LED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) .v.func = stac92hd83xxx_fixup_hp_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) [STAC_92HD83XXX_HP_INV_LED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) .v.func = stac92hd83xxx_fixup_hp_inv_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) [STAC_92HD83XXX_HP_MIC_LED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) .v.func = stac92hd83xxx_fixup_hp_mic_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) [STAC_HP_LED_GPIO10] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) .chain_id = STAC_92HD83XXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) [STAC_92HD83XXX_HEADSET_JACK] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) .v.func = stac92hd83xxx_fixup_headset_jack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) [STAC_HP_ENVY_BASS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) { 0x0f, 0x90170111 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) [STAC_HP_BNB13_EQ] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) .type = HDA_FIXUP_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) .v.verbs = hp_bnb13_eq_verbs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) .chain_id = STAC_92HD83XXX_HP_MIC_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) [STAC_HP_ENVY_TS_BASS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) { 0x10, 0x92170111 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) [STAC_HP_ENVY_TS_DAC_BIND] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) .v.func = hp_envy_ts_fixup_dac_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) .chain_id = STAC_HP_ENVY_TS_BASS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) [STAC_92HD83XXX_GPIO10_EAPD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) .v.func = stac92hd83xxx_fixup_gpio10_eapd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) static const struct hda_model_fixup stac92hd83xxx_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) { .id = STAC_92HD83XXX_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) { .id = STAC_DELL_S14, .name = "dell-s14" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) "DFI LanParty", STAC_92HD83XXX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) "DFI LanParty", STAC_92HD83XXX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) "unknown Dell", STAC_DELL_S14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) "HP Pavilion dv7", STAC_HP_DV7_4000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) "HP Envy Spectre", STAC_HP_ENVY_BASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) "HP Folio 13", STAC_HP_LED_GPIO10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) "HP Folio", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) "HP bNB13", STAC_HP_BNB13_EQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) "HP", STAC_92HD83XXX_HP_MIC_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) "HP", STAC_92HD83XXX_HP_MIC_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) "HP", STAC_92HD83XXX_HP_MIC_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) "HP", STAC_HP_ZEPHYR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) "HP Mini", STAC_92HD83XXX_HP_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) "HP Mini", STAC_92HD83XXX_HP_LED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) /* match both for 0xfa91 and 0xfa93 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) /* HP dv7 bass switch - GPIO5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) unsigned int gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) gpio_data = (spec->gpio_data & ~0x20) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) (ucontrol->value.integer.value[0] ? 0x20 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) if (gpio_data == spec->gpio_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) spec->gpio_data = gpio_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) .info = stac_hp_bass_gpio_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) .get = stac_hp_bass_gpio_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) .put = stac_hp_bass_gpio_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) static int stac_add_hp_bass_switch(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979) &stac_hp_bass_sw_ctrl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) spec->gpio_mask |= 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) spec->gpio_dir |= 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) spec->gpio_data |= 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) { 0x0b, 0x02a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991) { 0x0c, 0x01a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) { 0x0e, 0x0181302e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) { 0x0f, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) { 0x14, 0x01019020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) { 0x18, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) { 0x19, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) { 0x1e, 0x01452050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) { 0x1f, 0x01452050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) static const struct hda_pintbl dell_m4_1_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) { 0x0a, 0x0421101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) { 0x0b, 0x04a11221 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) { 0x0c, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) { 0x0e, 0x23a1902e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) { 0x0f, 0x23014250 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) { 0x14, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) { 0x18, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) { 0x19, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) { 0x1e, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) { 0x1f, 0x4f0000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) static const struct hda_pintbl dell_m4_2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) { 0x0a, 0x0421101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) { 0x0b, 0x04a11221 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) { 0x0c, 0x90a70330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) { 0x0e, 0x23a1902e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) { 0x0f, 0x23014250 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) { 0x14, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) { 0x18, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) { 0x19, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) { 0x1e, 0x044413b0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) { 0x1f, 0x044413b0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) static const struct hda_pintbl dell_m4_3_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) { 0x0a, 0x0421101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) { 0x0b, 0x04a11221 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) { 0x0c, 0x90a70330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) { 0x0d, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) { 0x0e, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) { 0x0f, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) { 0x14, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) { 0x18, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) { 0x19, 0x40f000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) { 0x1e, 0x044413b0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) { 0x1f, 0x044413b0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) struct hda_jack_callback *jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) /* Enable VREF power saving on GPIO1 detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) snd_hda_codec_write_cache(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) stac_vref_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) if (!IS_ERR(jack))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) jack->private_data = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) spec->gpio_mask |= 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) /* enable internal microphone */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) spec->gpio_led = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) unsigned int cap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) switch (action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) case HDA_FIXUP_ACT_PRE_PROBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) case HDA_FIXUP_ACT_PROBE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) /* enable bass on HP dv7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) cap &= AC_GPIO_IO_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) if (cap >= 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) stac_add_hp_bass_switch(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) spec->gpio_led = 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) /* count line-out, too, as BIOS sets often so */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) /* It was changed in the BIOS to just satisfy MS DTM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) * Lets turn it back into follower HP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) /* when both output A and F are assigned, these are supposedly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) * dock and built-in headphones; fix both pin configs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) fixup_hp_headphone(codec, 0x0a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) fixup_hp_headphone(codec, 0x0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) if (find_mute_led_cfg(codec, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) codec_dbg(codec, "mute LED gpio %d polarity %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) spec->gpio_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) spec->gpio_led_polarity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) static const struct hda_fixup stac92hd71bxx_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) [STAC_92HD71BXX_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) .v.func = stac92hd71bxx_fixup_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) [STAC_DELL_M4_1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) .v.pins = dell_m4_1_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) [STAC_DELL_M4_2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) .v.pins = dell_m4_2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) [STAC_DELL_M4_3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) .v.pins = dell_m4_3_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) [STAC_HP_M4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) .v.func = stac92hd71bxx_fixup_hp_m4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) .chain_id = STAC_92HD71BXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) [STAC_HP_DV4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) .v.func = stac92hd71bxx_fixup_hp_dv4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) .chain_id = STAC_HP_DV5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) [STAC_HP_DV5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) .v.func = stac92hd71bxx_fixup_hp_dv5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) .chain_id = STAC_92HD71BXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) [STAC_HP_HDX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) .v.func = stac92hd71bxx_fixup_hp_hdx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) .chain_id = STAC_92HD71BXX_HP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) [STAC_92HD71BXX_HP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) .v.func = stac92hd71bxx_fixup_hp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) static const struct hda_model_fixup stac92hd71bxx_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218) { .id = STAC_92HD71BXX_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) { .id = STAC_HP_M4, .name = "hp-m4" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) { .id = STAC_HP_DV4, .name = "hp-dv4" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) { .id = STAC_HP_DV5, .name = "hp-dv5" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) { .id = STAC_HP_HDX, .name = "hp-hdx" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) "DFI LanParty", STAC_92HD71BXX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) "DFI LanParty", STAC_92HD71BXX_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) "HP", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) "HP", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) "HP dv4-7", STAC_HP_DV4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) "HP dv4-7", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) "HP HDX", STAC_HP_HDX), /* HDX18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) "HP mini 1000", STAC_HP_M4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) "HP HDX", STAC_HP_HDX), /* HDX16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) "HP dv6", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) "HP DV6", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) "HP", STAC_HP_DV5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) "unknown Dell", STAC_DELL_M4_1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) "unknown Dell", STAC_DELL_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) "unknown Dell", STAC_DELL_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) "unknown Dell", STAC_DELL_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) "unknown Dell", STAC_DELL_M4_2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) "unknown Dell", STAC_DELL_M4_3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) static const struct hda_pintbl ref922x_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) { 0x0a, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) { 0x0b, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) { 0x0c, 0x01012012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) { 0x0d, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) { 0x0e, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) { 0x0f, 0x01011014 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) { 0x10, 0x01441030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294) { 0x11, 0x01c41030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) { 0x15, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) { 0x1b, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) STAC 922X pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) 102801A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) 102801AB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) 102801A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) 102801D1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) 102801D2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) { 0x0b, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) { 0x0c, 0x01111012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) { 0x0d, 0x01114010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) { 0x0e, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) { 0x0f, 0x01117011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) { 0x10, 0x400001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) { 0x11, 0x400001f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) { 0x15, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) { 0x1b, 0x400001f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) STAC 922X pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) 102801AC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) 102801D0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) { 0x0a, 0x02214030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) { 0x0b, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) { 0x0c, 0x01111012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) { 0x0d, 0x01114010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) { 0x0e, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) { 0x0f, 0x01117011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) { 0x10, 0x01451140 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) { 0x11, 0x400001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) { 0x15, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) { 0x1b, 0x400001f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) STAC 922X pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) 102801BF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) { 0x0a, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) { 0x0b, 0x01112024 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) { 0x0c, 0x01111222 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) { 0x0d, 0x91174220 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) { 0x0e, 0x03a11050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) { 0x0f, 0x01116221 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) { 0x10, 0x90a70330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) { 0x11, 0x01452340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) { 0x15, 0x40C003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355) { 0x1b, 0x405003f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) STAC 9221 A1 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) 102801D7 (Dell XPS M1210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) { 0x0a, 0x02211211 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) { 0x0b, 0x408103ff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) { 0x0c, 0x02a1123e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) { 0x0d, 0x90100310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) { 0x0e, 0x408003f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) { 0x0f, 0x0221121f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) { 0x10, 0x03451340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) { 0x11, 0x40c003f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) { 0x15, 0x508003f3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) { 0x1b, 0x405003f4 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) static const struct hda_pintbl d945gtp3_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) { 0x0a, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) { 0x0b, 0x01a19022 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) { 0x0c, 0x01813021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) { 0x0e, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) { 0x0f, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) { 0x10, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) { 0x11, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) { 0x15, 0x02a19120 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) { 0x1b, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) static const struct hda_pintbl d945gtp5_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) { 0x0a, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) { 0x0b, 0x01011012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) { 0x0c, 0x01813024 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) { 0x0e, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) { 0x0f, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) { 0x10, 0x01452130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) { 0x11, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) { 0x15, 0x02a19320 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) { 0x1b, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) { 0x0a, 0x0121e21f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) { 0x0b, 0x400000ff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) { 0x0c, 0x9017e110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) { 0x0d, 0x400000fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) { 0x0f, 0x0181e020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) { 0x10, 0x1145e030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) { 0x11, 0x11c5e240 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) { 0x15, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) { 0x1b, 0x400000fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) { 0x0a, 0x0121e21f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) { 0x0b, 0x90a7012e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) { 0x0c, 0x9017e110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) { 0x0d, 0x400000fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) { 0x0f, 0x0181e020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) { 0x10, 0x1145e230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) { 0x11, 0x500000fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) { 0x15, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) { 0x1b, 0x400000fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434) { 0x0a, 0x0121e21f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) { 0x0b, 0x90a7012e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) { 0x0c, 0x9017e110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) { 0x0d, 0x400000fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) { 0x0f, 0x0181e020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) { 0x10, 0x1145e230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) { 0x11, 0x11c5e240 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) { 0x15, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) { 0x1b, 0x400000fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) { 0x0a, 0x0321e21f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) { 0x0b, 0x03a1e02e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) { 0x0c, 0x9017e110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) { 0x0d, 0x9017e11f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) { 0x0f, 0x0381e020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) { 0x10, 0x1345e230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) { 0x11, 0x13c5e240 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) { 0x15, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) { 0x1b, 0x400000fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462) { 0x0a, 0x0321e21f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) { 0x0b, 0x03a1e02e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) { 0x0c, 0x9017e110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) { 0x0d, 0x9017e11f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) { 0x0f, 0x0381e020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) { 0x10, 0x1345e230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) { 0x11, 0x13c5e240 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) { 0x15, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) { 0x1b, 0x400000fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) static const struct hda_pintbl ecs202_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) { 0x0a, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) { 0x0b, 0x02a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) { 0x0c, 0x01a19020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) { 0x0d, 0x01114010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) { 0x0e, 0x408000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) { 0x0f, 0x01813022 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) { 0x10, 0x074510a0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) { 0x11, 0x40c400f1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) { 0x15, 0x9037012e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) { 0x1b, 0x40e000f2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503) SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) static const struct hda_fixup stac922x_fixups[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) /* remap the fixup from codec SSID and apply it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) const struct hda_fixup *fix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) stac922x_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) snd_hda_apply_fixup(codec, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) const struct hda_fixup *fix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) spec->gpio_mask = spec->gpio_dir = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) spec->gpio_data = 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) static const struct hda_fixup stac922x_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) [STAC_D945_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) .v.pins = ref922x_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) [STAC_D945GTP3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) .v.pins = d945gtp3_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) [STAC_D945GTP5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) .v.pins = d945gtp5_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) [STAC_INTEL_MAC_AUTO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551) .v.func = stac922x_fixup_intel_mac_auto,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) [STAC_INTEL_MAC_V1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) .v.pins = intel_mac_v1_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) .chain_id = STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) [STAC_INTEL_MAC_V2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) .v.pins = intel_mac_v2_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) .chain_id = STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) [STAC_INTEL_MAC_V3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) .v.pins = intel_mac_v3_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) .chain_id = STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) [STAC_INTEL_MAC_V4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) .v.pins = intel_mac_v4_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) .chain_id = STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) [STAC_INTEL_MAC_V5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) .v.pins = intel_mac_v5_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) .chain_id = STAC_922X_INTEL_MAC_GPIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) [STAC_922X_INTEL_MAC_GPIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) .v.func = stac922x_fixup_intel_mac_gpio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) [STAC_ECS_202] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) .v.pins = ecs202_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) [STAC_922X_DELL_D81] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) .v.pins = dell_922x_d81_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) [STAC_922X_DELL_D82] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) .v.pins = dell_922x_d82_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) [STAC_922X_DELL_M81] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) .v.pins = dell_922x_m81_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) [STAC_922X_DELL_M82] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) .v.pins = dell_922x_m82_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) static const struct hda_model_fixup stac922x_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) { .id = STAC_D945_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) { .id = STAC_D945GTP5, .name = "5stack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) { .id = STAC_D945GTP3, .name = "3stack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) { .id = STAC_ECS_202, .name = "ecs202" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) /* for backward compatibility */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) "DFI LanParty", STAC_D945_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) "DFI LanParty", STAC_D945_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) /* Intel 945G based systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) "Intel D945G", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) /* Intel D945G 5-stack systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) "Intel D945G", STAC_D945GTP5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) "Intel D945G", STAC_D945GTP5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) "Intel D945G", STAC_D945GTP5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) "Intel D945G", STAC_D945GTP5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) /* Intel 945P based systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) "Intel D945P", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) "Intel D945P", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) "Intel D945P", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) "Intel D945P", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) "Intel D945P", STAC_D945GTP3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) "Intel D945P", STAC_D945GTP5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) /* other intel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) "Intel D945", STAC_D945_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) /* other systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) /* Dell systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) "unknown Dell", STAC_922X_DELL_D81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) "unknown Dell", STAC_922X_DELL_D81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) "unknown Dell", STAC_922X_DELL_D81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) "unknown Dell", STAC_922X_DELL_D82),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) "unknown Dell", STAC_922X_DELL_M81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) "unknown Dell", STAC_922X_DELL_D82),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) "unknown Dell", STAC_922X_DELL_D81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) "unknown Dell", STAC_922X_DELL_D81),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) "Dell XPS M1210", STAC_922X_DELL_M82),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) /* ECS/PC Chips boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) "ECS/PC chips", STAC_ECS_202),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) static const struct hda_pintbl ref927x_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) { 0x0a, 0x02214020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) { 0x0b, 0x02a19080 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) { 0x0c, 0x0181304e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) { 0x0e, 0x01a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) { 0x0f, 0x01011012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) { 0x10, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) { 0x11, 0x0101201f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) { 0x12, 0x183301f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) { 0x13, 0x18a001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) { 0x14, 0x18a001f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) { 0x21, 0x01442070 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) { 0x22, 0x01c42190 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) { 0x23, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) static const struct hda_pintbl d965_3st_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) { 0x0a, 0x0221401f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) { 0x0b, 0x02a19120 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) { 0x0c, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) { 0x0d, 0x01014011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) { 0x0e, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) { 0x0f, 0x01813024 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) { 0x10, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) { 0x11, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) { 0x12, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) { 0x13, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) { 0x14, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) { 0x21, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) { 0x22, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) { 0x23, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) static const struct hda_pintbl d965_5st_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) { 0x0a, 0x02214020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) { 0x0b, 0x02a19080 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) { 0x0c, 0x0181304e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) { 0x0e, 0x01a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) { 0x0f, 0x01011012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) { 0x10, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) { 0x11, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) { 0x12, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) { 0x13, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) { 0x14, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) { 0x21, 0x01442070 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) { 0x22, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) { 0x23, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) { 0x0a, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) { 0x0b, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) { 0x0c, 0x0181304e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) { 0x0e, 0x01a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) { 0x0f, 0x01011012 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) { 0x10, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) { 0x11, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) { 0x12, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) { 0x13, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) { 0x14, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) { 0x21, 0x01442070 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) { 0x22, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) { 0x23, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) static const struct hda_pintbl dell_3st_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) { 0x0a, 0x02211230 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) { 0x0b, 0x02a11220 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) { 0x0c, 0x01a19040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) { 0x0d, 0x01114210 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) { 0x0e, 0x01111212 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) { 0x0f, 0x01116211 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) { 0x10, 0x01813050 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) { 0x11, 0x01112214 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) { 0x12, 0x403003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) { 0x13, 0x90a60040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) { 0x14, 0x90a60040 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) { 0x21, 0x404003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) { 0x22, 0x40c003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) { 0x23, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) /* no jack detecion for ref-no-jd model */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) codec->no_jack_detect = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) static void stac927x_fixup_ref(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) spec->eapd_mask = spec->gpio_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) spec->gpio_dir = spec->gpio_data = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) if (codec->core.subsystem_id != 0x1028022f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) /* GPIO2 High = Enable EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) spec->eapd_mask = spec->gpio_mask = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) spec->gpio_dir = spec->gpio_data = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) snd_hda_add_verbs(codec, dell_3st_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) spec->volknob_init = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) static void stac927x_fixup_volknob(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) snd_hda_add_verbs(codec, stac927x_volknob_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) spec->volknob_init = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) static const struct hda_fixup stac927x_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) [STAC_D965_REF_NO_JD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) .v.func = stac927x_fixup_ref_no_jd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) .chain_id = STAC_D965_REF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) [STAC_D965_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) .v.func = stac927x_fixup_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) [STAC_D965_3ST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) .v.pins = d965_3st_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) .chain_id = STAC_D965_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) [STAC_D965_5ST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) .v.pins = d965_5st_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) .chain_id = STAC_D965_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) [STAC_D965_VERBS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889) .type = HDA_FIXUP_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) .v.verbs = d965_core_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) [STAC_D965_5ST_NO_FP] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) .v.pins = d965_5st_no_fp_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) [STAC_NEMO_DEFAULT] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) .v.pins = nemo_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) [STAC_DELL_3ST] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) .v.pins = dell_3st_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) .chain_id = STAC_927X_DELL_DMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) [STAC_DELL_BIOS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) /* correct the front output jack as a hp out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) { 0x0f, 0x0221101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911) /* correct the front input jack as a mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) { 0x0e, 0x02a79130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) .chain_id = STAC_927X_DELL_DMIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) [STAC_DELL_BIOS_AMIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) /* configure the analog microphone on some laptops */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) { 0x0c, 0x90a79130 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) .chain_id = STAC_DELL_BIOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) [STAC_DELL_BIOS_SPDIF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) .v.pins = (const struct hda_pintbl[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) /* correct the device field to SPDIF out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) { 0x21, 0x01442070 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3933) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3934) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3935) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3936) .chain_id = STAC_DELL_BIOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3937) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3938) [STAC_927X_DELL_DMIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3939) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3940) .v.func = stac927x_fixup_dell_dmic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3941) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3942) [STAC_927X_VOLKNOB] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3943) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3944) .v.func = stac927x_fixup_volknob,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3945) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3946) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3948) static const struct hda_model_fixup stac927x_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3949) { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3950) { .id = STAC_D965_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3951) { .id = STAC_D965_3ST, .name = "3stack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3952) { .id = STAC_D965_5ST, .name = "5stack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3953) { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3954) { .id = STAC_DELL_3ST, .name = "dell-3stack" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3955) { .id = STAC_DELL_BIOS, .name = "dell-bios" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3956) { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3957) { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3958) { .id = STAC_927X_VOLKNOB, .name = "volknob" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3959) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3960) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3962) static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3963) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3964) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3965) "DFI LanParty", STAC_D965_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3966) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3967) "DFI LanParty", STAC_D965_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3968) /* Intel 946 based systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3969) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3970) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3971) /* 965 based 3 stack systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3972) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3973) "Intel D965", STAC_D965_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3974) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3975) "Intel D965", STAC_D965_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3976) /* Dell 3 stack systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3977) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3978) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3979) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3980) /* Dell 3 stack systems with verb table in BIOS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3981) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3982) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3983) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3984) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3985) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3986) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3987) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3988) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3989) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3990) /* 965 based 5 stack systems */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3991) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3992) "Intel D965", STAC_D965_5ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3993) SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3994) "Intel D965", STAC_D965_5ST),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3995) /* Nemo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3996) SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3997) /* volume-knob fixes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3998) SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3999) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4000) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4002) static const struct hda_pintbl ref9205_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4003) { 0x0a, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4004) { 0x0b, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4005) { 0x0c, 0x01016011 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4006) { 0x0d, 0x01014010 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4007) { 0x0e, 0x01813122 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4008) { 0x0f, 0x01a19021 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4009) { 0x14, 0x01019020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4010) { 0x16, 0x40000100 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4011) { 0x17, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4012) { 0x18, 0x90a000f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4013) { 0x21, 0x01441030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4014) { 0x22, 0x01c41030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4015) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4016) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4018) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4019) STAC 9205 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4020) 102801F1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4021) 102801F2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4022) 102801FC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4023) 102801FD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4024) 10280204
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4025) 1028021F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4026) 10280228 (Dell Vostro 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4027) 10280229 (Dell Vostro 1700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4028) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4029) static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4030) { 0x0a, 0x0321101F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4031) { 0x0b, 0x03A11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4032) { 0x0c, 0x400003FA },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4033) { 0x0d, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4034) { 0x0e, 0x400003FB },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4035) { 0x0f, 0x400003FC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4036) { 0x14, 0x400003FD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4037) { 0x16, 0x40F000F9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4038) { 0x17, 0x90A60330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4039) { 0x18, 0x400003FF },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4040) { 0x21, 0x0144131F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4041) { 0x22, 0x40C003FE },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4042) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4043) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4045) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4046) STAC 9205 pin configs for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4047) 102801F9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4048) 102801FA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4049) 102801FE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4050) 102801FF (Dell Precision M4300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4051) 10280206
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4052) 10280200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4053) 10280201
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4054) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4055) static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4056) { 0x0a, 0x0321101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4057) { 0x0b, 0x03a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4058) { 0x0c, 0x90a70330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4059) { 0x0d, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4060) { 0x0e, 0x400000fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4061) { 0x0f, 0x400000ff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4062) { 0x14, 0x400000fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4063) { 0x16, 0x40f000f9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4064) { 0x17, 0x400000fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4065) { 0x18, 0x400000fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4066) { 0x21, 0x0144131f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4067) { 0x22, 0x40c003f8 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4068) /* Enable SPDIF in/out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4069) { 0x1f, 0x01441030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4070) { 0x20, 0x1c410030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4071) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4072) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4074) static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4075) { 0x0a, 0x0421101f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4076) { 0x0b, 0x04a11020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4077) { 0x0c, 0x400003fa },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4078) { 0x0d, 0x90170310 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4079) { 0x0e, 0x400003fb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4080) { 0x0f, 0x400003fc },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4081) { 0x14, 0x400003fd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4082) { 0x16, 0x400003f9 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4083) { 0x17, 0x90a60330 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4084) { 0x18, 0x400003ff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4085) { 0x21, 0x01441340 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4086) { 0x22, 0x40c003fe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4087) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4088) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4090) static void stac9205_fixup_ref(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4091) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4092) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4093) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4095) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4096) snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4097) /* SPDIF-In enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4098) spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4099) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4102) static void stac9205_fixup_dell_m43(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4103) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4104) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4105) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4106) struct hda_jack_callback *jack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4108) if (action == HDA_FIXUP_ACT_PRE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4109) snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4111) /* Enable unsol response for GPIO4/Dock HP connection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4112) snd_hda_codec_write_cache(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4113) AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4114) jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4115) stac_vref_event);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4116) if (!IS_ERR(jack))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4117) jack->private_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4119) spec->gpio_dir = 0x0b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4120) spec->eapd_mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4121) spec->gpio_mask = 0x1b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4122) spec->gpio_mute = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4123) /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4124) * GPIO3 Low = DRM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4126) spec->gpio_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4130) static void stac9205_fixup_eapd(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4131) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4132) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4133) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4135) if (action == HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4136) spec->eapd_switch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4139) static const struct hda_fixup stac9205_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4140) [STAC_9205_REF] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4141) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4142) .v.func = stac9205_fixup_ref,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4143) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4144) [STAC_9205_DELL_M42] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4145) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4146) .v.pins = dell_9205_m42_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4147) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4148) [STAC_9205_DELL_M43] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4149) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4150) .v.func = stac9205_fixup_dell_m43,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4151) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4152) [STAC_9205_DELL_M44] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4153) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4154) .v.pins = dell_9205_m44_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4156) [STAC_9205_EAPD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4157) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4158) .v.func = stac9205_fixup_eapd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4159) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4160) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4161) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4163) static const struct hda_model_fixup stac9205_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4164) { .id = STAC_9205_REF, .name = "ref" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4165) { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4166) { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4167) { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4168) { .id = STAC_9205_EAPD, .name = "eapd" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4169) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4172) static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4173) /* SigmaTel reference board */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4174) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4175) "DFI LanParty", STAC_9205_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4176) SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4177) "SigmaTel", STAC_9205_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4178) SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4179) "DFI LanParty", STAC_9205_REF),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4180) /* Dell */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4181) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4182) "unknown Dell", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4183) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4184) "unknown Dell", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4185) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4186) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4187) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4188) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4189) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4190) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4191) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4192) "unknown Dell", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4193) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4194) "unknown Dell", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4195) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4196) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4197) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4198) "Dell Precision M4300", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4199) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4200) "unknown Dell", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4201) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4202) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4203) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4204) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4205) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4206) "Dell Precision", STAC_9205_DELL_M43),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4207) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4208) "Dell Inspiron", STAC_9205_DELL_M44),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4209) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4210) "Dell Vostro 1500", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4211) SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4212) "Dell Vostro 1700", STAC_9205_DELL_M42),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4213) /* Gateway */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4214) SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4215) SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4216) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4219) static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4220) const struct hda_fixup *fix, int action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4222) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4224) if (action != HDA_FIXUP_ACT_PRE_PROBE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4225) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4227) if (find_mute_led_cfg(codec, spec->default_polarity))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4228) codec_dbg(codec, "mute LED gpio %d polarity %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4229) spec->gpio_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4230) spec->gpio_led_polarity);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4233) static const struct hda_fixup stac92hd95_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4234) [STAC_92HD95_HP_LED] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4235) .type = HDA_FIXUP_FUNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4236) .v.func = stac92hd95_fixup_hp_led,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4237) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4238) [STAC_92HD95_HP_BASS] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4239) .type = HDA_FIXUP_VERBS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4240) .v.verbs = (const struct hda_verb[]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4241) {0x1a, 0x795, 0x00}, /* HPF to 100Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4242) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4243) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4244) .chained = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4245) .chain_id = STAC_92HD95_HP_LED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4246) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4249) static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4250) SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4251) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4254) static const struct hda_model_fixup stac92hd95_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4255) { .id = STAC_92HD95_HP_LED, .name = "hp-led" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4256) { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4257) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4261) static int stac_parse_auto_config(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4263) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4264) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4265) int flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4267) if (spec->headset_jack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4268) flags |= HDA_PINCFG_HEADSET_MIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4270) err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4271) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4272) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4274) /* add hooks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4275) spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4276) spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4278) spec->gen.automute_hook = stac_update_outputs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4280) err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4281) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4282) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4284) if (spec->vref_mute_led_nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4285) err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4286) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4287) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4290) /* setup analog beep controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4291) if (spec->anabeep_nid > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4292) err = stac_auto_create_beep_ctls(codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4293) spec->anabeep_nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4294) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4295) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4298) /* setup digital beep controls and input device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4299) #ifdef CONFIG_SND_HDA_INPUT_BEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4300) if (spec->gen.beep_nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4301) hda_nid_t nid = spec->gen.beep_nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4302) unsigned int caps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4304) err = stac_auto_create_beep_ctls(codec, nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4305) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4306) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4307) if (codec->beep) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4308) /* IDT/STAC codecs have linear beep tone parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4309) codec->beep->linear_tone = spec->linear_tone_beep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4310) /* if no beep switch is available, make its own one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4311) caps = query_amp_caps(codec, nid, HDA_OUTPUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4312) if (!(caps & AC_AMPCAP_MUTE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4313) err = stac_beep_switch_ctl(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4314) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4315) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4319) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4321) if (spec->gpio_led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4322) snd_hda_gen_add_mute_led_cdev(codec, stac_vmaster_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4324) if (spec->aloopback_ctl &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4325) snd_hda_get_bool_hint(codec, "loopback") == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4326) unsigned int wr_verb =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4327) spec->aloopback_ctl->private_value >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4328) if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4329) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4330) if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4331) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4334) if (spec->have_spdif_mux) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4335) err = stac_create_spdif_mux_ctls(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4336) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4337) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4340) stac_init_power_map(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4342) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4345) static int stac_init(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4347) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4348) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4350) /* override some hints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4351) stac_store_hints(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4353) /* set up GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4354) /* turn on EAPD statically when spec->eapd_switch isn't set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4355) * otherwise, unsol event will turn it on/off dynamically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4357) if (!spec->eapd_switch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4358) spec->gpio_data |= spec->eapd_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4359) stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4361) snd_hda_gen_init(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4363) /* sync the power-map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4364) if (spec->num_pwrs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4365) snd_hda_codec_write(codec, codec->core.afg, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4366) AC_VERB_IDT_SET_POWER_MAP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4367) spec->power_map_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4369) /* power down inactive ADCs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4370) if (spec->powerdown_adcs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4371) for (i = 0; i < spec->gen.num_all_adcs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4372) if (spec->active_adcs & (1 << i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4373) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4374) snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4375) AC_VERB_SET_POWER_STATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4376) AC_PWRST_D3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4380) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4383) static void stac_shutup(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4385) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4387) snd_hda_shutup_pins(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4389) if (spec->eapd_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4390) stac_gpio_set(codec, spec->gpio_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4391) spec->gpio_dir, spec->gpio_data &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4392) ~spec->eapd_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4395) #define stac_free snd_hda_gen_free
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4397) #ifdef CONFIG_SND_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4398) static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4399) struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4401) if (nid == codec->core.afg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4402) snd_iprintf(buffer, "Power-Map: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4403) snd_hda_codec_read(codec, nid, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4404) AC_VERB_IDT_GET_POWER_MAP, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4407) static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4408) struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4409) unsigned int verb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4410) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4411) snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4412) snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4415) /* stac92hd71bxx, stac92hd73xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4416) static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4417) struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4419) stac92hd_proc_hook(buffer, codec, nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4420) if (nid == codec->core.afg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4421) analog_loop_proc_hook(buffer, codec, 0xfa0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4424) static void stac9205_proc_hook(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4425) struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4427) if (nid == codec->core.afg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4428) analog_loop_proc_hook(buffer, codec, 0xfe0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4431) static void stac927x_proc_hook(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4432) struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4434) if (nid == codec->core.afg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4435) analog_loop_proc_hook(buffer, codec, 0xfeb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4437) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4438) #define stac92hd_proc_hook NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4439) #define stac92hd7x_proc_hook NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4440) #define stac9205_proc_hook NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4441) #define stac927x_proc_hook NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4442) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4444) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4445) static int stac_suspend(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4447) stac_shutup(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4448) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4450) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4451) #define stac_suspend NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4452) #endif /* CONFIG_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4454) static const struct hda_codec_ops stac_patch_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4455) .build_controls = snd_hda_gen_build_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4456) .build_pcms = snd_hda_gen_build_pcms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4457) .init = stac_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4458) .free = stac_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4459) .unsol_event = snd_hda_jack_unsol_event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4460) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4461) .suspend = stac_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4462) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4463) .reboot_notify = stac_shutup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4464) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4466) static int alloc_stac_spec(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4468) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4470) spec = kzalloc(sizeof(*spec), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4471) if (!spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4472) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4473) snd_hda_gen_spec_init(&spec->gen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4474) codec->spec = spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4475) codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4476) spec->gen.dac_min_mute = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4477) codec->patch_ops = stac_patch_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4478) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4481) static int patch_stac9200(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4483) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4484) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4486) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4487) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4488) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4490) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4491) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4492) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4494) codec->power_filter = snd_hda_codec_eapd_power_filter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4496) snd_hda_add_verbs(codec, stac9200_eapd_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4498) snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4499) stac9200_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4500) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4502) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4503) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4504) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4505) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4508) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4510) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4513) static int patch_stac925x(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4515) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4516) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4518) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4519) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4520) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4522) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4523) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4524) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4526) snd_hda_add_verbs(codec, stac925x_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4528) snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4529) stac925x_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4530) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4532) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4533) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4534) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4535) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4538) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4540) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4543) static int patch_stac92hd73xx(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4545) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4546) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4547) int num_dacs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4549) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4550) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4551) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4553) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4554) /* enable power_save_node only for new 92HD89xx chips, as it causes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4555) * click noises on old 92HD73xx chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4556) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4557) if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4558) codec->power_save_node = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4559) spec->linear_tone_beep = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4560) spec->gen.mixer_nid = 0x1d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4561) spec->have_spdif_mux = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4563) num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4564) if (num_dacs < 3 || num_dacs > 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4565) codec_warn(codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4566) "Could not determine number of channels defaulting to DAC count\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4567) num_dacs = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4570) switch (num_dacs) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4571) case 0x3: /* 6 Channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4572) spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4573) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4574) case 0x4: /* 8 Channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4575) spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4576) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4577) case 0x5: /* 10 Channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4578) spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4582) spec->aloopback_mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4583) spec->aloopback_shift = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4585) spec->gen.beep_nid = 0x1c; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4587) /* GPIO0 High = Enable EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4588) spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4589) spec->gpio_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4591) spec->eapd_switch = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4593) spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4594) spec->pwr_nids = stac92hd73xx_pwr_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4596) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4597) spec->gen.power_down_unused = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4599) snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4600) stac92hd73xx_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4601) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4603) if (!spec->volknob_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4604) snd_hda_add_verbs(codec, stac92hd73xx_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4606) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4607) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4608) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4609) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4610) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4612) /* Don't GPIO-mute speakers if there are no internal speakers, because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4613) * the GPIO might be necessary for Headphone
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4614) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4615) if (spec->eapd_switch && !has_builtin_speaker(codec))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4616) spec->eapd_switch = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4618) codec->proc_widget_hook = stac92hd7x_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4620) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4622) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4625) static void stac_setup_gpio(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4627) struct sigmatel_spec *spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4629) spec->gpio_mask |= spec->eapd_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4630) if (spec->gpio_led) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4631) if (!spec->vref_mute_led_nid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4632) spec->gpio_mask |= spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4633) spec->gpio_dir |= spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4634) spec->gpio_data |= spec->gpio_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4635) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4636) codec->power_filter = stac_vref_led_power_filter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4638) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4640) if (spec->mic_mute_led_gpio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4641) spec->gpio_mask |= spec->mic_mute_led_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4642) spec->gpio_dir |= spec->mic_mute_led_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4643) spec->mic_enabled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4644) spec->gpio_data |= spec->mic_mute_led_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4645) snd_hda_gen_add_micmute_led_cdev(codec, stac_capture_led_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4649) static int patch_stac92hd83xxx(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4650) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4651) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4652) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4654) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4655) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4656) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4658) /* longer delay needed for D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4659) codec->core.power_caps &= ~AC_PWRST_EPSS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4661) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4662) codec->power_save_node = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4663) spec->linear_tone_beep = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4664) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4665) spec->gen.power_down_unused = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4666) spec->gen.mixer_nid = 0x1b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4668) spec->gen.beep_nid = 0x21; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4669) spec->pwr_nids = stac92hd83xxx_pwr_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4670) spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4671) spec->default_polarity = -1; /* no default cfg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4673) snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4675) snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4676) stac92hd83xxx_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4677) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4679) stac_setup_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4681) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4682) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4683) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4684) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4687) codec->proc_widget_hook = stac92hd_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4689) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4691) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4694) static const hda_nid_t stac92hd95_pwr_nids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4695) 0x0a, 0x0b, 0x0c, 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4696) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4698) static int patch_stac92hd95(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4699) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4700) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4701) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4703) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4704) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4705) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4707) /* longer delay needed for D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4708) codec->core.power_caps &= ~AC_PWRST_EPSS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4710) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4711) codec->power_save_node = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4712) spec->linear_tone_beep = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4713) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4714) spec->gen.power_down_unused = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4716) spec->gen.beep_nid = 0x19; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4717) spec->pwr_nids = stac92hd95_pwr_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4718) spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4719) spec->default_polarity = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4721) snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4722) stac92hd95_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4723) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4725) stac_setup_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4727) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4728) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4729) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4730) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4731) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4732)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4733) codec->proc_widget_hook = stac92hd_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4735) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4737) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4740) static int patch_stac92hd71bxx(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4741) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4742) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4743) const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4744) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4746) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4747) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4748) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4749)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4750) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4751) /* disabled power_save_node since it causes noises on a Dell machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4752) /* codec->power_save_node = 1; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4753) spec->linear_tone_beep = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4754) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4755) spec->gen.power_down_unused = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4756) spec->gen.mixer_nid = 0x17;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4757) spec->have_spdif_mux = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4759) /* GPIO0 = EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4760) spec->gpio_mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4761) spec->gpio_dir = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4762) spec->gpio_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4764) switch (codec->core.vendor_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4765) case 0x111d76b6: /* 4 Port without Analog Mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4766) case 0x111d76b7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4767) unmute_nids++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4768) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4769) case 0x111d7608: /* 5 Port with Analog Mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4770) if ((codec->core.revision_id & 0xf) == 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4771) (codec->core.revision_id & 0xf) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4772) spec->stream_delay = 40; /* 40 milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4774) /* disable VSW */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4775) unmute_nids++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4776) snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4777) snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4778) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4779) case 0x111d7603: /* 6 Port with Analog Mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4780) if ((codec->core.revision_id & 0xf) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4781) spec->stream_delay = 40; /* 40 milliseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4783) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4784) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4786) if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4787) snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4789) if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4790) const hda_nid_t *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4791) for (p = unmute_nids; *p; p++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4792) snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4793) 0xff, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4794) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4796) spec->aloopback_ctl = &stac92hd71bxx_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4797) spec->aloopback_mask = 0x50;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4798) spec->aloopback_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4800) spec->powerdown_adcs = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4801) spec->gen.beep_nid = 0x26; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4802) spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4803) spec->pwr_nids = stac92hd71bxx_pwr_nids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4805) snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4806) stac92hd71bxx_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4807) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4809) stac_setup_gpio(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4811) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4812) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4813) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4814) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4817) codec->proc_widget_hook = stac92hd7x_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4819) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4821) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4824) static int patch_stac922x(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4825) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4826) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4827) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4829) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4830) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4831) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4833) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4834) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4835) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4837) snd_hda_add_verbs(codec, stac922x_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4839) /* Fix Mux capture level; max to 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4840) snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4841) (0 << AC_AMPCAP_OFFSET_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4842) (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4843) (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4844) (0 << AC_AMPCAP_MUTE_SHIFT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4846) snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4847) stac922x_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4848) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4850) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4851) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4852) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4853) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4856) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4858) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4861) static const char * const stac927x_spdif_labels[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4862) "Digital Playback", "ADAT", "Analog Mux 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4863) "Analog Mux 2", "Analog Mux 3", NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4864) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4866) static int patch_stac927x(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4867) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4868) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4869) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4871) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4872) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4873) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4875) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4876) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4877) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4878) spec->have_spdif_mux = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4879) spec->spdif_labels = stac927x_spdif_labels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4881) spec->gen.beep_nid = 0x23; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4883) /* GPIO0 High = Enable EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4884) spec->eapd_mask = spec->gpio_mask = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4885) spec->gpio_dir = spec->gpio_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4887) spec->aloopback_ctl = &stac927x_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4888) spec->aloopback_mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4889) spec->aloopback_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4890) spec->eapd_switch = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4892) snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4893) stac927x_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4894) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4896) if (!spec->volknob_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4897) snd_hda_add_verbs(codec, stac927x_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4899) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4900) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4901) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4902) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4903) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4905) codec->proc_widget_hook = stac927x_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4907) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4908) * !!FIXME!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4909) * The STAC927x seem to require fairly long delays for certain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4910) * command sequences. With too short delays (even if the answer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4911) * is set to RIRB properly), it results in the silence output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4912) * on some hardwares like Dell.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4913) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4914) * The below flag enables the longer delay (see get_response
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4915) * in hda_intel.c).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4916) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4917) codec->bus->core.needs_damn_long_delay = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4919) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4921) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4924) static int patch_stac9205(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4925) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4926) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4927) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4929) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4930) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4931) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4933) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4934) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4935) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4936) spec->have_spdif_mux = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4938) spec->gen.beep_nid = 0x23; /* digital beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4940) snd_hda_add_verbs(codec, stac9205_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4941) spec->aloopback_ctl = &stac9205_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4943) spec->aloopback_mask = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4944) spec->aloopback_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4946) /* GPIO0 High = EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4947) spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4948) spec->gpio_data = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4950) /* Turn on/off EAPD per HP plugging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4951) spec->eapd_switch = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4953) snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4954) stac9205_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4955) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4957) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4958) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4959) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4960) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4963) codec->proc_widget_hook = stac9205_proc_hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4965) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4967) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4970) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4971) * STAC9872 hack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4972) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4974) static const struct hda_verb stac9872_core_init[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4975) {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4976) {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4977) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4978) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4980) static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4981) { 0x0a, 0x03211020 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4982) { 0x0b, 0x411111f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4983) { 0x0c, 0x411111f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4984) { 0x0d, 0x03a15030 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4985) { 0x0e, 0x411111f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4986) { 0x0f, 0x90170110 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4987) { 0x11, 0x411111f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4988) { 0x13, 0x411111f0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4989) { 0x14, 0x90a7013e },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4990) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4991) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4993) static const struct hda_model_fixup stac9872_models[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4994) { .id = STAC_9872_VAIO, .name = "vaio" },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4995) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4996) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4998) static const struct hda_fixup stac9872_fixups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4999) [STAC_9872_VAIO] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5000) .type = HDA_FIXUP_PINS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5001) .v.pins = stac9872_vaio_pin_configs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5002) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5003) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5005) static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5006) SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5007) "Sony VAIO F/S", STAC_9872_VAIO),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5008) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5009) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5011) static int patch_stac9872(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5012) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5013) struct sigmatel_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5014) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5016) err = alloc_stac_spec(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5017) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5018) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5020) spec = codec->spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5021) spec->linear_tone_beep = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5022) spec->gen.own_eapd_ctl = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5024) snd_hda_add_verbs(codec, stac9872_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5026) snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5027) stac9872_fixups);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5028) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5030) err = stac_parse_auto_config(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5031) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5032) stac_free(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5033) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5036) snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5038) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5039) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5042) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5043) * patch entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5044) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5045) static const struct hda_device_id snd_hda_id_sigmatel[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5046) HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5047) HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5048) HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5049) HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5050) HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5051) HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5052) HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5053) HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5054) HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5055) HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5056) HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5057) HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5058) HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5059) HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5060) HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5061) HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5062) HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5063) HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5064) HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5065) HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5066) HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5067) HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5068) HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5069) HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5070) HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5071) HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5072) HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5073) HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5074) HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5075) HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5076) HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5077) HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5078) /* The following does not take into account .id=0x83847661 when subsys =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5079) * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5080) * currently not fully supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5081) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5082) HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5083) HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5084) HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5085) HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5086) HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5087) HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5088) HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5089) HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5090) HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5091) HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5092) HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5093) HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5094) HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5095) HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5096) HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5097) HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5098) HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5099) HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5100) HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5101) HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5102) HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5103) HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5104) HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5105) HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5106) HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5107) HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5108) HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5109) HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5110) HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5111) HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5112) HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5113) HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5114) HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5115) HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5116) HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5117) HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5118) HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5119) HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5120) HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5121) HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5122) HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5123) HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5124) HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5125) HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5126) HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5127) HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5128) HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5129) HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5130) HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5131) HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5132) HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5133) HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5134) HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5135) HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5136) HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5137) HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5138) HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5139) HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5140) HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5141) HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5142) HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5143) HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5144) HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5145) HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5146) HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5147) HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5148) HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5149) HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5150) {} /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5151) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5152) MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5154) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5155) MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5157) static struct hda_codec_driver sigmatel_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5158) .id = snd_hda_id_sigmatel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5161) module_hda_codec_driver(sigmatel_driver);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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