Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Copyright (c) by Lee Revell <rlrevell@joe-job.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *                   Clemens Ladisch <clemens@ladisch.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Routines for control of EMU10K1 chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  BUGS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *    --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *  TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *    --
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/time.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/emu10k1.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static int snd_emu10k1_timer_start(struct snd_timer *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	struct snd_emu10k1 *emu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	unsigned int delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	emu = snd_timer_chip(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	delay = timer->sticks - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	if (delay < 5 ) /* minimum time is 5 ticks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		delay = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	spin_lock_irqsave(&emu->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	snd_emu10k1_intr_enable(emu, INTE_INTERVALTIMERENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	outw(delay & TIMER_RATE_MASK, emu->port + TIMER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	spin_unlock_irqrestore(&emu->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int snd_emu10k1_timer_stop(struct snd_timer *timer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct snd_emu10k1 *emu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	emu = snd_timer_chip(timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	spin_lock_irqsave(&emu->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	snd_emu10k1_intr_disable(emu, INTE_INTERVALTIMERENB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	spin_unlock_irqrestore(&emu->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int snd_emu10k1_timer_precise_resolution(struct snd_timer *timer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 					       unsigned long *num, unsigned long *den)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	*num = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	*den = 48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct snd_timer_hardware snd_emu10k1_timer_hw = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	.flags = SNDRV_TIMER_HW_AUTO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	.resolution = 20833, /* 1 sample @ 48KHZ = 20.833...us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	.ticks = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	.start = snd_emu10k1_timer_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	.stop = snd_emu10k1_timer_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	.precise_resolution = snd_emu10k1_timer_precise_resolution,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int snd_emu10k1_timer(struct snd_emu10k1 *emu, int device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	struct snd_timer *timer = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	struct snd_timer_id tid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	tid.dev_class = SNDRV_TIMER_CLASS_CARD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	tid.card = emu->card->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	tid.device = device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	tid.subdevice = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	if ((err = snd_timer_new(emu->card, "EMU10K1", &tid, &timer)) >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		strcpy(timer->name, "EMU10K1 timer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 		timer->private_data = emu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 		timer->hw = snd_emu10k1_timer_hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	emu->timer = timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }