^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Copyright Echo Digital Audio Corporation (c) 1998 - 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) All rights reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) www.echoaudio.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) This file is part of Echo Digital Audio's generic driver library.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Echo Digital Audio's generic driver library is free software;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) you can redistribute it and/or modify it under the terms of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) the GNU General Public License as published by the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) This program is distributed in the hope that it will be useful,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) but WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) GNU General Public License for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) along with this program; if not, write to the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Foundation, Inc., 59 Temple Place - Suite 330, Boston,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MA 02111-1307, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Translation from C++ and adaptation for use in ALSA-Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) were made by Giuliano Pochini <pochini@shiny.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int load_asic(struct echoaudio *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static int set_digital_mode(struct echoaudio *chip, u8 mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static int check_asic_status(struct echoaudio *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int set_sample_rate(struct echoaudio *chip, u32 rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int set_input_clock(struct echoaudio *chip, u16 clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int set_professional_spdif(struct echoaudio *chip, char prof);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int set_phantom_power(struct echoaudio *chip, char on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static int write_control_reg(struct echoaudio *chip, u32 ctl, u32 frq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) char force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (snd_BUG_ON((subdevice_id & 0xfff0) != ECHO3G))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if ((err = init_dsp_comm_page(chip))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) dev_err(chip->card->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) "init_hw - could not initialize DSP comm page\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) chip->comm_page->e3g_frq_register =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) cpu_to_le32((E3G_MAGIC_NUMBER / 48000) - 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) chip->device_id = device_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) chip->subdevice_id = subdevice_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) chip->bad_board = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) chip->has_midi = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) chip->dsp_code_to_load = FW_ECHO3G_DSP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Load the DSP code and the ASIC on the PCI card and get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) what type of external box is attached */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) err = load_firmware(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) } else if (err == E3G_GINA3G_BOX_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ECHO_CLOCK_BIT_SPDIF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ECHO_CLOCK_BIT_ADAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) chip->card_name = "Gina3G";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) chip->px_digital_out = chip->bx_digital_out = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) chip->px_analog_in = chip->bx_analog_in = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) chip->px_digital_in = chip->bx_digital_in = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) chip->px_num = chip->bx_num = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) chip->has_phantom_power = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) chip->hasnt_input_nominal_level = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) } else if (err == E3G_LAYLA3G_BOX_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ECHO_CLOCK_BIT_SPDIF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ECHO_CLOCK_BIT_ADAT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) ECHO_CLOCK_BIT_WORD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) chip->card_name = "Layla3G";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) chip->px_digital_out = chip->bx_digital_out = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) chip->px_analog_in = chip->bx_analog_in = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) chip->px_digital_in = chip->bx_digital_in = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) chip->px_num = chip->bx_num = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) chip->digital_modes = ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_RCA |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ECHOCAPS_HAS_DIGITAL_MODE_SPDIF_OPTICAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ECHOCAPS_HAS_DIGITAL_MODE_ADAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int set_mixer_defaults(struct echoaudio *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) chip->professional_spdif = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) chip->non_audio_spdif = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) chip->bad_board = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) chip->phantom_power = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return init_line_levels(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int set_phantom_power(struct echoaudio *chip, char on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u32 control_reg = le32_to_cpu(chip->comm_page->control_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) control_reg |= E3G_PHANTOM_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) control_reg &= ~E3G_PHANTOM_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) chip->phantom_power = on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return write_control_reg(chip, control_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) le32_to_cpu(chip->comm_page->e3g_frq_register),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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