^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * @File ctatc.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * @Brief
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This file contains the definition of the device resource management object.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * @Author Liu Chun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * @Date Mar 28 2008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef CTATC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CTATC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "ctvmem.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "cthardware.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "ctresource.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum CTALSADEVS { /* Types of alsa devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) FRONT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SURROUND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) CLFE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) SIDE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) IEC958,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) NUM_CTALSADEVS /* This should always be the last */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct ct_atc_chip_sub_details {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u16 subsys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) const char *nm_model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct ct_atc_chip_details {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u16 vendor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u16 device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const struct ct_atc_chip_sub_details *sub_details;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) const char *nm_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct ct_atc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct ct_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct ct_timer_instance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* alsa pcm stream descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct ct_atc_pcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct snd_pcm_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void (*interrupt)(struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) struct ct_timer_instance *timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned int started:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Only mono and interleaved modes are supported now. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct ct_vm_block *vm_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void *src; /* SRC for interacting with host memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void **srccs; /* SRCs for sample rate conversion */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) void **srcimps; /* SRC Input Mappers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) void **amixers; /* AMIXERs for routing converted data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void *mono; /* A SUM resource for mixing chs to one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned char n_srcc; /* Number of converting SRCs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned char n_srcimp; /* Number of SRC Input Mappers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned char n_amixer; /* Number of AMIXERs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Chip resource management object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct ct_atc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned int rsr; /* reference sample rate in Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int msr; /* master sample rate in rsr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned int pll_rate; /* current rate of Phase Lock Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) int chip_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) int model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const char *chip_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) const char *model_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct ct_vm *vm; /* device virtual memory manager for this card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int (*map_audio_buffer)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) void (*unmap_audio_buffer)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned long (*get_ptp_phys)(struct ct_atc *atc, int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct mutex atc_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) int (*pcm_playback_prepare)(struct ct_atc *atc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int (*pcm_playback_start)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int (*pcm_playback_stop)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int (*pcm_playback_position)(struct ct_atc *atc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int (*spdif_passthru_playback_prepare)(struct ct_atc *atc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int (*pcm_capture_prepare)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int (*pcm_capture_start)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int (*pcm_capture_stop)(struct ct_atc *atc, struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int (*pcm_capture_position)(struct ct_atc *atc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int (*pcm_release_resources)(struct ct_atc *atc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct ct_atc_pcm *apcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int (*select_line_in)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) int (*select_mic_in)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int (*select_digit_io)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int (*line_front_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int (*line_surround_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int (*line_clfe_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int (*line_rear_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int (*line_in_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int (*mic_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int (*spdif_out_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int (*spdif_in_unmute)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int (*spdif_out_get_status)(struct ct_atc *atc, unsigned int *status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int (*spdif_out_set_status)(struct ct_atc *atc, unsigned int status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int (*spdif_out_passthru)(struct ct_atc *atc, unsigned char state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct capabilities (*capabilities)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int (*output_switch_get)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int (*output_switch_put)(struct ct_atc *atc, int position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int (*mic_source_switch_get)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int (*mic_source_switch_put)(struct ct_atc *atc, int position);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Don't touch! Used for internal object. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) void *rsc_mgrs[NUM_RSCTYP]; /* chip resource managers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) void *mixer; /* internal mixer object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct hw *hw; /* chip specific hardware access object */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) void **daios; /* digital audio io resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) void **pcm; /* SUMs for collecting all pcm stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) void **srcs; /* Sample Rate Converters for input signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) void **srcimps; /* input mappers for SRCs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned char n_daio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned char n_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned char n_srcimp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned char n_pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct ct_timer *timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int (*suspend)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int (*resume)(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define NUM_PCMS (NUM_CTALSADEVS - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct snd_pcm *pcms[NUM_PCMS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int ct_atc_create(struct snd_card *card, struct pci_dev *pci,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned int rsr, unsigned int msr, int chip_type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned int subsysid, struct ct_atc **ratc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int ct_atc_create_alsa_devs(struct ct_atc *atc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif /* CTATC_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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