^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) AudioScience HPI driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Copyright (C) 1997-2012 AudioScience Inc. <support@audioscience.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) HPI internal definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) (C) Copyright AudioScience Inc. 1996-2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifndef _HPI_INTERNAL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define _HPI_INTERNAL_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "hpi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /** maximum number of memory regions mapped to an adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define HPI_MAX_ADAPTER_MEM_SPACES (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Each OS needs its own hpios.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "hpios.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* physical memory allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /** Allocate and map an area of locked memory for bus master DMA operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) On success, *pLockedMemeHandle is a valid handle, and 0 is returned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) On error *pLockedMemHandle marked invalid, non-zero returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) If this function succeeds, then HpiOs_LockedMem_GetVirtAddr() and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) HpiOs_LockedMem_GetPyhsAddr() will always succed on the returned handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u16 hpios_locked_mem_alloc(struct consistent_dma_area *p_locked_mem_handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /**< memory handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 size, /**< Size in bytes to allocate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct pci_dev *p_os_reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /**< OS specific data required for memory allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /** Free mapping and memory represented by LockedMemHandle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Frees any resources, then invalidates the handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) Returns 0 on success, 1 if handle is invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u16 hpios_locked_mem_free(struct consistent_dma_area *locked_mem_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /** Get the physical PCI address of memory represented by LockedMemHandle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) If handle is invalid *pPhysicalAddr is set to zero and return 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u16 hpios_locked_mem_get_phys_addr(struct consistent_dma_area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) *locked_mem_handle, u32 *p_physical_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /** Get the CPU address of memory represented by LockedMemHandle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) If handle is NULL *ppvVirtualAddr is set to NULL and return 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u16 hpios_locked_mem_get_virt_addr(struct consistent_dma_area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *locked_mem_handle, void **ppv_virtual_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /** Check that handle is valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) i.e it represents a valid memory area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u16 hpios_locked_mem_valid(struct consistent_dma_area *locked_mem_handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* timing/delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void hpios_delay_micro_seconds(u32 num_micro_sec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct hpi_message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct hpi_response;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) typedef void hpi_handler_func(struct hpi_message *, struct hpi_response *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* If the assert fails, compiler complains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) something like size of array `msg' is negative.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) Unlike linux BUILD_BUG_ON, this works outside function scope.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define compile_time_assert(cond, msg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) typedef char ASSERT_##msg[(cond) ? 1 : -1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /******************************************* bus types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) enum HPI_BUSES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) HPI_BUS_ISAPNP = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) HPI_BUS_PCI = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) HPI_BUS_USB = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) HPI_BUS_NET = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) enum HPI_SUBSYS_OPTIONS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* 0, 256 are invalid, 1..255 reserved for global options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) HPI_SUBSYS_OPT_NET_ENABLE = 257,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) HPI_SUBSYS_OPT_NET_BROADCAST = 258,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) HPI_SUBSYS_OPT_NET_UNICAST = 259,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) HPI_SUBSYS_OPT_NET_ADDR = 260,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) HPI_SUBSYS_OPT_NET_MASK = 261,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) HPI_SUBSYS_OPT_NET_ADAPTER_ADDRESS_ADD = 262
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /** Volume flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) enum HPI_VOLUME_FLAGS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /** Set if the volume control is muted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) HPI_VOLUME_FLAG_MUTED = (1 << 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /** Set if the volume control has a mute function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) HPI_VOLUME_FLAG_HAS_MUTE = (1 << 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /** Set if volume control can do autofading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) HPI_VOLUME_FLAG_HAS_AUTOFADE = (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* Note Flags >= (1<<8) are for DSP internal use only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /******************************************* CONTROL ATTRIBUTES ****/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* (in order of control type ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* This allows for 255 control types, 256 unique attributes each */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define HPI_CTL_ATTR(ctl, ai) ((HPI_CONTROL_##ctl << 8) + ai)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Get the sub-index of the attribute for a control type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define HPI_CTL_ATTR_INDEX(i) (i & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* Extract the control from the control attribute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define HPI_CTL_ATTR_CONTROL(i) (i >> 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /** Enable event generation for a control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 0=disable, 1=enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) \note generic to all controls that can generate events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /** Unique identifiers for every control attribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) enum HPI_CONTROL_ATTRIBUTES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) HPI_GENERIC_ENABLE = HPI_CTL_ATTR(GENERIC, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) HPI_GENERIC_EVENT_ENABLE = HPI_CTL_ATTR(GENERIC, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) HPI_VOLUME_GAIN = HPI_CTL_ATTR(VOLUME, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) HPI_VOLUME_AUTOFADE = HPI_CTL_ATTR(VOLUME, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) HPI_VOLUME_MUTE = HPI_CTL_ATTR(VOLUME, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) HPI_VOLUME_GAIN_AND_FLAGS = HPI_CTL_ATTR(VOLUME, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) HPI_VOLUME_NUM_CHANNELS = HPI_CTL_ATTR(VOLUME, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) HPI_VOLUME_RANGE = HPI_CTL_ATTR(VOLUME, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) HPI_METER_RMS = HPI_CTL_ATTR(METER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) HPI_METER_PEAK = HPI_CTL_ATTR(METER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) HPI_METER_RMS_BALLISTICS = HPI_CTL_ATTR(METER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) HPI_METER_PEAK_BALLISTICS = HPI_CTL_ATTR(METER, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) HPI_METER_NUM_CHANNELS = HPI_CTL_ATTR(METER, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) HPI_MULTIPLEXER_SOURCE = HPI_CTL_ATTR(MULTIPLEXER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) HPI_MULTIPLEXER_QUERYSOURCE = HPI_CTL_ATTR(MULTIPLEXER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) HPI_AESEBUTX_FORMAT = HPI_CTL_ATTR(AESEBUTX, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) HPI_AESEBUTX_SAMPLERATE = HPI_CTL_ATTR(AESEBUTX, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) HPI_AESEBUTX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBUTX, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) HPI_AESEBUTX_USERDATA = HPI_CTL_ATTR(AESEBUTX, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) HPI_AESEBURX_FORMAT = HPI_CTL_ATTR(AESEBURX, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) HPI_AESEBURX_ERRORSTATUS = HPI_CTL_ATTR(AESEBURX, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) HPI_AESEBURX_SAMPLERATE = HPI_CTL_ATTR(AESEBURX, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) HPI_AESEBURX_CHANNELSTATUS = HPI_CTL_ATTR(AESEBURX, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) HPI_AESEBURX_USERDATA = HPI_CTL_ATTR(AESEBURX, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) HPI_LEVEL_GAIN = HPI_CTL_ATTR(LEVEL, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) HPI_LEVEL_RANGE = HPI_CTL_ATTR(LEVEL, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) HPI_TUNER_BAND = HPI_CTL_ATTR(TUNER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) HPI_TUNER_FREQ = HPI_CTL_ATTR(TUNER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) HPI_TUNER_LEVEL_AVG = HPI_CTL_ATTR(TUNER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) HPI_TUNER_LEVEL_RAW = HPI_CTL_ATTR(TUNER, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) HPI_TUNER_SNR = HPI_CTL_ATTR(TUNER, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) HPI_TUNER_GAIN = HPI_CTL_ATTR(TUNER, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) HPI_TUNER_STATUS = HPI_CTL_ATTR(TUNER, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) HPI_TUNER_MODE = HPI_CTL_ATTR(TUNER, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) HPI_TUNER_RDS = HPI_CTL_ATTR(TUNER, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) HPI_TUNER_DEEMPHASIS = HPI_CTL_ATTR(TUNER, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) HPI_TUNER_PROGRAM = HPI_CTL_ATTR(TUNER, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) HPI_TUNER_HDRADIO_SIGNAL_QUALITY = HPI_CTL_ATTR(TUNER, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) HPI_TUNER_HDRADIO_SDK_VERSION = HPI_CTL_ATTR(TUNER, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) HPI_TUNER_HDRADIO_DSP_VERSION = HPI_CTL_ATTR(TUNER, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) HPI_TUNER_HDRADIO_BLEND = HPI_CTL_ATTR(TUNER, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) HPI_VOX_THRESHOLD = HPI_CTL_ATTR(VOX, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) HPI_CHANNEL_MODE_MODE = HPI_CTL_ATTR(CHANNEL_MODE, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) HPI_BITSTREAM_DATA_POLARITY = HPI_CTL_ATTR(BITSTREAM, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) HPI_BITSTREAM_CLOCK_EDGE = HPI_CTL_ATTR(BITSTREAM, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) HPI_BITSTREAM_CLOCK_SOURCE = HPI_CTL_ATTR(BITSTREAM, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) HPI_BITSTREAM_ACTIVITY = HPI_CTL_ATTR(BITSTREAM, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) HPI_SAMPLECLOCK_SOURCE = HPI_CTL_ATTR(SAMPLECLOCK, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) HPI_SAMPLECLOCK_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) HPI_SAMPLECLOCK_SOURCE_INDEX = HPI_CTL_ATTR(SAMPLECLOCK, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) HPI_SAMPLECLOCK_LOCAL_SAMPLERATE = HPI_CTL_ATTR(SAMPLECLOCK, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) HPI_SAMPLECLOCK_AUTO = HPI_CTL_ATTR(SAMPLECLOCK, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) HPI_SAMPLECLOCK_LOCAL_LOCK = HPI_CTL_ATTR(SAMPLECLOCK, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) HPI_MICROPHONE_PHANTOM_POWER = HPI_CTL_ATTR(MICROPHONE, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) HPI_EQUALIZER_NUM_FILTERS = HPI_CTL_ATTR(EQUALIZER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) HPI_EQUALIZER_FILTER = HPI_CTL_ATTR(EQUALIZER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) HPI_EQUALIZER_COEFFICIENTS = HPI_CTL_ATTR(EQUALIZER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) HPI_COMPANDER_PARAMS = HPI_CTL_ATTR(COMPANDER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) HPI_COMPANDER_MAKEUPGAIN = HPI_CTL_ATTR(COMPANDER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) HPI_COMPANDER_THRESHOLD = HPI_CTL_ATTR(COMPANDER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) HPI_COMPANDER_RATIO = HPI_CTL_ATTR(COMPANDER, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) HPI_COMPANDER_ATTACK = HPI_CTL_ATTR(COMPANDER, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) HPI_COMPANDER_DECAY = HPI_CTL_ATTR(COMPANDER, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) HPI_COBRANET_SET = HPI_CTL_ATTR(COBRANET, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) HPI_COBRANET_GET = HPI_CTL_ATTR(COBRANET, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) HPI_COBRANET_GET_STATUS = HPI_CTL_ATTR(COBRANET, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) HPI_COBRANET_SEND_PACKET = HPI_CTL_ATTR(COBRANET, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) HPI_COBRANET_GET_PACKET = HPI_CTL_ATTR(COBRANET, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) HPI_TONEDETECTOR_THRESHOLD = HPI_CTL_ATTR(TONEDETECTOR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) HPI_TONEDETECTOR_STATE = HPI_CTL_ATTR(TONEDETECTOR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) HPI_TONEDETECTOR_FREQUENCY = HPI_CTL_ATTR(TONEDETECTOR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) HPI_SILENCEDETECTOR_THRESHOLD = HPI_CTL_ATTR(SILENCEDETECTOR, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) HPI_SILENCEDETECTOR_STATE = HPI_CTL_ATTR(SILENCEDETECTOR, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) HPI_SILENCEDETECTOR_DELAY = HPI_CTL_ATTR(SILENCEDETECTOR, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) HPI_PAD_CHANNEL_NAME = HPI_CTL_ATTR(PAD, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) HPI_PAD_ARTIST = HPI_CTL_ATTR(PAD, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) HPI_PAD_TITLE = HPI_CTL_ATTR(PAD, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) HPI_PAD_COMMENT = HPI_CTL_ATTR(PAD, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) HPI_PAD_PROGRAM_TYPE = HPI_CTL_ATTR(PAD, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) HPI_PAD_PROGRAM_ID = HPI_CTL_ATTR(PAD, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) HPI_PAD_TA_SUPPORT = HPI_CTL_ATTR(PAD, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) HPI_PAD_TA_ACTIVE = HPI_CTL_ATTR(PAD, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) HPI_UNIVERSAL_ENTITY = HPI_CTL_ATTR(UNIVERSAL, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define HPI_POLARITY_POSITIVE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define HPI_POLARITY_NEGATIVE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /*------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) Cobranet Chip Bridge - copied from HMI.H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define HPI_COBRANET_HMI_cobra_bridge 0x20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define HPI_COBRANET_HMI_cobra_bridge_tx_pkt_buf \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) (HPI_COBRANET_HMI_cobra_bridge + 0x1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #define HPI_COBRANET_HMI_cobra_bridge_rx_pkt_buf \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) (HPI_COBRANET_HMI_cobra_bridge + 0x2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #define HPI_COBRANET_HMI_cobra_if_table1 0x110000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #define HPI_COBRANET_HMI_cobra_if_phy_address \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) (HPI_COBRANET_HMI_cobra_if_table1 + 0xd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #define HPI_COBRANET_HMI_cobra_protocolIP 0x72000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) #define HPI_COBRANET_HMI_cobra_ip_mon_currentIP \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) (HPI_COBRANET_HMI_cobra_protocolIP + 0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) #define HPI_COBRANET_HMI_cobra_ip_mon_staticIP \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) (HPI_COBRANET_HMI_cobra_protocolIP + 0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #define HPI_COBRANET_HMI_cobra_sys 0x100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #define HPI_COBRANET_HMI_cobra_sys_desc \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) (HPI_COBRANET_HMI_cobra_sys + 0x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #define HPI_COBRANET_HMI_cobra_sys_objectID \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) (HPI_COBRANET_HMI_cobra_sys + 0x100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #define HPI_COBRANET_HMI_cobra_sys_contact \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) (HPI_COBRANET_HMI_cobra_sys + 0x200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #define HPI_COBRANET_HMI_cobra_sys_name \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) (HPI_COBRANET_HMI_cobra_sys + 0x300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #define HPI_COBRANET_HMI_cobra_sys_location \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) (HPI_COBRANET_HMI_cobra_sys + 0x400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) Cobranet Chip Status bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define HPI_COBRANET_HMI_STATUS_RXPACKET 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define HPI_COBRANET_HMI_STATUS_TXPACKET 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /*------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) Ethernet header size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define HPI_ETHERNET_HEADER_SIZE (16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* These defines are used to fill in protocol information for an Ethernet packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) sent using HMI on CS18102 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /** ID supplied by Cirrus for ASI packets. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #define HPI_ETHERNET_PACKET_ID 0x85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /** Simple packet - no special routing required */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) #define HPI_ETHERNET_PACKET_V1 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /** This packet must make its way to the host across the HPI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) #define HPI_ETHERNET_PACKET_HOSTED_VIA_HMI 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /** This packet must make its way to the host across the HPI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) #define HPI_ETHERNET_PACKET_HOSTED_VIA_HMI_V1 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /** This packet must make its way to the host across the HPI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define HPI_ETHERNET_PACKET_HOSTED_VIA_HPI 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /** This packet must make its way to the host across the HPI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) #define HPI_ETHERNET_PACKET_HOSTED_VIA_HPI_V1 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) #define HPI_ETHERNET_UDP_PORT 44600 /**< HPI UDP service */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /** Default network timeout in milli-seconds. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define HPI_ETHERNET_TIMEOUT_MS 500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /** Locked memory buffer alloc/free phases */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) enum HPI_BUFFER_CMDS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /** use one message to allocate or free physical memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) HPI_BUFFER_CMD_EXTERNAL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /** alloc physical memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) HPI_BUFFER_CMD_INTERNAL_ALLOC = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /** send physical memory address to adapter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) HPI_BUFFER_CMD_INTERNAL_GRANTADAPTER = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /** notify adapter to stop using physical buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) HPI_BUFFER_CMD_INTERNAL_REVOKEADAPTER = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /** free physical buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) HPI_BUFFER_CMD_INTERNAL_FREE = 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /******** HPI LOW LEVEL MESSAGES *******/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /** Pnp ids */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /** "ASI" - actual is "ASX" - need to change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define HPI_ID_ISAPNP_AUDIOSCIENCE 0x0669
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /** PCI vendor ID that AudioScience uses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) #define HPI_PCI_VENDOR_ID_AUDIOSCIENCE 0x175C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) /** PCI vendor ID that the DSP56301 has */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) #define HPI_PCI_VENDOR_ID_MOTOROLA 0x1057
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /** PCI vendor ID that TI uses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) #define HPI_PCI_VENDOR_ID_TI 0x104C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) #define HPI_PCI_DEV_ID_PCI2040 0xAC60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /** TI's C6205 PCI interface has this ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #define HPI_PCI_DEV_ID_DSP6205 0xA106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) #define HPI_USB_VENDOR_ID_AUDIOSCIENCE 0x1257
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define HPI_USB_W2K_TAG 0x57495341 /* "ASIW" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #define HPI_USB_LINUX_TAG 0x4C495341 /* "ASIL" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /** Invalid Adapter index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) Used in HPI messages that are not addressed to a specific adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) Used in DLL to indicate device not present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #define HPI_ADAPTER_INDEX_INVALID 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) /** First 2 hex digits define the adapter family */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #define HPI_ADAPTER_FAMILY_MASK 0xff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) #define HPI_MODULE_FAMILY_MASK 0xfff0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #define HPI_ADAPTER_FAMILY_ASI(f) (f & HPI_ADAPTER_FAMILY_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define HPI_MODULE_FAMILY_ASI(f) (f & HPI_MODULE_FAMILY_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) #define HPI_ADAPTER_ASI(f) (f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) enum HPI_MESSAGE_TYPES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) HPI_TYPE_REQUEST = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) HPI_TYPE_RESPONSE = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) HPI_TYPE_DATA = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) HPI_TYPE_SSX2BYPASS_MESSAGE = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) HPI_TYPE_COMMAND = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) HPI_TYPE_NOTIFICATION = 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) enum HPI_OBJECT_TYPES {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) HPI_OBJ_SUBSYSTEM = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) HPI_OBJ_ADAPTER = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) HPI_OBJ_OSTREAM = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) HPI_OBJ_ISTREAM = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) HPI_OBJ_MIXER = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) HPI_OBJ_NODE = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) HPI_OBJ_CONTROL = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) HPI_OBJ_NVMEMORY = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) HPI_OBJ_GPIO = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) HPI_OBJ_WATCHDOG = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) HPI_OBJ_CLOCK = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) HPI_OBJ_PROFILE = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* HPI_ OBJ_ CONTROLEX = 13, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) HPI_OBJ_ASYNCEVENT = 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define HPI_OBJ_MAXINDEX 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #define HPI_OBJ_FUNCTION_SPACING 0x100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #define HPI_FUNC_ID(obj, i) (HPI_OBJ_##obj * HPI_OBJ_FUNCTION_SPACING + i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) #define HPI_EXTRACT_INDEX(fn) (fn & 0xff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) enum HPI_FUNCTION_IDS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) HPI_SUBSYS_OPEN = HPI_FUNC_ID(SUBSYSTEM, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) HPI_SUBSYS_GET_VERSION = HPI_FUNC_ID(SUBSYSTEM, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) HPI_SUBSYS_GET_INFO = HPI_FUNC_ID(SUBSYSTEM, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) HPI_SUBSYS_CREATE_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) HPI_SUBSYS_CLOSE = HPI_FUNC_ID(SUBSYSTEM, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) HPI_SUBSYS_DRIVER_LOAD = HPI_FUNC_ID(SUBSYSTEM, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) HPI_SUBSYS_DRIVER_UNLOAD = HPI_FUNC_ID(SUBSYSTEM, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) HPI_SUBSYS_GET_NUM_ADAPTERS = HPI_FUNC_ID(SUBSYSTEM, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) HPI_SUBSYS_GET_ADAPTER = HPI_FUNC_ID(SUBSYSTEM, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) HPI_SUBSYS_SET_NETWORK_INTERFACE = HPI_FUNC_ID(SUBSYSTEM, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) HPI_SUBSYS_OPTION_INFO = HPI_FUNC_ID(SUBSYSTEM, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) HPI_SUBSYS_OPTION_GET = HPI_FUNC_ID(SUBSYSTEM, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) HPI_SUBSYS_OPTION_SET = HPI_FUNC_ID(SUBSYSTEM, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define HPI_SUBSYS_FUNCTION_COUNT 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) HPI_ADAPTER_OPEN = HPI_FUNC_ID(ADAPTER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) HPI_ADAPTER_CLOSE = HPI_FUNC_ID(ADAPTER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) HPI_ADAPTER_GET_INFO = HPI_FUNC_ID(ADAPTER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) HPI_ADAPTER_GET_ASSERT = HPI_FUNC_ID(ADAPTER, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) HPI_ADAPTER_TEST_ASSERT = HPI_FUNC_ID(ADAPTER, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) HPI_ADAPTER_SET_MODE = HPI_FUNC_ID(ADAPTER, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) HPI_ADAPTER_GET_MODE = HPI_FUNC_ID(ADAPTER, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) HPI_ADAPTER_ENABLE_CAPABILITY = HPI_FUNC_ID(ADAPTER, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) HPI_ADAPTER_SELFTEST = HPI_FUNC_ID(ADAPTER, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) HPI_ADAPTER_FIND_OBJECT = HPI_FUNC_ID(ADAPTER, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) HPI_ADAPTER_QUERY_FLASH = HPI_FUNC_ID(ADAPTER, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) HPI_ADAPTER_START_FLASH = HPI_FUNC_ID(ADAPTER, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) HPI_ADAPTER_PROGRAM_FLASH = HPI_FUNC_ID(ADAPTER, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) HPI_ADAPTER_SET_PROPERTY = HPI_FUNC_ID(ADAPTER, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) HPI_ADAPTER_GET_PROPERTY = HPI_FUNC_ID(ADAPTER, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) HPI_ADAPTER_ENUM_PROPERTY = HPI_FUNC_ID(ADAPTER, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) HPI_ADAPTER_MODULE_INFO = HPI_FUNC_ID(ADAPTER, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) HPI_ADAPTER_DEBUG_READ = HPI_FUNC_ID(ADAPTER, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) HPI_ADAPTER_IRQ_QUERY_AND_CLEAR = HPI_FUNC_ID(ADAPTER, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) HPI_ADAPTER_IRQ_CALLBACK = HPI_FUNC_ID(ADAPTER, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) HPI_ADAPTER_DELETE = HPI_FUNC_ID(ADAPTER, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) HPI_ADAPTER_READ_FLASH = HPI_FUNC_ID(ADAPTER, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) HPI_ADAPTER_END_FLASH = HPI_FUNC_ID(ADAPTER, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) HPI_ADAPTER_FILESTORE_DELETE_ALL = HPI_FUNC_ID(ADAPTER, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define HPI_ADAPTER_FUNCTION_COUNT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) HPI_OSTREAM_OPEN = HPI_FUNC_ID(OSTREAM, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) HPI_OSTREAM_CLOSE = HPI_FUNC_ID(OSTREAM, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) HPI_OSTREAM_WRITE = HPI_FUNC_ID(OSTREAM, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) HPI_OSTREAM_START = HPI_FUNC_ID(OSTREAM, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) HPI_OSTREAM_STOP = HPI_FUNC_ID(OSTREAM, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) HPI_OSTREAM_RESET = HPI_FUNC_ID(OSTREAM, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) HPI_OSTREAM_GET_INFO = HPI_FUNC_ID(OSTREAM, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) HPI_OSTREAM_QUERY_FORMAT = HPI_FUNC_ID(OSTREAM, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) HPI_OSTREAM_DATA = HPI_FUNC_ID(OSTREAM, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) HPI_OSTREAM_SET_VELOCITY = HPI_FUNC_ID(OSTREAM, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) HPI_OSTREAM_SET_PUNCHINOUT = HPI_FUNC_ID(OSTREAM, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) HPI_OSTREAM_SINEGEN = HPI_FUNC_ID(OSTREAM, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) HPI_OSTREAM_ANC_RESET = HPI_FUNC_ID(OSTREAM, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) HPI_OSTREAM_ANC_GET_INFO = HPI_FUNC_ID(OSTREAM, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) HPI_OSTREAM_ANC_READ = HPI_FUNC_ID(OSTREAM, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) HPI_OSTREAM_SET_TIMESCALE = HPI_FUNC_ID(OSTREAM, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) HPI_OSTREAM_SET_FORMAT = HPI_FUNC_ID(OSTREAM, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) HPI_OSTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(OSTREAM, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) HPI_OSTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(OSTREAM, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) HPI_OSTREAM_GROUP_ADD = HPI_FUNC_ID(OSTREAM, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) HPI_OSTREAM_GROUP_GETMAP = HPI_FUNC_ID(OSTREAM, 21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) HPI_OSTREAM_GROUP_RESET = HPI_FUNC_ID(OSTREAM, 22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) HPI_OSTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(OSTREAM, 23),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) HPI_OSTREAM_WAIT_START = HPI_FUNC_ID(OSTREAM, 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) HPI_OSTREAM_WAIT = HPI_FUNC_ID(OSTREAM, 25),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define HPI_OSTREAM_FUNCTION_COUNT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) HPI_ISTREAM_OPEN = HPI_FUNC_ID(ISTREAM, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) HPI_ISTREAM_CLOSE = HPI_FUNC_ID(ISTREAM, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) HPI_ISTREAM_SET_FORMAT = HPI_FUNC_ID(ISTREAM, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) HPI_ISTREAM_READ = HPI_FUNC_ID(ISTREAM, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) HPI_ISTREAM_START = HPI_FUNC_ID(ISTREAM, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) HPI_ISTREAM_STOP = HPI_FUNC_ID(ISTREAM, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) HPI_ISTREAM_RESET = HPI_FUNC_ID(ISTREAM, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) HPI_ISTREAM_GET_INFO = HPI_FUNC_ID(ISTREAM, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) HPI_ISTREAM_QUERY_FORMAT = HPI_FUNC_ID(ISTREAM, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) HPI_ISTREAM_ANC_RESET = HPI_FUNC_ID(ISTREAM, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) HPI_ISTREAM_ANC_GET_INFO = HPI_FUNC_ID(ISTREAM, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) HPI_ISTREAM_ANC_WRITE = HPI_FUNC_ID(ISTREAM, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) HPI_ISTREAM_HOSTBUFFER_ALLOC = HPI_FUNC_ID(ISTREAM, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) HPI_ISTREAM_HOSTBUFFER_FREE = HPI_FUNC_ID(ISTREAM, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) HPI_ISTREAM_GROUP_ADD = HPI_FUNC_ID(ISTREAM, 15),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) HPI_ISTREAM_GROUP_GETMAP = HPI_FUNC_ID(ISTREAM, 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) HPI_ISTREAM_GROUP_RESET = HPI_FUNC_ID(ISTREAM, 17),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) HPI_ISTREAM_HOSTBUFFER_GET_INFO = HPI_FUNC_ID(ISTREAM, 18),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) HPI_ISTREAM_WAIT_START = HPI_FUNC_ID(ISTREAM, 19),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) HPI_ISTREAM_WAIT = HPI_FUNC_ID(ISTREAM, 20),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) #define HPI_ISTREAM_FUNCTION_COUNT 20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* NOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) GET_NODE_INFO, SET_CONNECTION, GET_CONNECTIONS are not currently used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) HPI_MIXER_OPEN = HPI_FUNC_ID(MIXER, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) HPI_MIXER_CLOSE = HPI_FUNC_ID(MIXER, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) HPI_MIXER_GET_INFO = HPI_FUNC_ID(MIXER, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) HPI_MIXER_GET_NODE_INFO = HPI_FUNC_ID(MIXER, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) HPI_MIXER_GET_CONTROL = HPI_FUNC_ID(MIXER, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) HPI_MIXER_SET_CONNECTION = HPI_FUNC_ID(MIXER, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) HPI_MIXER_GET_CONNECTIONS = HPI_FUNC_ID(MIXER, 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) HPI_MIXER_GET_CONTROL_BY_INDEX = HPI_FUNC_ID(MIXER, 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) HPI_MIXER_GET_CONTROL_ARRAY_BY_INDEX = HPI_FUNC_ID(MIXER, 9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) HPI_MIXER_GET_CONTROL_MULTIPLE_VALUES = HPI_FUNC_ID(MIXER, 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) HPI_MIXER_STORE = HPI_FUNC_ID(MIXER, 11),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) HPI_MIXER_GET_CACHE_INFO = HPI_FUNC_ID(MIXER, 12),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) HPI_MIXER_GET_BLOCK_HANDLE = HPI_FUNC_ID(MIXER, 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) HPI_MIXER_GET_PARAMETER_HANDLE = HPI_FUNC_ID(MIXER, 14),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define HPI_MIXER_FUNCTION_COUNT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) HPI_CONTROL_GET_INFO = HPI_FUNC_ID(CONTROL, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) HPI_CONTROL_GET_STATE = HPI_FUNC_ID(CONTROL, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) HPI_CONTROL_SET_STATE = HPI_FUNC_ID(CONTROL, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #define HPI_CONTROL_FUNCTION_COUNT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) HPI_NVMEMORY_OPEN = HPI_FUNC_ID(NVMEMORY, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) HPI_NVMEMORY_READ_BYTE = HPI_FUNC_ID(NVMEMORY, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) HPI_NVMEMORY_WRITE_BYTE = HPI_FUNC_ID(NVMEMORY, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define HPI_NVMEMORY_FUNCTION_COUNT 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) HPI_GPIO_OPEN = HPI_FUNC_ID(GPIO, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) HPI_GPIO_READ_BIT = HPI_FUNC_ID(GPIO, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) HPI_GPIO_WRITE_BIT = HPI_FUNC_ID(GPIO, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) HPI_GPIO_READ_ALL = HPI_FUNC_ID(GPIO, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) HPI_GPIO_WRITE_STATUS = HPI_FUNC_ID(GPIO, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) #define HPI_GPIO_FUNCTION_COUNT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) HPI_ASYNCEVENT_OPEN = HPI_FUNC_ID(ASYNCEVENT, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) HPI_ASYNCEVENT_CLOSE = HPI_FUNC_ID(ASYNCEVENT, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) HPI_ASYNCEVENT_WAIT = HPI_FUNC_ID(ASYNCEVENT, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) HPI_ASYNCEVENT_GETCOUNT = HPI_FUNC_ID(ASYNCEVENT, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) HPI_ASYNCEVENT_GET = HPI_FUNC_ID(ASYNCEVENT, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) HPI_ASYNCEVENT_SENDEVENTS = HPI_FUNC_ID(ASYNCEVENT, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) #define HPI_ASYNCEVENT_FUNCTION_COUNT 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) HPI_WATCHDOG_OPEN = HPI_FUNC_ID(WATCHDOG, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) HPI_WATCHDOG_SET_TIME = HPI_FUNC_ID(WATCHDOG, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) HPI_WATCHDOG_PING = HPI_FUNC_ID(WATCHDOG, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) HPI_CLOCK_OPEN = HPI_FUNC_ID(CLOCK, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) HPI_CLOCK_SET_TIME = HPI_FUNC_ID(CLOCK, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) HPI_CLOCK_GET_TIME = HPI_FUNC_ID(CLOCK, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) HPI_PROFILE_OPEN_ALL = HPI_FUNC_ID(PROFILE, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) HPI_PROFILE_START_ALL = HPI_FUNC_ID(PROFILE, 2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) HPI_PROFILE_STOP_ALL = HPI_FUNC_ID(PROFILE, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) HPI_PROFILE_GET = HPI_FUNC_ID(PROFILE, 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) HPI_PROFILE_GET_IDLECOUNT = HPI_FUNC_ID(PROFILE, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) HPI_PROFILE_GET_NAME = HPI_FUNC_ID(PROFILE, 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) HPI_PROFILE_GET_UTILIZATION = HPI_FUNC_ID(PROFILE, 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #define HPI_PROFILE_FUNCTION_COUNT 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* ////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* STRUCTURES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) #ifndef DISABLE_PRAGMA_PACK1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) #pragma pack(push, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) /** PCI bus resource */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) struct hpi_pci {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) u32 __iomem *ap_mem_base[HPI_MAX_ADAPTER_MEM_SPACES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) struct pci_dev *pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /** Adapter specification resource */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct hpi_adapter_specification {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u32 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) u8 modules[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct hpi_resource {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) const struct hpi_pci *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) const char *net_if;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) struct hpi_adapter_specification adapter_spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) const void *sw_if;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) } r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) u16 bus_type; /* HPI_BUS_PNPISA, _PCI, _USB etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /** Format info used inside struct hpi_message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) Not the same as public API struct hpi_format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct hpi_msg_format {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) u32 sample_rate; /**< 11025, 32000, 44100 etc. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) u32 bit_rate; /**< for MPEG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) u32 attributes; /**< stereo/joint_stereo/mono */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) u16 channels; /**< 1,2..., (or ancillary mode or idle bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) u16 format; /**< HPI_FORMAT_PCM16, _MPEG etc. see \ref HPI_FORMATS. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /** Buffer+format structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) Must be kept 7 * 32 bits to match public struct hpi_datastruct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) struct hpi_msg_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) struct hpi_msg_format format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) u8 *pb_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) #ifndef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) u32 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) u32 data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) /** struct hpi_datastructure used up to 3.04 driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) struct hpi_data_legacy32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) struct hpi_format format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) u32 pb_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u32 data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) #ifdef CONFIG_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* Compatibility version of struct hpi_data*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) struct hpi_data_compat32 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) struct hpi_msg_format format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) u32 pb_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) u32 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u32 data_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) struct hpi_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /** placeholder for backward compatibility (see dwBufferSize) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct hpi_msg_format reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) u32 command; /**< HPI_BUFFER_CMD_xxx*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) u32 pci_address; /**< PCI physical address of buffer for DSP DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) u32 buffer_size; /**< must line up with data_size of HPI_DATA*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) /*/////////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* This is used for background buffer bus mastering stream buffers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) struct hpi_hostbuffer_status {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) u32 samples_processed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) u32 auxiliary_data_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) u32 stream_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* DSP index in to the host bus master buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) u32 dsp_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) /* Host index in to the host bus master buffer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) u32 host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) u32 size_in_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) struct hpi_streamid {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) u16 object_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /**< Type of object, HPI_OBJ_OSTREAM or HPI_OBJ_ISTREAM. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) u16 stream_index; /**< outstream or instream index. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) struct hpi_punchinout {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) u32 punch_in_sample;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) u32 punch_out_sample;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) struct hpi_subsys_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) struct hpi_resource resource;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) struct hpi_subsys_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) u32 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) u32 data; /* extended version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) u16 num_adapters;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) u16 adapter_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) u16 adapter_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) u16 pad16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) union hpi_adapterx_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) u32 dsp_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) u32 count_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) } debug_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) u32 adapter_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) u16 query_or_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) } mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u16 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) } module_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) u16 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) u16 what;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) u16 property_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) } property_enum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) u16 property;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) u16 parameter1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) u16 parameter2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) } property_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) u32 pad32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) u16 key1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) u16 key2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) } restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) u32 pad32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) u16 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) } test_assert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) u32 message;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) } irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) u32 pad[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct hpi_adapter_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) u32 serial_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) u16 adapter_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) u16 adapter_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) u16 num_instreams;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) u16 num_outstreams;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) u16 num_mixers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) u16 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) u8 sz_adapter_assert[HPI_STRING_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) union hpi_adapterx_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) struct hpi_adapter_res info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) u32 p1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) u16 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) u16 dsp_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) u32 p2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) u32 dsp_msg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) char sz_message[HPI_STRING_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) } assert;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) u32 adapter_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) } mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) u16 parameter1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) u16 parameter2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) } property_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) u32 yes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) } irq_query;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct hpi_stream_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) struct hpi_msg_data data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) struct hpi_data_legacy32 data32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) u16 velocity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct hpi_punchinout pio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) u32 time_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) struct hpi_buffer buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) struct hpi_streamid stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) u32 threshold_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) struct hpi_stream_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) /* size of hardware buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) u32 buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) /* OutStream - data to play,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) InStream - data recorded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) u32 data_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /* OutStream - samples played,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) InStream - samples recorded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) u32 samples_transferred;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) /* Adapter - OutStream - data to play,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) InStream - data recorded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) u32 auxiliary_data_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) u16 state; /* HPI_STATE_PLAYING, _STATE_STOPPED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) } stream_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) u32 buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) u32 data_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) u32 samples_transfered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) u16 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) u16 outstream_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) u16 instream_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) u32 auxiliary_data_available;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) } legacy_stream_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) /* bitmap of grouped OutStreams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) u32 outstream_group_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /* bitmap of grouped InStreams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) u32 instream_group_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) } group_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /* pointer to the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) u8 *p_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* pointer to the hostbuffer status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) struct hpi_hostbuffer_status *p_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) } hostbuffer_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) struct hpi_mixer_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) u16 control_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) u16 control_type; /* = HPI_CONTROL_METER _VOLUME etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) u16 padding1; /* Maintain alignment of subsequent fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) u16 node_type1; /* = HPI_SOURCENODE_LINEIN etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) u16 node_index1; /* = 0..N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) u16 node_type2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) u16 node_index2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) u16 padding2; /* round to 4 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) struct hpi_mixer_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) u16 src_node_type; /* = HPI_SOURCENODE_LINEIN etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) u16 src_node_index; /* = 0..N */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) u16 dst_node_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) u16 dst_node_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) /* Also controlType for MixerGetControlByIndex */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) u16 control_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) /* may indicate which DSP the control is located on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) u16 dsp_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) union hpi_mixerx_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) u16 starting_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) u16 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) u32 length_in_bytes; /* length in bytes of p_data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) u32 p_data; /* pointer to a data array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) } gcabi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) u16 command;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) u16 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) } store; /* for HPI_MIXER_STORE message */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) union hpi_mixerx_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) u32 bytes_returned; /* size of items returned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) u32 p_data; /* pointer to data array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) u16 more_to_do; /* indicates if there is more to do */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) } gcabi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) u32 total_controls; /* count of controls in the mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) u32 cache_controls; /* count of controls in the cac */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) u32 cache_bytes; /* size of cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) } cache_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) struct hpi_control_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) u16 attribute; /* control attribute or property */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) u16 saved_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) u32 param1; /* generic parameter 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) u32 param2; /* generic parameter 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) short an_log_value[HPI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) struct hpi_control_union_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) u16 attribute; /* control attribute or property */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) u16 saved_index; /* only used in ctrl save/restore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) u32 param1; /* generic parameter 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) u32 param2; /* generic parameter 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) short an_log_value[HPI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) } old;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) u32 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) u32 band;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) u32 deemphasis;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) u32 program;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) u32 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) u32 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) } mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) u32 blend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) } tuner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) struct hpi_control_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) /* Could make union. dwParam, anLogValue never used in same response */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) u32 param1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) u32 param2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) short an_log_value[HPI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) union hpi_control_union_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) u32 param1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) u32 param2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) short an_log_value[HPI_MAX_CHANNELS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) } old;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) u32 band;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) u32 frequency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) u32 gain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) u32 deemphasis;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) u32 data[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) u32 bLER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) } rds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) short s_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) u16 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) u16 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) } status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) } tuner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) char sz_data[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) u32 remaining_chars;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) } chars8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) char c_data12[12];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) u32 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) u32 readable_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) u32 writeable_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) } status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) } cobranet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct hpi_nvmemory_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) u16 address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) u16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) struct hpi_nvmemory_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) u16 size_in_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) u16 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) struct hpi_gpio_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) u16 bit_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) u16 bit_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) struct hpi_gpio_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) u16 number_input_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) u16 number_output_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) u16 bit_data[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct hpi_async_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) u32 events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) u16 maximum_events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) struct hpi_async_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) u16 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) } count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) u32 events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) u16 number_returned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) } get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) struct hpi_async_event event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) struct hpi_watchdog_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) u32 time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) struct hpi_watchdog_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) u32 time_ms;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) struct hpi_clock_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) u16 hours;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) u16 minutes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) u16 seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) u16 milli_seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) struct hpi_clock_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) u16 size_in_bytes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) u16 hours;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) u16 minutes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) u16 seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) u16 milli_seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) struct hpi_profile_msg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) u16 bin_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) struct hpi_profile_res_open {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) u16 max_profiles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) struct hpi_profile_res_time {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) u32 total_tick_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) u32 call_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u32 max_tick_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) u32 ticks_per_millisecond;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) u16 profile_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) struct hpi_profile_res_name {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) u8 sz_name[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) struct hpi_profile_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) struct hpi_profile_res_open o;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) struct hpi_profile_res_time t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct hpi_profile_res_name n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) struct hpi_message_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) u16 size; /* total size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) u8 type; /* HPI_TYPE_MESSAGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) u8 version; /* message version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) u16 object; /* HPI_OBJ_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) u16 function; /* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) u16 adapter_index; /* the adapter index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) u16 obj_index; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) struct hpi_message {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) /* following fields must match HPI_MESSAGE_HEADER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) u16 size; /* total size in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) u8 type; /* HPI_TYPE_MESSAGE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) u8 version; /* message version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) u16 object; /* HPI_OBJ_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) u16 function; /* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) u16 adapter_index; /* the adapter index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) u16 obj_index; /* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) struct hpi_subsys_msg s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) union hpi_adapterx_msg ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) struct hpi_stream_msg d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) struct hpi_mixer_msg m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) union hpi_mixerx_msg mx; /* extended mixer; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) struct hpi_control_msg c; /* mixer control; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) /* identical to struct hpi_control_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) but field naming is improved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) struct hpi_control_union_msg cu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct hpi_nvmemory_msg n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) struct hpi_gpio_msg l; /* digital i/o */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) struct hpi_watchdog_msg w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) struct hpi_clock_msg t; /* dsp time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) struct hpi_profile_msg p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) struct hpi_async_msg as;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) char fixed_size[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) #define HPI_MESSAGE_SIZE_BY_OBJECT { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) sizeof(struct hpi_message_header) , /* Default, no object type 0 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) sizeof(struct hpi_message_header) + sizeof(struct hpi_subsys_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) sizeof(struct hpi_message_header) + sizeof(union hpi_adapterx_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) sizeof(struct hpi_message_header) + sizeof(struct hpi_stream_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) sizeof(struct hpi_message_header) + sizeof(struct hpi_mixer_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) sizeof(struct hpi_message_header) , /* no node message */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) sizeof(struct hpi_message_header) + sizeof(struct hpi_control_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) sizeof(struct hpi_message_header) + sizeof(struct hpi_nvmemory_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) sizeof(struct hpi_message_header) + sizeof(struct hpi_gpio_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) sizeof(struct hpi_message_header) + sizeof(struct hpi_watchdog_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) sizeof(struct hpi_message_header) + sizeof(struct hpi_clock_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) sizeof(struct hpi_message_header) + sizeof(struct hpi_profile_msg),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) sizeof(struct hpi_message_header), /* controlx obj removed */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) sizeof(struct hpi_message_header) + sizeof(struct hpi_async_msg) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) Note that the wSpecificError error field should be inspected and potentially
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) reported whenever HPI_ERROR_DSP_COMMUNICATION or HPI_ERROR_DSP_BOOTLOAD is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) returned in wError.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) struct hpi_response_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) u16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) u8 type; /* HPI_TYPE_RESPONSE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) u8 version; /* response version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) u16 object; /* HPI_OBJ_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) u16 function; /* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) u16 error; /* HPI_ERROR_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) u16 specific_error; /* adapter specific error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) struct hpi_response {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) /* following fields must match HPI_RESPONSE_HEADER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) u16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) u8 type; /* HPI_TYPE_RESPONSE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) u8 version; /* response version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) u16 object; /* HPI_OBJ_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) u16 function; /* HPI_SUBSYS_xxx, HPI_ADAPTER_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) u16 error; /* HPI_ERROR_xxx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) u16 specific_error; /* adapter specific error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) struct hpi_subsys_res s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) union hpi_adapterx_res ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) struct hpi_stream_res d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) struct hpi_mixer_res m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) union hpi_mixerx_res mx; /* extended mixer; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) struct hpi_control_res c; /* mixer control; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) /* identical to hpi_control_res, but field naming is improved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) union hpi_control_union_res cu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) struct hpi_nvmemory_res n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) struct hpi_gpio_res l; /* digital i/o */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) struct hpi_watchdog_res w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) struct hpi_clock_res t; /* dsp time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) struct hpi_profile_res p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) struct hpi_async_res as;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) u8 bytes[52];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) #define HPI_RESPONSE_SIZE_BY_OBJECT { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) sizeof(struct hpi_response_header) ,/* Default, no object type 0 */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) sizeof(struct hpi_response_header) + sizeof(struct hpi_subsys_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) sizeof(struct hpi_response_header) + sizeof(union hpi_adapterx_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) sizeof(struct hpi_response_header) + sizeof(struct hpi_stream_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) sizeof(struct hpi_response_header) + sizeof(struct hpi_mixer_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) sizeof(struct hpi_response_header) , /* no node response */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) sizeof(struct hpi_response_header) + sizeof(struct hpi_control_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) sizeof(struct hpi_response_header) + sizeof(struct hpi_nvmemory_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) sizeof(struct hpi_response_header) + sizeof(struct hpi_gpio_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) sizeof(struct hpi_response_header) + sizeof(struct hpi_watchdog_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) sizeof(struct hpi_response_header) + sizeof(struct hpi_clock_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) sizeof(struct hpi_response_header) + sizeof(struct hpi_profile_res),\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) sizeof(struct hpi_response_header), /* controlx obj removed */ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) sizeof(struct hpi_response_header) + sizeof(struct hpi_async_res) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) /*********************** version 1 message/response **************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) #define HPINET_ETHERNET_DATA_SIZE (1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) #define HPINET_IP_HDR_SIZE (20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) #define HPINET_IP_DATA_SIZE (HPINET_ETHERNET_DATA_SIZE - HPINET_IP_HDR_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) #define HPINET_UDP_HDR_SIZE (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) #define HPINET_UDP_DATA_SIZE (HPINET_IP_DATA_SIZE - HPINET_UDP_HDR_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) #define HPINET_ASI_HDR_SIZE (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) #define HPINET_ASI_DATA_SIZE (HPINET_UDP_DATA_SIZE - HPINET_ASI_HDR_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) #define HPI_MAX_PAYLOAD_SIZE (HPINET_ASI_DATA_SIZE - 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) /* New style message/response, but still V0 compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) struct hpi_msg_adapter_get_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) struct hpi_message_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) struct hpi_res_adapter_get_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) struct hpi_response_header h; /*v0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) struct hpi_adapter_res p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) struct hpi_res_adapter_debug_read {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) struct hpi_response_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) u8 bytes[1024];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) struct hpi_msg_cobranet_hmi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) u16 attribute;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) u16 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) u32 hmi_address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) u32 byte_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) struct hpi_msg_cobranet_hmiwrite {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) struct hpi_message_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) struct hpi_msg_cobranet_hmi p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) u8 bytes[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) struct hpi_msg_cobranet_hmiread {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) struct hpi_message_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) struct hpi_msg_cobranet_hmi p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) struct hpi_res_cobranet_hmiread {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) struct hpi_response_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) u32 byte_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) u8 bytes[256];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) #define hpi_message_header_v1 hpi_message_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) #define hpi_response_header_v1 hpi_response_header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /* V1 headers in Addition to v0 headers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct hpi_message_header_v1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) struct hpi_message_header h0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) /* struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) } h1; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) struct hpi_response_header_v1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) struct hpi_response_header h0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) u16 adapter_index; /* the adapter index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) u16 obj_index; /* object index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) } h1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) struct hpi_msg_payload_v0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) struct hpi_message_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) struct hpi_subsys_msg s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) union hpi_adapterx_msg ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) struct hpi_stream_msg d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) struct hpi_mixer_msg m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) union hpi_mixerx_msg mx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) struct hpi_control_msg c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) struct hpi_control_union_msg cu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) struct hpi_nvmemory_msg n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) struct hpi_gpio_msg l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) struct hpi_watchdog_msg w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) struct hpi_clock_msg t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) struct hpi_profile_msg p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) struct hpi_async_msg as;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct hpi_res_payload_v0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) struct hpi_response_header h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) struct hpi_subsys_res s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) union hpi_adapterx_res ax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) struct hpi_stream_res d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) struct hpi_mixer_res m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) union hpi_mixerx_res mx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) struct hpi_control_res c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) union hpi_control_union_res cu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) struct hpi_nvmemory_res n;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) struct hpi_gpio_res l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) struct hpi_watchdog_res w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) struct hpi_clock_res t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) struct hpi_profile_res p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) struct hpi_async_res as;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) union hpi_message_buffer_v1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) struct hpi_message m0; /* version 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) struct hpi_message_header_v1 h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) u8 buf[HPI_MAX_PAYLOAD_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) union hpi_response_buffer_v1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) struct hpi_response r0; /* version 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) struct hpi_response_header_v1 h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) u8 buf[HPI_MAX_PAYLOAD_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) compile_time_assert((sizeof(union hpi_message_buffer_v1) <=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) HPI_MAX_PAYLOAD_SIZE), message_buffer_ok);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) compile_time_assert((sizeof(union hpi_response_buffer_v1) <=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) HPI_MAX_PAYLOAD_SIZE), response_buffer_ok);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) /*////////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) /* declarations for compact control calls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) struct hpi_control_defn {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) u8 channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) u8 src_node_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) u8 src_node_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) u8 dest_node_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) u8 dest_node_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) /*////////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) /* declarations for control caching (internal to HPI<->DSP interaction) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) /** indicates a cached u16 value is invalid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) #define HPI_CACHE_INVALID_UINT16 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) /** indicates a cached short value is invalid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) #define HPI_CACHE_INVALID_SHORT -32768
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) /** A compact representation of (part of) a controls state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) Used for efficient transfer of the control state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) between DSP and host or across a network
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) struct hpi_control_cache_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) /** one of HPI_CONTROL_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) u8 control_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) /** The total size of cached information in 32-bit words. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) u8 size_in32bit_words;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) /** The original index of the control on the DSP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) u16 control_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) struct hpi_control_cache_vol {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) short an_log[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) unsigned short flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) char padding[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) struct hpi_control_cache_meter {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) short an_log_peak[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) short an_logRMS[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) struct hpi_control_cache_channelmode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) u16 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) char temp_padding[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) struct hpi_control_cache_mux {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) u16 source_node_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) u16 source_node_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) char temp_padding[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) struct hpi_control_cache_level {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) short an_log[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) char temp_padding[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) struct hpi_control_cache_tuner {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) u32 freq_ink_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) u16 band;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) short s_level_avg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) struct hpi_control_cache_aes3rx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) u32 error_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) u32 format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) struct hpi_control_cache_aes3tx {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) u32 format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) char temp_padding[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) struct hpi_control_cache_tonedetector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) u16 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) char temp_padding[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) struct hpi_control_cache_silencedetector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) u32 state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) char temp_padding[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) struct hpi_control_cache_sampleclock {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) u16 source;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) u16 source_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) u32 sample_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) struct hpi_control_cache_microphone {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) u16 phantom_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) char temp_padding[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) struct hpi_control_cache_single {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) struct hpi_control_cache_vol vol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) struct hpi_control_cache_meter meter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) struct hpi_control_cache_channelmode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) struct hpi_control_cache_mux mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) struct hpi_control_cache_level level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) struct hpi_control_cache_tuner tuner;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) struct hpi_control_cache_aes3rx aes3rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) struct hpi_control_cache_aes3tx aes3tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) struct hpi_control_cache_tonedetector tone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) struct hpi_control_cache_silencedetector silence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) struct hpi_control_cache_sampleclock clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) struct hpi_control_cache_microphone microphone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) } u;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) struct hpi_control_cache_pad {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) struct hpi_control_cache_info i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) u32 field_valid_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) u8 c_channel[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) u8 c_artist[100];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) u8 c_title[100];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) u8 c_comment[200];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) u32 pTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) u32 pI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) u32 traffic_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) u32 traffic_anouncement;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) /* 2^N sized FIFO buffer (internal to HPI<->DSP interaction) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) struct hpi_fifo_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) u32 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) u32 dsp_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) u32 host_index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) #ifndef DISABLE_PRAGMA_PACK1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) #pragma pack(pop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) /* skip host side function declarations for DSP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) compile and documentation extraction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) char hpi_handle_object(const u32 handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) void hpi_handle_to_indexes(const u32 handle, u16 *pw_adapter_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) u16 *pw_object_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) u32 hpi_indexes_to_handle(const char c_object, const u16 adapter_index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) const u16 object_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) /*////////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) /* main HPI entry point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) void hpi_send_recv(struct hpi_message *phm, struct hpi_response *phr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) /* used in PnP OS/driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) u16 hpi_subsys_create_adapter(const struct hpi_resource *p_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) u16 *pw_adapter_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) u16 hpi_outstream_host_buffer_get_info(u32 h_outstream, u8 **pp_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) struct hpi_hostbuffer_status **pp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) u16 hpi_instream_host_buffer_get_info(u32 h_instream, u8 **pp_buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) struct hpi_hostbuffer_status **pp_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) u16 hpi_adapter_restart(u16 adapter_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) The following 3 functions were last declared in header files for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) driver 3.10. HPI_ControlQuery() used to be the recommended way
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) of getting a volume range. Declared here for binary asihpi32.dll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) compatibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) void hpi_format_to_msg(struct hpi_msg_format *pMF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) const struct hpi_format *pF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) void hpi_stream_response_to_legacy(struct hpi_stream_res *pSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) /*////////////////////////////////////////////////////////////////////////// */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) /* declarations for individual HPI entry points */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) hpi_handler_func HPI_6000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) hpi_handler_func HPI_6205;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) #endif /* _HPI_INTERNAL_H_ */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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