Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *  Universal routines for AK4531 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <sound/ak4531_codec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <sound/tlv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) MODULE_DESCRIPTION("Universal routines for AK4531 codec");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static void snd_ak4531_proc_init(struct snd_card *card, struct snd_ak4531 *ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static void snd_ak4531_dump(struct snd_ak4531 *ak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	for (idx = 0; idx < 0x19; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 		printk(KERN_DEBUG "ak4531 0x%x: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 		       idx, ak4531->regs[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define AK4531_SINGLE(xname, xindex, reg, shift, mask, invert) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)   .info = snd_ak4531_info_single, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)   .get = snd_ak4531_get_single, .put = snd_ak4531_put_single, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)   .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define AK4531_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv)    \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)   .name = xname, .index = xindex, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)   .info = snd_ak4531_info_single, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)   .get = snd_ak4531_get_single, .put = snd_ak4531_put_single, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)   .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)   .tlv = { .p = (xtlv) } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) static int snd_ak4531_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	uinfo->value.integer.max = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) static int snd_ak4531_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	int shift = (kcontrol->private_value >> 16) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	int invert = (kcontrol->private_value >> 22) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	val = (ak4531->regs[reg] >> shift) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	if (invert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		val = mask - val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	ucontrol->value.integer.value[0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) static int snd_ak4531_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	int shift = (kcontrol->private_value >> 16) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	int invert = (kcontrol->private_value >> 22) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	val = ucontrol->value.integer.value[0] & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	if (invert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		val = mask - val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	val <<= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	val = (ak4531->regs[reg] & ~(mask << shift)) | val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	change = val != ak4531->regs[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	ak4531->write(ak4531, reg, ak4531->regs[reg] = val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define AK4531_DOUBLE(xname, xindex, left_reg, right_reg, left_shift, right_shift, mask, invert) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)   .info = snd_ak4531_info_double, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)   .get = snd_ak4531_get_double, .put = snd_ak4531_put_double, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)   .private_value = left_reg | (right_reg << 8) | (left_shift << 16) | (right_shift << 19) | (mask << 24) | (invert << 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define AK4531_DOUBLE_TLV(xname, xindex, left_reg, right_reg, left_shift, right_shift, mask, invert, xtlv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)   .name = xname, .index = xindex, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)   .info = snd_ak4531_info_double, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)   .get = snd_ak4531_get_double, .put = snd_ak4531_put_double, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)   .private_value = left_reg | (right_reg << 8) | (left_shift << 16) | (right_shift << 19) | (mask << 24) | (invert << 22), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)   .tlv = { .p = (xtlv) } }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static int snd_ak4531_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	uinfo->count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	uinfo->value.integer.max = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int snd_ak4531_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	int left_reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	int left_shift = (kcontrol->private_value >> 16) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	int right_shift = (kcontrol->private_value >> 19) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	int invert = (kcontrol->private_value >> 22) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	int left, right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	left = (ak4531->regs[left_reg] >> left_shift) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	right = (ak4531->regs[right_reg] >> right_shift) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	if (invert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		left = mask - left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		right = mask - right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	ucontrol->value.integer.value[0] = left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	ucontrol->value.integer.value[1] = right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int snd_ak4531_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int left_reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	int left_shift = (kcontrol->private_value >> 16) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	int right_shift = (kcontrol->private_value >> 19) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	int mask = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	int invert = (kcontrol->private_value >> 22) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	int left, right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	left = ucontrol->value.integer.value[0] & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	right = ucontrol->value.integer.value[1] & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (invert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		left = mask - left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		right = mask - right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	left <<= left_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	right <<= right_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	if (left_reg == right_reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		left = (ak4531->regs[left_reg] & ~((mask << left_shift) | (mask << right_shift))) | left | right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		change = left != ak4531->regs[left_reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		ak4531->write(ak4531, left_reg, ak4531->regs[left_reg] = left);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		left = (ak4531->regs[left_reg] & ~(mask << left_shift)) | left;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		right = (ak4531->regs[right_reg] & ~(mask << right_shift)) | right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		change = left != ak4531->regs[left_reg] || right != ak4531->regs[right_reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		ak4531->write(ak4531, left_reg, ak4531->regs[left_reg] = left);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		ak4531->write(ak4531, right_reg, ak4531->regs[right_reg] = right);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define AK4531_INPUT_SW(xname, xindex, reg1, reg2, left_shift, right_shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)   .info = snd_ak4531_info_input_sw, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)   .get = snd_ak4531_get_input_sw, .put = snd_ak4531_put_input_sw, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)   .private_value = reg1 | (reg2 << 8) | (left_shift << 16) | (right_shift << 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static int snd_ak4531_info_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	uinfo->count = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	uinfo->value.integer.max = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)  
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static int snd_ak4531_get_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	int reg1 = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	int reg2 = (kcontrol->private_value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	int left_shift = (kcontrol->private_value >> 16) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	int right_shift = (kcontrol->private_value >> 24) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	ucontrol->value.integer.value[0] = (ak4531->regs[reg1] >> left_shift) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	ucontrol->value.integer.value[1] = (ak4531->regs[reg2] >> left_shift) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	ucontrol->value.integer.value[2] = (ak4531->regs[reg1] >> right_shift) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ucontrol->value.integer.value[3] = (ak4531->regs[reg2] >> right_shift) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) static int snd_ak4531_put_input_sw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	struct snd_ak4531 *ak4531 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	int reg1 = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	int reg2 = (kcontrol->private_value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	int left_shift = (kcontrol->private_value >> 16) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	int right_shift = (kcontrol->private_value >> 24) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	int val1, val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	mutex_lock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	val1 = ak4531->regs[reg1] & ~((1 << left_shift) | (1 << right_shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	val2 = ak4531->regs[reg2] & ~((1 << left_shift) | (1 << right_shift));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	val1 |= (ucontrol->value.integer.value[0] & 1) << left_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	val2 |= (ucontrol->value.integer.value[1] & 1) << left_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	val1 |= (ucontrol->value.integer.value[2] & 1) << right_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	val2 |= (ucontrol->value.integer.value[3] & 1) << right_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	change = val1 != ak4531->regs[reg1] || val2 != ak4531->regs[reg2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	ak4531->write(ak4531, reg1, ak4531->regs[reg1] = val1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	ak4531->write(ak4531, reg2, ak4531->regs[reg2] = val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	mutex_unlock(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static const DECLARE_TLV_DB_SCALE(db_scale_master, -6200, 200, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) static const DECLARE_TLV_DB_SCALE(db_scale_mono, -2800, 400, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static const DECLARE_TLV_DB_SCALE(db_scale_input, -5000, 200, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static const struct snd_kcontrol_new snd_ak4531_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) AK4531_DOUBLE_TLV("Master Playback Switch", 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		  AK4531_LMASTER, AK4531_RMASTER, 7, 7, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		  db_scale_master),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) AK4531_DOUBLE("Master Playback Volume", 0, AK4531_LMASTER, AK4531_RMASTER, 0, 0, 0x1f, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) AK4531_SINGLE_TLV("Master Mono Playback Switch", 0, AK4531_MONO_OUT, 7, 1, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		  db_scale_mono),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) AK4531_SINGLE("Master Mono Playback Volume", 0, AK4531_MONO_OUT, 0, 0x07, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) AK4531_DOUBLE("PCM Switch", 0, AK4531_LVOICE, AK4531_RVOICE, 7, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) AK4531_DOUBLE_TLV("PCM Volume", 0, AK4531_LVOICE, AK4531_RVOICE, 0, 0, 0x1f, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		  db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) AK4531_DOUBLE("PCM Playback Switch", 0, AK4531_OUT_SW2, AK4531_OUT_SW2, 3, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) AK4531_DOUBLE("PCM Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 2, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) AK4531_DOUBLE("PCM Switch", 1, AK4531_LFM, AK4531_RFM, 7, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) AK4531_DOUBLE_TLV("PCM Volume", 1, AK4531_LFM, AK4531_RFM, 0, 0, 0x1f, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		  db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) AK4531_DOUBLE("PCM Playback Switch", 1, AK4531_OUT_SW1, AK4531_OUT_SW1, 6, 5, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) AK4531_INPUT_SW("PCM Capture Route", 1, AK4531_LIN_SW1, AK4531_RIN_SW1, 6, 5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) AK4531_DOUBLE("CD Switch", 0, AK4531_LCD, AK4531_RCD, 7, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) AK4531_DOUBLE_TLV("CD Volume", 0, AK4531_LCD, AK4531_RCD, 0, 0, 0x1f, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		  db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) AK4531_DOUBLE("CD Playback Switch", 0, AK4531_OUT_SW1, AK4531_OUT_SW1, 2, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) AK4531_INPUT_SW("CD Capture Route", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 2, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) AK4531_DOUBLE("Line Switch", 0, AK4531_LLINE, AK4531_RLINE, 7, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) AK4531_DOUBLE_TLV("Line Volume", 0, AK4531_LLINE, AK4531_RLINE, 0, 0, 0x1f, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		  db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) AK4531_DOUBLE("Line Playback Switch", 0, AK4531_OUT_SW1, AK4531_OUT_SW1, 4, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) AK4531_INPUT_SW("Line Capture Route", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) AK4531_DOUBLE("Aux Switch", 0, AK4531_LAUXA, AK4531_RAUXA, 7, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) AK4531_DOUBLE_TLV("Aux Volume", 0, AK4531_LAUXA, AK4531_RAUXA, 0, 0, 0x1f, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		  db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) AK4531_DOUBLE("Aux Playback Switch", 0, AK4531_OUT_SW2, AK4531_OUT_SW2, 5, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) AK4531_INPUT_SW("Aux Capture Route", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 4, 3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) AK4531_SINGLE("Mono Switch", 0, AK4531_MONO1, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) AK4531_SINGLE_TLV("Mono Volume", 0, AK4531_MONO1, 0, 0x1f, 1, db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) AK4531_SINGLE("Mono Playback Switch", 0, AK4531_OUT_SW2, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) AK4531_DOUBLE("Mono Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 0, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) AK4531_SINGLE("Mono Switch", 1, AK4531_MONO2, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) AK4531_SINGLE_TLV("Mono Volume", 1, AK4531_MONO2, 0, 0x1f, 1, db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) AK4531_SINGLE("Mono Playback Switch", 1, AK4531_OUT_SW2, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) AK4531_DOUBLE("Mono Capture Switch", 1, AK4531_LIN_SW2, AK4531_RIN_SW2, 1, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) AK4531_SINGLE_TLV("Mic Volume", 0, AK4531_MIC, 0, 0x1f, 1, db_scale_input),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) AK4531_SINGLE("Mic Switch", 0, AK4531_MIC, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) AK4531_SINGLE("Mic Playback Switch", 0, AK4531_OUT_SW1, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) AK4531_DOUBLE("Mic Capture Switch", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 0, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) AK4531_DOUBLE("Mic Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 7, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) AK4531_DOUBLE("Mono1 Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 6, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) AK4531_DOUBLE("Mono2 Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 5, 5, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) AK4531_SINGLE("AD Input Select", 0, AK4531_AD_IN, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) AK4531_SINGLE("Mic Boost (+30dB)", 0, AK4531_MIC_GAIN, 0, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) static int snd_ak4531_free(struct snd_ak4531 *ak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	if (ak4531) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		if (ak4531->private_free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			ak4531->private_free(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		kfree(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) static int snd_ak4531_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	struct snd_ak4531 *ak4531 = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	return snd_ak4531_free(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static const u8 snd_ak4531_initial_map[0x19 + 1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	0x9f,		/* 00: Master Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	0x9f,		/* 01: Master Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	0x9f,		/* 02: Voice Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	0x9f,		/* 03: Voice Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	0x9f,		/* 04: FM Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	0x9f,		/* 05: FM Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	0x9f,		/* 06: CD Audio Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	0x9f,		/* 07: CD Audio Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	0x9f,		/* 08: Line Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	0x9f,		/* 09: Line Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	0x9f,		/* 0a: Aux Volume Lch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	0x9f,		/* 0b: Aux Volume Rch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	0x9f,		/* 0c: Mono1 Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	0x9f,		/* 0d: Mono2 Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	0x9f,		/* 0e: Mic Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	0x87,		/* 0f: Mono-out Volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	0x00,		/* 10: Output Mixer SW1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	0x00,		/* 11: Output Mixer SW2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	0x00,		/* 12: Lch Input Mixer SW1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	0x00,		/* 13: Rch Input Mixer SW1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	0x00,		/* 14: Lch Input Mixer SW2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	0x00,		/* 15: Rch Input Mixer SW2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	0x00,		/* 16: Reset & Power Down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	0x00,		/* 17: Clock Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	0x00,		/* 18: AD Input Select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	0x01		/* 19: Mic Amp Setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) int snd_ak4531_mixer(struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		     struct snd_ak4531 *_ak4531,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 		     struct snd_ak4531 **rak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	struct snd_ak4531 *ak4531;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	static const struct snd_device_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 		.dev_free =	snd_ak4531_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	if (snd_BUG_ON(!card || !_ak4531))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	if (rak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 		*rak4531 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	ak4531 = kzalloc(sizeof(*ak4531), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 	if (ak4531 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	*ak4531 = *_ak4531;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	mutex_init(&ak4531->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	if ((err = snd_component_add(card, "AK4531")) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 		snd_ak4531_free(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	strcpy(card->mixername, "Asahi Kasei AK4531");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	ak4531->write(ak4531, AK4531_RESET, 0x03);	/* no RST, PD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	ak4531->write(ak4531, AK4531_CLOCK, 0x00);	/* CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off LRCLK2 PLL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	for (idx = 0; idx <= 0x19; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 		if (idx == AK4531_RESET || idx == AK4531_CLOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		ak4531->write(ak4531, idx, ak4531->regs[idx] = snd_ak4531_initial_map[idx]);	/* recording source is mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	for (idx = 0; idx < ARRAY_SIZE(snd_ak4531_controls); idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ak4531_controls[idx], ak4531))) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 			snd_ak4531_free(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	snd_ak4531_proc_init(card, ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	if ((err = snd_device_new(card, SNDRV_DEV_CODEC, ak4531, &ops)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		snd_ak4531_free(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	snd_ak4531_dump(ak4531);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	if (rak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		*rak4531 = ak4531;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)  * power management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) void snd_ak4531_suspend(struct snd_ak4531 *ak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	/* mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	ak4531->write(ak4531, AK4531_LMASTER, 0x9f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	ak4531->write(ak4531, AK4531_RMASTER, 0x9f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	/* powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	ak4531->write(ak4531, AK4531_RESET, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) void snd_ak4531_resume(struct snd_ak4531 *ak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 	int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	/* initialize */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	ak4531->write(ak4531, AK4531_RESET, 0x03);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 	udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	ak4531->write(ak4531, AK4531_CLOCK, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 	/* restore mixer registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	for (idx = 0; idx <= 0x19; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 		if (idx == AK4531_RESET || idx == AK4531_CLOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 		ak4531->write(ak4531, idx, ak4531->regs[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)  * /proc interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static void snd_ak4531_proc_read(struct snd_info_entry *entry, 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 				 struct snd_info_buffer *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	struct snd_ak4531 *ak4531 = entry->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	snd_iprintf(buffer, "Asahi Kasei AK4531\n\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 	snd_iprintf(buffer, "Recording source   : %s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 		    "MIC gain           : %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		    ak4531->regs[AK4531_AD_IN] & 1 ? "external" : "mixer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 		    ak4531->regs[AK4531_MIC_GAIN] & 1 ? "+30dB" : "+0dB");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) snd_ak4531_proc_init(struct snd_card *card, struct snd_ak4531 *ak4531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 	snd_card_ro_proc_new(card, "ak4531", ak4531, snd_ak4531_proc_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }