^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Universal interface for Audio Codec '97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * For more details look to AC '97 component specification revision 2.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * by Intel Corporation (http://developer.intel.com) and to datasheets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for specific codecs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "ac97_local.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "ac97_patch.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Forward declarations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static struct snd_kcontrol *snd_ac97_find_mixer_ctl(struct snd_ac97 *ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static int snd_ac97_add_vmaster(struct snd_ac97 *ac97, char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) const unsigned int *tlv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) const char * const *followers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Chip specific initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int patch_build_controls(struct snd_ac97 * ac97, const struct snd_kcontrol_new *controls, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int idx, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) for (idx = 0; idx < count; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&controls[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* replace with a new TLV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static void reset_tlv(struct snd_ac97 *ac97, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) const unsigned int *tlv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct snd_ctl_elem_id sid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) memset(&sid, 0, sizeof(sid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) strcpy(sid.name, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) kctl = snd_ctl_find_id(ac97->bus->card, &sid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (kctl && kctl->tlv.p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) kctl->tlv.p = tlv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* set to the page, update bits and restore the page */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int ac97_update_bits_page(struct snd_ac97 *ac97, unsigned short reg, unsigned short mask, unsigned short value, unsigned short page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned short page_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) mutex_lock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) page_save = snd_ac97_read(ac97, AC97_INT_PAGING) & AC97_PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ret = snd_ac97_update_bits(ac97, reg, mask, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page_save);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) mutex_unlock(&ac97->page_mutex); /* unlock paging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * shared line-in/mic controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int ac97_surround_jack_mode_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static const char * const texts[] = { "Shared", "Independent" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return snd_ctl_enum_info(uinfo, 1, 2, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static int ac97_surround_jack_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ucontrol->value.enumerated.item[0] = ac97->indep_surround;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static int ac97_surround_jack_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned char indep = !!ucontrol->value.enumerated.item[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (indep != ac97->indep_surround) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ac97->indep_surround = indep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (ac97->build_ops->update_jacks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ac97->build_ops->update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int ac97_channel_mode_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static const char * const texts[] = { "2ch", "4ch", "6ch", "8ch" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return snd_ctl_enum_info(uinfo, 1, kcontrol->private_value, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static int ac97_channel_mode_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ucontrol->value.enumerated.item[0] = ac97->channel_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int ac97_channel_mode_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) unsigned char mode = ucontrol->value.enumerated.item[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (mode >= kcontrol->private_value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (mode != ac97->channel_mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ac97->channel_mode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (ac97->build_ops->update_jacks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ac97->build_ops->update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define AC97_SURROUND_JACK_MODE_CTL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .name = "Surround Jack Mode", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .info = ac97_surround_jack_mode_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .get = ac97_surround_jack_mode_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .put = ac97_surround_jack_mode_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /* 6ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define AC97_CHANNEL_MODE_CTL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .name = "Channel Mode", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .info = ac97_channel_mode_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .get = ac97_channel_mode_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) .put = ac97_channel_mode_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .private_value = 3, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) /* 4ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define AC97_CHANNEL_MODE_4CH_CTL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .name = "Channel Mode", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .info = ac97_channel_mode_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .get = ac97_channel_mode_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .put = ac97_channel_mode_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .private_value = 2, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) /* 8ch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define AC97_CHANNEL_MODE_8CH_CTL \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .name = "Channel Mode", \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .info = ac97_channel_mode_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .get = ac97_channel_mode_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .put = ac97_channel_mode_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .private_value = 4, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static inline int is_surround_on(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return ac97->channel_mode >= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static inline int is_clfe_on(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return ac97->channel_mode >= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /* system has shared jacks with surround out enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static inline int is_shared_surrout(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return !ac97->indep_surround && is_surround_on(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* system has shared jacks with center/lfe out enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static inline int is_shared_clfeout(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return !ac97->indep_surround && is_clfe_on(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* system has shared jacks with line in enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static inline int is_shared_linein(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) return !ac97->indep_surround && !is_surround_on(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* system has shared jacks with mic in enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static inline int is_shared_micin(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return !ac97->indep_surround && !is_clfe_on(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static inline int alc850_is_aux_back_surround(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return is_surround_on(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* The following snd_ac97_ymf753_... items added by David Shust (dshust@shustring.com) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* Modified for YMF743 by Keita Maehara <maehara@debian.org> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* It is possible to indicate to the Yamaha YMF7x3 the type of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) speakers being used. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int snd_ac97_ymf7x3_info_speaker(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static const char * const texts[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) "Standard", "Small", "Smaller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return snd_ctl_enum_info(uinfo, 1, 3, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int snd_ac97_ymf7x3_get_speaker(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) val = ac97->regs[AC97_YMF7X3_3D_MODE_SEL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) val = (val >> 10) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (val > 0) /* 0 = invalid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) val--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ucontrol->value.enumerated.item[0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static int snd_ac97_ymf7x3_put_speaker(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (ucontrol->value.enumerated.item[0] > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) val = (ucontrol->value.enumerated.item[0] + 1) << 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return snd_ac97_update(ac97, AC97_YMF7X3_3D_MODE_SEL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static const struct snd_kcontrol_new snd_ac97_ymf7x3_controls_speaker =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .name = "3D Control - Speaker",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .info = snd_ac97_ymf7x3_info_speaker,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .get = snd_ac97_ymf7x3_get_speaker,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .put = snd_ac97_ymf7x3_put_speaker,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* It is possible to indicate to the Yamaha YMF7x3 the source to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) direct to the S/PDIF output. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int snd_ac97_ymf7x3_spdif_source_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static const char * const texts[2] = { "AC-Link", "A/D Converter" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) return snd_ctl_enum_info(uinfo, 1, 2, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) static int snd_ac97_ymf7x3_spdif_source_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) val = ac97->regs[AC97_YMF7X3_DIT_CTRL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ucontrol->value.enumerated.item[0] = (val >> 1) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static int snd_ac97_ymf7x3_spdif_source_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (ucontrol->value.enumerated.item[0] > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) val = ucontrol->value.enumerated.item[0] << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return snd_ac97_update_bits(ac97, AC97_YMF7X3_DIT_CTRL, 0x0002, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static int patch_yamaha_ymf7x3_3d(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) err = snd_ctl_add(ac97->bus->card, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) strcpy(kctl->id.name, "3D Control - Wide");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 9, 7, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) err = snd_ctl_add(ac97->bus->card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) snd_ac97_cnew(&snd_ac97_ymf7x3_controls_speaker,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ac97));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) snd_ac97_write_cache(ac97, AC97_YMF7X3_3D_MODE_SEL, 0x0c00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static const struct snd_kcontrol_new snd_ac97_yamaha_ymf743_controls_spdif[3] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) AC97_YMF7X3_DIT_CTRL, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .info = snd_ac97_ymf7x3_spdif_source_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .get = snd_ac97_ymf7x3_spdif_source_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .put = snd_ac97_ymf7x3_spdif_source_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("", NONE, NONE) "Mute",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) AC97_YMF7X3_DIT_CTRL, 2, 1, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static int patch_yamaha_ymf743_build_spdif(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) err = patch_build_controls(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) snd_ac97_yamaha_ymf743_controls_spdif, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* set default PCM S/PDIF params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /* PCM audio,no copyright,no preemphasis,PCM coder,original */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) snd_ac97_write_cache(ac97, AC97_YMF7X3_DIT_CTRL, 0xa201);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static const struct snd_ac97_build_ops patch_yamaha_ymf743_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .build_spdif = patch_yamaha_ymf743_build_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .build_3d = patch_yamaha_ymf7x3_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) static int patch_yamaha_ymf743(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) ac97->build_ops = &patch_yamaha_ymf743_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ac97->caps |= AC97_BC_BASS_TREBLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) ac97->caps |= 0x04 << 10; /* Yamaha 3D enhancement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /* The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) The YMF753 will output the S/PDIF signal to pin 43, 47 (EAPD), or 48.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) By default, no output pin is selected, and the S/PDIF signal is not output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) There is also a bit to mute S/PDIF output in a vendor-specific register. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static int snd_ac97_ymf753_spdif_output_pin_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const char * const texts[3] = { "Disabled", "Pin 43", "Pin 48" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return snd_ctl_enum_info(uinfo, 1, 3, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static int snd_ac97_ymf753_spdif_output_pin_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) val = ac97->regs[AC97_YMF7X3_DIT_CTRL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ucontrol->value.enumerated.item[0] = (val & 0x0008) ? 2 : (val & 0x0020) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) static int snd_ac97_ymf753_spdif_output_pin_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (ucontrol->value.enumerated.item[0] > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) val = (ucontrol->value.enumerated.item[0] == 2) ? 0x0008 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) (ucontrol->value.enumerated.item[0] == 1) ? 0x0020 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return snd_ac97_update_bits(ac97, AC97_YMF7X3_DIT_CTRL, 0x0028, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* The following can be used to direct S/PDIF output to pin 47 (EAPD).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) snd_ac97_write_cache(ac97, 0x62, snd_ac97_read(ac97, 0x62) | 0x0008); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const struct snd_kcontrol_new snd_ac97_ymf753_controls_spdif[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .info = snd_ac97_ymf7x3_spdif_source_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .get = snd_ac97_ymf7x3_spdif_source_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .put = snd_ac97_ymf7x3_spdif_source_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Output Pin",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .info = snd_ac97_ymf753_spdif_output_pin_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .get = snd_ac97_ymf753_spdif_output_pin_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .put = snd_ac97_ymf753_spdif_output_pin_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("", NONE, NONE) "Mute",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) AC97_YMF7X3_DIT_CTRL, 2, 1, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static int patch_yamaha_ymf753_post_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if ((err = patch_build_controls(ac97, snd_ac97_ymf753_controls_spdif, ARRAY_SIZE(snd_ac97_ymf753_controls_spdif))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static const struct snd_ac97_build_ops patch_yamaha_ymf753_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .build_3d = patch_yamaha_ymf7x3_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .build_post_spdif = patch_yamaha_ymf753_post_spdif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static int patch_yamaha_ymf753(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) /* Patch for Yamaha YMF753, Copyright (c) by David Shust, dshust@shustring.com.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) This chip has nonstandard and extended behaviour with regard to its S/PDIF output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) The YMF753 will ouput the S/PDIF signal to pin 43, 47 (EAPD), or 48.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) By default, no output pin is selected, and the S/PDIF signal is not output.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) There is also a bit to mute S/PDIF output in a vendor-specific register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ac97->build_ops = &patch_yamaha_ymf753_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) ac97->caps |= AC97_BC_BASS_TREBLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) ac97->caps |= 0x04 << 10; /* Yamaha 3D enhancement */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * May 2, 2003 Liam Girdwood <lrg@slimlogic.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * removed broken wolfson00 patch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) * added support for WM9705,WM9708,WM9709,WM9710,WM9711,WM9712 and WM9717.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) static const struct snd_kcontrol_new wm97xx_snd_ac97_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) AC97_DOUBLE("Front Playback Volume", AC97_WM97XX_FMIXER_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) AC97_SINGLE("Front Playback Switch", AC97_WM97XX_FMIXER_VOL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) static int patch_wolfson_wm9703_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* This is known to work for the ViewSonic ViewPad 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * Randolph Bentson <bentson@holmsjoen.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * WM9703/9707/9708/9717
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) for (i = 0; i < ARRAY_SIZE(wm97xx_snd_ac97_controls); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm97xx_snd_ac97_controls[i], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) snd_ac97_write_cache(ac97, AC97_WM97XX_FMIXER_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static const struct snd_ac97_build_ops patch_wolfson_wm9703_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .build_specific = patch_wolfson_wm9703_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static int patch_wolfson03(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) ac97->build_ops = &patch_wolfson_wm9703_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static const struct snd_kcontrol_new wm9704_snd_ac97_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) AC97_DOUBLE("Front Playback Volume", AC97_WM97XX_FMIXER_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) AC97_SINGLE("Front Playback Switch", AC97_WM97XX_FMIXER_VOL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) AC97_DOUBLE("Rear Playback Volume", AC97_WM9704_RMIXER_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) AC97_SINGLE("Rear Playback Switch", AC97_WM9704_RMIXER_VOL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) AC97_DOUBLE("Rear DAC Volume", AC97_WM9704_RPCM_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) AC97_DOUBLE("Surround Volume", AC97_SURROUND_MASTER, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) static int patch_wolfson_wm9704_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) for (i = 0; i < ARRAY_SIZE(wm9704_snd_ac97_controls); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm9704_snd_ac97_controls[i], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /* patch for DVD noise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) snd_ac97_write_cache(ac97, AC97_WM9704_TEST, 0x0200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static const struct snd_ac97_build_ops patch_wolfson_wm9704_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .build_specific = patch_wolfson_wm9704_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static int patch_wolfson04(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* WM9704M/9704Q */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ac97->build_ops = &patch_wolfson_wm9704_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static int patch_wolfson05(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /* WM9705, WM9710 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ac97->build_ops = &patch_wolfson_wm9703_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #ifdef CONFIG_TOUCHSCREEN_WM9705
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) /* WM9705 touchscreen uses AUX and VIDEO for touch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ac97->flags |= AC97_HAS_NO_VIDEO | AC97_HAS_NO_AUX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) static const char* wm9711_alc_select[] = {"None", "Left", "Right", "Stereo"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static const char* wm9711_alc_mix[] = {"Stereo", "Right", "Left", "None"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) static const char* wm9711_out3_src[] = {"Left", "VREF", "Left + Right", "Mono"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static const char* wm9711_out3_lrsrc[] = {"Master Mix", "Headphone Mix"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static const char* wm9711_rec_adc[] = {"Stereo", "Left", "Right", "Mute"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static const char* wm9711_base[] = {"Linear Control", "Adaptive Boost"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static const char* wm9711_rec_gain[] = {"+1.5dB Steps", "+0.75dB Steps"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static const char* wm9711_mic[] = {"Mic 1", "Differential", "Mic 2", "Stereo"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) static const char* wm9711_rec_sel[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {"Mic 1", "NC", "NC", "Master Mix", "Line", "Headphone Mix", "Phone Mix", "Phone"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static const char* wm9711_ng_type[] = {"Constant Gain", "Mute"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static const struct ac97_enum wm9711_enum[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) AC97_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9711_alc_select),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) AC97_ENUM_SINGLE(AC97_VIDEO, 10, 4, wm9711_alc_mix),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) AC97_ENUM_SINGLE(AC97_AUX, 9, 4, wm9711_out3_src),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) AC97_ENUM_SINGLE(AC97_AUX, 8, 2, wm9711_out3_lrsrc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) AC97_ENUM_SINGLE(AC97_REC_SEL, 12, 4, wm9711_rec_adc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) AC97_ENUM_SINGLE(AC97_MASTER_TONE, 15, 2, wm9711_base),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) AC97_ENUM_DOUBLE(AC97_REC_GAIN, 14, 6, 2, wm9711_rec_gain),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) AC97_ENUM_SINGLE(AC97_MIC, 5, 4, wm9711_mic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) AC97_ENUM_DOUBLE(AC97_REC_SEL, 8, 0, 8, wm9711_rec_sel),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) AC97_ENUM_SINGLE(AC97_PCI_SVID, 5, 2, wm9711_ng_type),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static const struct snd_kcontrol_new wm9711_snd_ac97_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) AC97_SINGLE("ALC Target Volume", AC97_CODEC_CLASS_REV, 12, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) AC97_SINGLE("ALC Hold Time", AC97_CODEC_CLASS_REV, 8, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) AC97_SINGLE("ALC Decay Time", AC97_CODEC_CLASS_REV, 4, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) AC97_SINGLE("ALC Attack Time", AC97_CODEC_CLASS_REV, 0, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) AC97_ENUM("ALC Function", wm9711_enum[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) AC97_SINGLE("ALC Max Volume", AC97_PCI_SVID, 11, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) AC97_SINGLE("ALC ZC Timeout", AC97_PCI_SVID, 9, 3, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) AC97_SINGLE("ALC ZC Switch", AC97_PCI_SVID, 8, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) AC97_SINGLE("ALC NG Switch", AC97_PCI_SVID, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) AC97_ENUM("ALC NG Type", wm9711_enum[9]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) AC97_SINGLE("ALC NG Threshold", AC97_PCI_SVID, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) AC97_SINGLE("Side Tone Switch", AC97_VIDEO, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) AC97_SINGLE("Side Tone Volume", AC97_VIDEO, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) AC97_ENUM("ALC Headphone Mux", wm9711_enum[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) AC97_SINGLE("ALC Headphone Volume", AC97_VIDEO, 7, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) AC97_SINGLE("Out3 Switch", AC97_AUX, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) AC97_SINGLE("Out3 ZC Switch", AC97_AUX, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) AC97_ENUM("Out3 Mux", wm9711_enum[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) AC97_ENUM("Out3 LR Mux", wm9711_enum[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) AC97_SINGLE("Out3 Volume", AC97_AUX, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) AC97_SINGLE("Beep to Headphone Switch", AC97_PC_BEEP, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) AC97_SINGLE("Beep to Headphone Volume", AC97_PC_BEEP, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) AC97_SINGLE("Beep to Side Tone Switch", AC97_PC_BEEP, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) AC97_SINGLE("Beep to Side Tone Volume", AC97_PC_BEEP, 8, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) AC97_SINGLE("Beep to Phone Switch", AC97_PC_BEEP, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) AC97_SINGLE("Beep to Phone Volume", AC97_PC_BEEP, 4, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) AC97_SINGLE("Aux to Headphone Switch", AC97_CD, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) AC97_SINGLE("Aux to Headphone Volume", AC97_CD, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) AC97_SINGLE("Aux to Side Tone Switch", AC97_CD, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) AC97_SINGLE("Aux to Side Tone Volume", AC97_CD, 8, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) AC97_SINGLE("Aux to Phone Switch", AC97_CD, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) AC97_SINGLE("Aux to Phone Volume", AC97_CD, 4, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) AC97_SINGLE("Phone to Headphone Switch", AC97_PHONE, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) AC97_SINGLE("Phone to Master Switch", AC97_PHONE, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) AC97_SINGLE("Line to Headphone Switch", AC97_LINE, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) AC97_SINGLE("Line to Master Switch", AC97_LINE, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) AC97_SINGLE("Line to Phone Switch", AC97_LINE, 13, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) AC97_SINGLE("PCM Playback to Headphone Switch", AC97_PCM, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) AC97_SINGLE("PCM Playback to Master Switch", AC97_PCM, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) AC97_SINGLE("PCM Playback to Phone Switch", AC97_PCM, 13, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) AC97_SINGLE("Capture 20dB Boost Switch", AC97_REC_SEL, 14, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) AC97_ENUM("Capture to Phone Mux", wm9711_enum[4]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) AC97_SINGLE("Capture to Phone 20dB Boost Switch", AC97_REC_SEL, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) AC97_ENUM("Capture Select", wm9711_enum[8]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) AC97_SINGLE("3D Upper Cut-off Switch", AC97_3D_CONTROL, 5, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) AC97_SINGLE("3D Lower Cut-off Switch", AC97_3D_CONTROL, 4, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) AC97_ENUM("Bass Control", wm9711_enum[5]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) AC97_SINGLE("Bass Cut-off Switch", AC97_MASTER_TONE, 12, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) AC97_SINGLE("Tone Cut-off Switch", AC97_MASTER_TONE, 4, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) AC97_SINGLE("Playback Attenuate (-6dB) Switch", AC97_MASTER_TONE, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) AC97_SINGLE("ADC Switch", AC97_REC_GAIN, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) AC97_ENUM("Capture Volume Steps", wm9711_enum[6]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) AC97_DOUBLE("Capture Volume", AC97_REC_GAIN, 8, 0, 63, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) AC97_SINGLE("Capture ZC Switch", AC97_REC_GAIN, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) AC97_SINGLE("Mic 1 to Phone Switch", AC97_MIC, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) AC97_SINGLE("Mic 2 to Phone Switch", AC97_MIC, 13, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) AC97_ENUM("Mic Select Source", wm9711_enum[7]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) AC97_SINGLE("Mic 1 Volume", AC97_MIC, 8, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) AC97_SINGLE("Mic 2 Volume", AC97_MIC, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) AC97_SINGLE("Mic 20dB Boost Switch", AC97_MIC, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) AC97_SINGLE("Master Left Inv Switch", AC97_MASTER, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) AC97_SINGLE("Master ZC Switch", AC97_MASTER, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) AC97_SINGLE("Headphone ZC Switch", AC97_HEADPHONE, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) AC97_SINGLE("Mono ZC Switch", AC97_MASTER_MONO, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static int patch_wolfson_wm9711_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) for (i = 0; i < ARRAY_SIZE(wm9711_snd_ac97_controls); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm9711_snd_ac97_controls[i], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) snd_ac97_write_cache(ac97, AC97_CODEC_CLASS_REV, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) snd_ac97_write_cache(ac97, AC97_PCI_SVID, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) snd_ac97_write_cache(ac97, AC97_VIDEO, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) snd_ac97_write_cache(ac97, AC97_AUX, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) snd_ac97_write_cache(ac97, AC97_CD, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const struct snd_ac97_build_ops patch_wolfson_wm9711_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .build_specific = patch_wolfson_wm9711_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) static int patch_wolfson11(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) /* WM9711, WM9712 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ac97->build_ops = &patch_wolfson_wm9711_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ac97->flags |= AC97_HAS_NO_REC_GAIN | AC97_STEREO_MUTES | AC97_HAS_NO_MIC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) AC97_HAS_NO_PC_BEEP | AC97_HAS_NO_VIDEO | AC97_HAS_NO_CD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static const char* wm9713_mic_mixer[] = {"Stereo", "Mic 1", "Mic 2", "Mute"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) static const char* wm9713_rec_mux[] = {"Stereo", "Left", "Right", "Mute"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static const char* wm9713_rec_src[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) {"Mic 1", "Mic 2", "Line", "Mono In", "Headphone Mix", "Master Mix",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) "Mono Mix", "Zh"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static const char* wm9713_rec_gain[] = {"+1.5dB Steps", "+0.75dB Steps"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) static const char* wm9713_alc_select[] = {"None", "Left", "Right", "Stereo"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) static const char* wm9713_mono_pga[] = {"Vmid", "Zh", "Mono Mix", "Inv 1"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static const char* wm9713_spk_pga[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) {"Vmid", "Zh", "Headphone Mix", "Master Mix", "Inv", "NC", "NC", "NC"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static const char* wm9713_hp_pga[] = {"Vmid", "Zh", "Headphone Mix", "NC"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) static const char* wm9713_out3_pga[] = {"Vmid", "Zh", "Inv 1", "NC"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static const char* wm9713_out4_pga[] = {"Vmid", "Zh", "Inv 2", "NC"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static const char* wm9713_dac_inv[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {"Off", "Mono Mix", "Master Mix", "Headphone Mix L", "Headphone Mix R",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) "Headphone Mix Mono", "NC", "Vmid"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) static const char* wm9713_base[] = {"Linear Control", "Adaptive Boost"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static const char* wm9713_ng_type[] = {"Constant Gain", "Mute"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static const struct ac97_enum wm9713_enum[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) AC97_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) AC97_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) AC97_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) AC97_ENUM_DOUBLE(AC97_VIDEO, 3, 0, 8, wm9713_rec_src),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) AC97_ENUM_DOUBLE(AC97_CD, 14, 6, 2, wm9713_rec_gain),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) AC97_ENUM_SINGLE(AC97_PCI_SVID, 14, 4, wm9713_alc_select),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) AC97_ENUM_SINGLE(AC97_REC_GAIN, 14, 4, wm9713_mono_pga),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) AC97_ENUM_DOUBLE(AC97_REC_GAIN, 11, 8, 8, wm9713_spk_pga),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) AC97_ENUM_DOUBLE(AC97_REC_GAIN, 6, 4, 4, wm9713_hp_pga),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) AC97_ENUM_SINGLE(AC97_REC_GAIN, 2, 4, wm9713_out3_pga),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) AC97_ENUM_SINGLE(AC97_REC_GAIN, 0, 4, wm9713_out4_pga),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) AC97_ENUM_DOUBLE(AC97_REC_GAIN_MIC, 13, 10, 8, wm9713_dac_inv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 15, 2, wm9713_base),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) AC97_ENUM_SINGLE(AC97_PCI_SVID, 5, 2, wm9713_ng_type),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) static const struct snd_kcontrol_new wm13_snd_ac97_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) AC97_DOUBLE("Line In Volume", AC97_PC_BEEP, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) AC97_SINGLE("Line In to Headphone Switch", AC97_PC_BEEP, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) AC97_SINGLE("Line In to Master Switch", AC97_PC_BEEP, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) AC97_SINGLE("Line In to Mono Switch", AC97_PC_BEEP, 13, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) AC97_DOUBLE("PCM Playback Volume", AC97_PHONE, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) AC97_SINGLE("PCM Playback to Headphone Switch", AC97_PHONE, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) AC97_SINGLE("PCM Playback to Master Switch", AC97_PHONE, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) AC97_SINGLE("PCM Playback to Mono Switch", AC97_PHONE, 13, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) AC97_SINGLE("Mic 1 Volume", AC97_MIC, 8, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) AC97_SINGLE("Mic 2 Volume", AC97_MIC, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) AC97_SINGLE("Mic 1 to Mono Switch", AC97_LINE, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) AC97_SINGLE("Mic 2 to Mono Switch", AC97_LINE, 6, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) AC97_SINGLE("Mic Boost (+20dB) Switch", AC97_LINE, 5, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) AC97_ENUM("Mic to Headphone Mux", wm9713_enum[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) AC97_SINGLE("Mic Headphone Mixer Volume", AC97_LINE, 0, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) AC97_SINGLE("Capture Switch", AC97_CD, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) AC97_ENUM("Capture Volume Steps", wm9713_enum[4]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) AC97_DOUBLE("Capture Volume", AC97_CD, 8, 0, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) AC97_SINGLE("Capture ZC Switch", AC97_CD, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) AC97_ENUM("Capture to Headphone Mux", wm9713_enum[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) AC97_SINGLE("Capture to Headphone Volume", AC97_VIDEO, 11, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) AC97_ENUM("Capture to Mono Mux", wm9713_enum[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) AC97_SINGLE("Capture to Mono Boost (+20dB) Switch", AC97_VIDEO, 8, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) AC97_SINGLE("Capture ADC Boost (+20dB) Switch", AC97_VIDEO, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) AC97_ENUM("Capture Select", wm9713_enum[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) AC97_SINGLE("ALC Target Volume", AC97_CODEC_CLASS_REV, 12, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) AC97_SINGLE("ALC Hold Time", AC97_CODEC_CLASS_REV, 8, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) AC97_SINGLE("ALC Decay Time ", AC97_CODEC_CLASS_REV, 4, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) AC97_SINGLE("ALC Attack Time", AC97_CODEC_CLASS_REV, 0, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) AC97_ENUM("ALC Function", wm9713_enum[5]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) AC97_SINGLE("ALC Max Volume", AC97_PCI_SVID, 11, 7, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) AC97_SINGLE("ALC ZC Timeout", AC97_PCI_SVID, 9, 3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) AC97_SINGLE("ALC ZC Switch", AC97_PCI_SVID, 8, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) AC97_SINGLE("ALC NG Switch", AC97_PCI_SVID, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) AC97_ENUM("ALC NG Type", wm9713_enum[13]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) AC97_SINGLE("ALC NG Threshold", AC97_PCI_SVID, 0, 31, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) AC97_DOUBLE("Master ZC Switch", AC97_MASTER, 14, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) AC97_DOUBLE("Headphone ZC Switch", AC97_HEADPHONE, 14, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) AC97_DOUBLE("Out3/4 ZC Switch", AC97_MASTER_MONO, 14, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) AC97_SINGLE("Master Right Switch", AC97_MASTER, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) AC97_SINGLE("Headphone Right Switch", AC97_HEADPHONE, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) AC97_SINGLE("Out3/4 Right Switch", AC97_MASTER_MONO, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) AC97_SINGLE("Mono In to Headphone Switch", AC97_MASTER_TONE, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) AC97_SINGLE("Mono In to Master Switch", AC97_MASTER_TONE, 14, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) AC97_SINGLE("Mono In Volume", AC97_MASTER_TONE, 8, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) AC97_SINGLE("Mono Switch", AC97_MASTER_TONE, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) AC97_SINGLE("Mono ZC Switch", AC97_MASTER_TONE, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) AC97_SINGLE("Mono Volume", AC97_MASTER_TONE, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) AC97_SINGLE("Beep to Headphone Switch", AC97_AUX, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) AC97_SINGLE("Beep to Headphone Volume", AC97_AUX, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) AC97_SINGLE("Beep to Master Switch", AC97_AUX, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) AC97_SINGLE("Beep to Master Volume", AC97_AUX, 8, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) AC97_SINGLE("Beep to Mono Switch", AC97_AUX, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) AC97_SINGLE("Beep to Mono Volume", AC97_AUX, 4, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) AC97_SINGLE("Voice to Headphone Switch", AC97_PCM, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) AC97_SINGLE("Voice to Headphone Volume", AC97_PCM, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) AC97_SINGLE("Voice to Master Switch", AC97_PCM, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) AC97_SINGLE("Voice to Master Volume", AC97_PCM, 8, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) AC97_SINGLE("Voice to Mono Switch", AC97_PCM, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) AC97_SINGLE("Voice to Mono Volume", AC97_PCM, 4, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) AC97_SINGLE("Aux to Headphone Switch", AC97_REC_SEL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) AC97_SINGLE("Aux to Headphone Volume", AC97_REC_SEL, 12, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) AC97_SINGLE("Aux to Master Switch", AC97_REC_SEL, 11, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) AC97_SINGLE("Aux to Master Volume", AC97_REC_SEL, 8, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) AC97_SINGLE("Aux to Mono Switch", AC97_REC_SEL, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) AC97_SINGLE("Aux to Mono Volume", AC97_REC_SEL, 4, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) AC97_ENUM("Mono Input Mux", wm9713_enum[6]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) AC97_ENUM("Master Input Mux", wm9713_enum[7]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) AC97_ENUM("Headphone Input Mux", wm9713_enum[8]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) AC97_ENUM("Out 3 Input Mux", wm9713_enum[9]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) AC97_ENUM("Out 4 Input Mux", wm9713_enum[10]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) AC97_ENUM("Bass Control", wm9713_enum[12]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) AC97_SINGLE("Bass Cut-off Switch", AC97_GENERAL_PURPOSE, 12, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) AC97_SINGLE("Tone Cut-off Switch", AC97_GENERAL_PURPOSE, 4, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) AC97_SINGLE("Playback Attenuate (-6dB) Switch", AC97_GENERAL_PURPOSE, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) AC97_SINGLE("Bass Volume", AC97_GENERAL_PURPOSE, 8, 15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) AC97_SINGLE("Tone Volume", AC97_GENERAL_PURPOSE, 0, 15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static const struct snd_kcontrol_new wm13_snd_ac97_controls_3d[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) AC97_ENUM("Inv Input Mux", wm9713_enum[11]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) AC97_SINGLE("3D Upper Cut-off Switch", AC97_REC_GAIN_MIC, 5, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) AC97_SINGLE("3D Lower Cut-off Switch", AC97_REC_GAIN_MIC, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) AC97_SINGLE("3D Depth", AC97_REC_GAIN_MIC, 0, 15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) static int patch_wolfson_wm9713_3d (struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_3d); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_3d[i], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) static int patch_wolfson_wm9713_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) int err, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls[i], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) snd_ac97_write_cache(ac97, AC97_PHONE, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) snd_ac97_write_cache(ac97, AC97_MIC, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) snd_ac97_write_cache(ac97, AC97_LINE, 0x00da);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) snd_ac97_write_cache(ac97, AC97_CD, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) snd_ac97_write_cache(ac97, AC97_VIDEO, 0xd612);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x1ba0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) static void patch_wolfson_wm9713_suspend (struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xfeff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static void patch_wolfson_wm9713_resume (struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xda00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0x3810);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) static const struct snd_ac97_build_ops patch_wolfson_wm9713_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .build_specific = patch_wolfson_wm9713_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .build_3d = patch_wolfson_wm9713_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .suspend = patch_wolfson_wm9713_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .resume = patch_wolfson_wm9713_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static int patch_wolfson13(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) /* WM9713, WM9714 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ac97->build_ops = &patch_wolfson_wm9713_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) ac97->flags |= AC97_HAS_NO_REC_GAIN | AC97_STEREO_MUTES | AC97_HAS_NO_PHONE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) AC97_HAS_NO_PC_BEEP | AC97_HAS_NO_VIDEO | AC97_HAS_NO_CD | AC97_HAS_NO_TONE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) AC97_HAS_NO_STD_PCM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) ac97->scaps &= ~AC97_SCAP_MODEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xda00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0x3810);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) * Tritech codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) static int patch_tritech_tr28028(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) snd_ac97_write_cache(ac97, 0x26, 0x0300);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) snd_ac97_write_cache(ac97, 0x26, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) snd_ac97_write_cache(ac97, AC97_SURROUND_MASTER, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) snd_ac97_write_cache(ac97, AC97_SPDIF, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) * Sigmatel STAC97xx codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static int patch_sigmatel_stac9700_3d(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 2, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static int patch_sigmatel_stac9708_3d(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 0, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) strcpy(kctl->id.name, "3D Control Sigmatel - Rear Depth");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 2, 3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) static const struct snd_kcontrol_new snd_ac97_sigmatel_4speaker =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) AC97_SINGLE("Sigmatel 4-Speaker Stereo Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) AC97_SIGMATEL_DAC2INVERT, 2, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) /* "Sigmatel " removed due to excessive name length: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) static const struct snd_kcontrol_new snd_ac97_sigmatel_phaseinvert =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) AC97_SINGLE("Surround Phase Inversion Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) AC97_SIGMATEL_DAC2INVERT, 3, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) static const struct snd_kcontrol_new snd_ac97_sigmatel_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) AC97_SINGLE("Sigmatel DAC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) AC97_SINGLE("Sigmatel ADC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 0, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) static int patch_sigmatel_stac97xx_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) snd_ac97_write_cache(ac97, AC97_SIGMATEL_ANALOG, snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) & ~0x0003);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[0], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[1], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_4speaker, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_phaseinvert, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) static const struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) .build_3d = patch_sigmatel_stac9700_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) .build_specific = patch_sigmatel_stac97xx_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) static int patch_sigmatel_stac9700(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) ac97->build_ops = &patch_sigmatel_stac9700_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) static int snd_ac97_stac9708_put_bias(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) mutex_lock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) snd_ac97_write(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) err = snd_ac97_update_bits(ac97, AC97_SIGMATEL_BIAS2, 0x0010,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) (ucontrol->value.integer.value[0] & 1) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) snd_ac97_write(ac97, AC97_SIGMATEL_BIAS1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) mutex_unlock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) static const struct snd_kcontrol_new snd_ac97_stac9708_bias_control = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) .name = "Sigmatel Output Bias Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .info = snd_ac97_info_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) .get = snd_ac97_get_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) .put = snd_ac97_stac9708_put_bias,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .private_value = AC97_SINGLE_VALUE(AC97_SIGMATEL_BIAS2, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) static int patch_sigmatel_stac9708_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) /* the register bit is writable, but the function is not implemented: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) snd_ac97_remove_ctl(ac97, "PCM Out Path & Mute", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Sigmatel Surround Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if ((err = patch_build_controls(ac97, &snd_ac97_stac9708_bias_control, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) return patch_sigmatel_stac97xx_specific(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static const struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) .build_3d = patch_sigmatel_stac9708_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) .build_specific = patch_sigmatel_stac9708_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) static int patch_sigmatel_stac9708(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) unsigned int codec72, codec6c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) ac97->build_ops = &patch_sigmatel_stac9708_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) ac97->caps |= 0x10; /* HP (sigmatel surround) support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) codec72 = snd_ac97_read(ac97, AC97_SIGMATEL_BIAS2) & 0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) codec6c = snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if ((codec72==0) && (codec6c==0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0007);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) } else if ((codec72==0x8000) && (codec6c==0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x1001);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) snd_ac97_write_cache(ac97, AC97_SIGMATEL_DAC2INVERT, 0x0008);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) } else if ((codec72==0x8000) && (codec6c==0x0080)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) static int patch_sigmatel_stac9721(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) ac97->build_ops = &patch_sigmatel_stac9700_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) if (snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) // patch for SigmaTel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x4000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) static int patch_sigmatel_stac9744(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) // patch for SigmaTel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) ac97->build_ops = &patch_sigmatel_stac9700_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) static int patch_sigmatel_stac9756(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) // patch for SigmaTel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) ac97->build_ops = &patch_sigmatel_stac9700_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) static int snd_ac97_stac9758_output_jack_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) static const char * const texts[5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) "Input/Disabled", "Front Output",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) "Rear Output", "Center/LFE Output", "Mixer Output" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) return snd_ctl_enum_info(uinfo, 1, 5, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) static int snd_ac97_stac9758_output_jack_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) int shift = kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) val = ac97->regs[AC97_SIGMATEL_OUTSEL] >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) if (!(val & 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) ucontrol->value.enumerated.item[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) ucontrol->value.enumerated.item[0] = 1 + (val & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) static int snd_ac97_stac9758_output_jack_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) int shift = kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) if (ucontrol->value.enumerated.item[0] > 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) if (ucontrol->value.enumerated.item[0] == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) val = 4 | (ucontrol->value.enumerated.item[0] - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) return ac97_update_bits_page(ac97, AC97_SIGMATEL_OUTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 7 << shift, val << shift, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) static int snd_ac97_stac9758_input_jack_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) static const char * const texts[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) "Mic2 Jack", "Mic1 Jack", "Line In Jack",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) "Front Jack", "Rear Jack", "Center/LFE Jack", "Mute" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) return snd_ctl_enum_info(uinfo, 1, 7, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) static int snd_ac97_stac9758_input_jack_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) int shift = kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) val = ac97->regs[AC97_SIGMATEL_INSEL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) ucontrol->value.enumerated.item[0] = (val >> shift) & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) static int snd_ac97_stac9758_input_jack_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) int shift = kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return ac97_update_bits_page(ac97, AC97_SIGMATEL_INSEL, 7 << shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) ucontrol->value.enumerated.item[0] << shift, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) static int snd_ac97_stac9758_phonesel_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) static const char * const texts[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) "None", "Front Jack", "Rear Jack"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) return snd_ctl_enum_info(uinfo, 1, 3, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) static int snd_ac97_stac9758_phonesel_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) ucontrol->value.enumerated.item[0] = ac97->regs[AC97_SIGMATEL_IOMISC] & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) static int snd_ac97_stac9758_phonesel_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) return ac97_update_bits_page(ac97, AC97_SIGMATEL_IOMISC, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) ucontrol->value.enumerated.item[0], 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) #define STAC9758_OUTPUT_JACK(xname, shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) .info = snd_ac97_stac9758_output_jack_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) .get = snd_ac97_stac9758_output_jack_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) .put = snd_ac97_stac9758_output_jack_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) .private_value = shift }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) #define STAC9758_INPUT_JACK(xname, shift) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) .info = snd_ac97_stac9758_input_jack_info, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) .get = snd_ac97_stac9758_input_jack_get, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) .put = snd_ac97_stac9758_input_jack_put, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) .private_value = shift }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) static const struct snd_kcontrol_new snd_ac97_sigmatel_stac9758_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) STAC9758_OUTPUT_JACK("Mic1 Jack", 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) STAC9758_OUTPUT_JACK("LineIn Jack", 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) STAC9758_OUTPUT_JACK("Front Jack", 7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) STAC9758_OUTPUT_JACK("Rear Jack", 10),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) STAC9758_OUTPUT_JACK("Center/LFE Jack", 13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) STAC9758_INPUT_JACK("Mic Input Source", 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) STAC9758_INPUT_JACK("Line Input Source", 8),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) .name = "Headphone Amp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) .info = snd_ac97_stac9758_phonesel_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) .get = snd_ac97_stac9758_phonesel_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) .put = snd_ac97_stac9758_phonesel_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) AC97_SINGLE("Exchange Center/LFE", AC97_SIGMATEL_IOMISC, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) AC97_SINGLE("Headphone +3dB Boost", AC97_SIGMATEL_IOMISC, 8, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) static int patch_sigmatel_stac9758_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) err = patch_sigmatel_stac97xx_specific(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) err = patch_build_controls(ac97, snd_ac97_sigmatel_stac9758_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) ARRAY_SIZE(snd_ac97_sigmatel_stac9758_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /* DAC-A direct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Front Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) /* DAC-A to Mix = PCM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) /* DAC-B direct = Surround */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) /* DAC-B to Mix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) snd_ac97_rename_vol_ctl(ac97, "Video Playback", "Surround Mix Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) /* DAC-C direct = Center/LFE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) static const struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) .build_3d = patch_sigmatel_stac9700_3d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) .build_specific = patch_sigmatel_stac9758_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) static int patch_sigmatel_stac9758(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) static const unsigned short regs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) AC97_SIGMATEL_OUTSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) AC97_SIGMATEL_IOMISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) AC97_SIGMATEL_INSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) AC97_SIGMATEL_VARIOUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) static const unsigned short def_regs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) /* OUTSEL */ 0xd794, /* CL:CL, SR:SR, LO:MX, LI:DS, MI:DS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) /* IOMISC */ 0x2001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) /* INSEL */ 0x0201, /* LI:LI, MI:M1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) /* VARIOUS */ 0x0040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) static const unsigned short m675_regs[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) /* OUTSEL */ 0xfc70, /* CL:MX, SR:MX, LO:DS, LI:MX, MI:DS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) /* IOMISC */ 0x2102, /* HP amp on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /* INSEL */ 0x0203, /* LI:LI, MI:FR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) /* VARIOUS */ 0x0041 /* stereo mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) const unsigned short *pregs = def_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) /* Gateway M675 notebook */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) if (ac97->pci &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) ac97->subsystem_vendor == 0x107b &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) ac97->subsystem_device == 0x0601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) pregs = m675_regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) // patch for SigmaTel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) ac97->build_ops = &patch_sigmatel_stac9758_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) /* FIXME: assume only page 0 for writing cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) snd_ac97_write_cache(ac97, regs[i], pregs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) * Cirrus Logic CS42xx codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) static const struct snd_kcontrol_new snd_ac97_cirrus_controls_spdif[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CSR_SPDIF, 15, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA", AC97_CSR_ACMODE, 0, 3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) static int patch_cirrus_build_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) /* con mask, pro mask, default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) /* switch, spsa */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[0], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) switch (ac97->id & AC97_ID_CS_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) case AC97_ID_CS4205:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[1], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) /* set default PCM S/PDIF params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) snd_ac97_write_cache(ac97, AC97_CSR_SPDIF, 0x0a20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) static const struct snd_ac97_build_ops patch_cirrus_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) .build_spdif = patch_cirrus_build_spdif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) static int patch_cirrus_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) /* Basically, the cs4201/cs4205/cs4297a has non-standard sp/dif registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) WHY CAN'T ANYONE FOLLOW THE BLOODY SPEC? *sigh*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) - sp/dif EA ID is not set, but sp/dif is always present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) - enable/disable is spdif register bit 15.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) - sp/dif control register is 0x68. differs from AC97:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) - valid is bit 14 (vs 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) - no DRS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) - only 44.1/48k [00 = 48, 01=44,1] (AC97 is 00=44.1, 10=48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) - sp/dif ssource select is in 0x5e bits 0,1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) ac97->build_ops = &patch_cirrus_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) ac97->flags |= AC97_CS_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) ac97->rates[AC97_RATES_SPDIF] &= ~SNDRV_PCM_RATE_32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) snd_ac97_write_cache(ac97, AC97_CSR_ACMODE, 0x0080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) static int patch_cirrus_cs4299(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) /* force the detection of PC Beep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) ac97->flags |= AC97_HAS_PC_BEEP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) return patch_cirrus_spdif(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) * Conexant codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) static const struct snd_kcontrol_new snd_ac97_conexant_controls_spdif[1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CXR_AUDIO_MISC, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) static int patch_conexant_build_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) /* con mask, pro mask, default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) /* switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) if ((err = patch_build_controls(ac97, &snd_ac97_conexant_controls_spdif[0], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) /* set default PCM S/PDIF params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) snd_ac97_write_cache(ac97, AC97_CXR_AUDIO_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) snd_ac97_read(ac97, AC97_CXR_AUDIO_MISC) & ~(AC97_CXR_SPDIFEN|AC97_CXR_COPYRGT|AC97_CXR_SPDIF_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) static const struct snd_ac97_build_ops patch_conexant_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) .build_spdif = patch_conexant_build_spdif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) static int patch_conexant(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) ac97->build_ops = &patch_conexant_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) ac97->flags |= AC97_CX_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) static int patch_cx20551(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) snd_ac97_update_bits(ac97, 0x5c, 0x01, 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) * Analog Devices AD18xx, AD19xx codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) static void ad18xx_resume(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) static const unsigned short setup_regs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) AC97_AD_MISC, AC97_AD_SERIAL_CFG, AC97_AD_JACK_SPDIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) int i, codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) for (i = 0; i < (int)ARRAY_SIZE(setup_regs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) unsigned short reg = setup_regs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) if (test_bit(reg, ac97->reg_accessed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) snd_ac97_write(ac97, reg, ac97->regs[reg]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) if (! (ac97->flags & AC97_AD_MULTI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* normal restore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) snd_ac97_restore_status(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) /* restore the AD18xx codec configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) for (codec = 0; codec < 3; codec++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) if (! ac97->spec.ad18xx.id[codec])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) /* select single codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) ac97->bus->ops->write(ac97, AC97_AD_CODEC_CFG, ac97->spec.ad18xx.codec_cfg[codec]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* select all codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) /* restore status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) for (i = 2; i < 0x7c ; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) if (i == AC97_POWERDOWN || i == AC97_EXTENDED_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) if (test_bit(i, ac97->reg_accessed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) /* handle multi codecs for AD18xx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) if (i == AC97_PCM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) for (codec = 0; codec < 3; codec++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) if (! ac97->spec.ad18xx.id[codec])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /* select single codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) /* update PCM bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) ac97->bus->ops->write(ac97, AC97_PCM, ac97->spec.ad18xx.pcmreg[codec]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) /* select all codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) } else if (i == AC97_AD_TEST ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) i == AC97_AD_CODEC_CFG ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) i == AC97_AD_SERIAL_CFG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) continue; /* ignore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) snd_ac97_write(ac97, i, ac97->regs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) snd_ac97_read(ac97, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) snd_ac97_restore_iec958(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) static void ad1888_resume(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) ad18xx_resume(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) snd_ac97_write_cache(ac97, AC97_CODEC_CLASS_REV, 0x8080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) static const struct snd_ac97_res_table ad1819_restbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) { AC97_PHONE, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) { AC97_MIC, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) { AC97_LINE, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) { AC97_CD, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) { AC97_VIDEO, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) { AC97_AUX, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) { AC97_PCM, 0x9f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) { } /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) static int patch_ad1819(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) unsigned short scfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) // patch for Analog Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) scfg = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, scfg | 0x7000); /* select all codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) ac97->res_table = ad1819_restbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) static unsigned short patch_ad1881_unchained(struct snd_ac97 * ac97, int idx, unsigned short mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) // test for unchained codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0000); /* ID0C, ID1C, SDIE = off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) val = snd_ac97_read(ac97, AC97_VENDOR_ID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if ((val & 0xff40) != 0x5340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) ac97->spec.ad18xx.unchained[idx] = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) ac97->spec.ad18xx.id[idx] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) ac97->spec.ad18xx.codec_cfg[idx] = 0x0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) return mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) static int patch_ad1881_chained1(struct snd_ac97 * ac97, int idx, unsigned short codec_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) static const int cfg_bits[3] = { 1<<12, 1<<14, 1<<13 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, cfg_bits[idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0004); // SDIE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) val = snd_ac97_read(ac97, AC97_VENDOR_ID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) if ((val & 0xff40) != 0x5340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) if (codec_bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, codec_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) ac97->spec.ad18xx.chained[idx] = cfg_bits[idx];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) ac97->spec.ad18xx.id[idx] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) ac97->spec.ad18xx.codec_cfg[idx] = codec_bits ? codec_bits : 0x0004;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) static void patch_ad1881_chained(struct snd_ac97 * ac97, int unchained_idx, int cidx1, int cidx2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) // already detected?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) if (ac97->spec.ad18xx.unchained[cidx1] || ac97->spec.ad18xx.chained[cidx1])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) cidx1 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) if (ac97->spec.ad18xx.unchained[cidx2] || ac97->spec.ad18xx.chained[cidx2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) cidx2 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if (cidx1 < 0 && cidx2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) // test for chained codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) ac97->spec.ad18xx.unchained[unchained_idx]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0002); // ID1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) ac97->spec.ad18xx.codec_cfg[unchained_idx] = 0x0002;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) if (cidx1 >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) if (cidx2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) patch_ad1881_chained1(ac97, cidx1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) else if (patch_ad1881_chained1(ac97, cidx1, 0x0006)) // SDIE | ID1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) patch_ad1881_chained1(ac97, cidx2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) else if (patch_ad1881_chained1(ac97, cidx2, 0x0006)) // SDIE | ID1C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) patch_ad1881_chained1(ac97, cidx1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) } else if (cidx2 >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) patch_ad1881_chained1(ac97, cidx2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) static const struct snd_ac97_build_ops patch_ad1881_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) .resume = ad18xx_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) static int patch_ad1881(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) static const char cfg_idxs[3][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) {2, 1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) {0, 2},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) {0, 1}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) // patch for Analog Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) unsigned short codecs[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) int idx, num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) val = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) codecs[0] = patch_ad1881_unchained(ac97, 0, (1<<12));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) codecs[1] = patch_ad1881_unchained(ac97, 1, (1<<14));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) codecs[2] = patch_ad1881_unchained(ac97, 2, (1<<13));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) if (! (codecs[0] || codecs[1] || codecs[2]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) goto __end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) for (idx = 0; idx < 3; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) if (ac97->spec.ad18xx.unchained[idx])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) patch_ad1881_chained(ac97, idx, cfg_idxs[idx][0], cfg_idxs[idx][1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) if (ac97->spec.ad18xx.id[1]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) ac97->flags |= AC97_AD_MULTI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) ac97->scaps |= AC97_SCAP_SURROUND_DAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) if (ac97->spec.ad18xx.id[2]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) ac97->flags |= AC97_AD_MULTI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) ac97->scaps |= AC97_SCAP_CENTER_LFE_DAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) __end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) /* select all codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) /* check if only one codec is present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) for (idx = num = 0; idx < 3; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) if (ac97->spec.ad18xx.id[idx])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) num++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) if (num == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) /* ok, deselect all ID bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) ac97->spec.ad18xx.codec_cfg[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) ac97->spec.ad18xx.codec_cfg[1] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) ac97->spec.ad18xx.codec_cfg[2] = 0x0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) /* required for AD1886/AD1885 combination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) ac97->ext_id = snd_ac97_read(ac97, AC97_EXTENDED_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) if (ac97->spec.ad18xx.id[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) ac97->id &= 0xffff0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) ac97->id |= ac97->spec.ad18xx.id[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) ac97->build_ops = &patch_ad1881_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) static const struct snd_kcontrol_new snd_ac97_controls_ad1885[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) AC97_SINGLE("Digital Mono Direct", AC97_AD_MISC, 11, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) /* AC97_SINGLE("Digital Audio Mode", AC97_AD_MISC, 12, 1, 0), */ /* seems problematic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) AC97_SINGLE("Low Power Mixer", AC97_AD_MISC, 14, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) AC97_SINGLE("Zero Fill DAC", AC97_AD_MISC, 15, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 9, 1, 1), /* inverted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 8, 1, 1), /* inverted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) static const DECLARE_TLV_DB_SCALE(db_scale_6bit_6db_max, -8850, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) static int patch_ad1885_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if ((err = patch_build_controls(ac97, snd_ac97_controls_ad1885, ARRAY_SIZE(snd_ac97_controls_ad1885))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) reset_tlv(ac97, "Headphone Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) db_scale_6bit_6db_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) static const struct snd_ac97_build_ops patch_ad1885_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) .build_specific = &patch_ad1885_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) .resume = ad18xx_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) static int patch_ad1885(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) /* This is required to deal with the Intel D815EEAL2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) /* i.e. Line out is actually headphone out from codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) /* set default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) snd_ac97_write_cache(ac97, AC97_AD_MISC, 0x0404);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) ac97->build_ops = &patch_ad1885_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) static int patch_ad1886_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) reset_tlv(ac97, "Headphone Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) db_scale_6bit_6db_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) static const struct snd_ac97_build_ops patch_ad1886_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) .build_specific = &patch_ad1886_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) .resume = ad18xx_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) static int patch_ad1886(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) /* Presario700 workaround */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) /* for Jack Sense/SPDIF Register misetting causing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) snd_ac97_write_cache(ac97, AC97_AD_JACK_SPDIF, 0x0010);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) ac97->build_ops = &patch_ad1886_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) /* MISC bits (AD1888/AD1980/AD1985 register 0x76) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) #define AC97_AD198X_MBC 0x0003 /* mic boost */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) #define AC97_AD198X_MBC_20 0x0000 /* +20dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) #define AC97_AD198X_MBC_10 0x0001 /* +10dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) #define AC97_AD198X_MBC_30 0x0002 /* +30dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) #define AC97_AD198X_VREFD 0x0004 /* VREF high-Z */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) #define AC97_AD198X_VREFH 0x0008 /* 0=2.25V, 1=3.7V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) #define AC97_AD198X_VREF_0 0x000c /* 0V (AD1985 only) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) #define AC97_AD198X_VREF_MASK (AC97_AD198X_VREFH | AC97_AD198X_VREFD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) #define AC97_AD198X_VREF_SHIFT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) #define AC97_AD198X_SRU 0x0010 /* sample rate unlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) #define AC97_AD198X_LOSEL 0x0020 /* LINE_OUT amplifiers input select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) #define AC97_AD198X_2MIC 0x0040 /* 2-channel mic select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) #define AC97_AD198X_SPRD 0x0080 /* SPREAD enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) #define AC97_AD198X_DMIX0 0x0100 /* downmix mode: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) /* 0 = 6-to-4, 1 = 6-to-2 downmix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) #define AC97_AD198X_DMIX1 0x0200 /* downmix mode: 1 = enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) #define AC97_AD198X_HPSEL 0x0400 /* headphone amplifier input select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) #define AC97_AD198X_CLDIS 0x0800 /* center/lfe disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) #define AC97_AD198X_LODIS 0x1000 /* LINE_OUT disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) #define AC97_AD198X_MSPLT 0x2000 /* mute split */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) #define AC97_AD198X_AC97NC 0x4000 /* AC97 no compatible mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) #define AC97_AD198X_DACZ 0x8000 /* DAC zero-fill mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) /* MISC 1 bits (AD1986 register 0x76) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) #define AC97_AD1986_MBC 0x0003 /* mic boost */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) #define AC97_AD1986_MBC_20 0x0000 /* +20dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) #define AC97_AD1986_MBC_10 0x0001 /* +10dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) #define AC97_AD1986_MBC_30 0x0002 /* +30dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) #define AC97_AD1986_LISEL0 0x0004 /* LINE_IN select bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) #define AC97_AD1986_LISEL1 0x0008 /* LINE_IN select bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) #define AC97_AD1986_LISEL_MASK (AC97_AD1986_LISEL1 | AC97_AD1986_LISEL0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) #define AC97_AD1986_LISEL_LI 0x0000 /* LINE_IN pins as LINE_IN source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) #define AC97_AD1986_LISEL_SURR 0x0004 /* SURROUND pins as LINE_IN source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) #define AC97_AD1986_LISEL_MIC 0x0008 /* MIC_1/2 pins as LINE_IN source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) #define AC97_AD1986_SRU 0x0010 /* sample rate unlock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) #define AC97_AD1986_SOSEL 0x0020 /* SURROUND_OUT amplifiers input sel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) #define AC97_AD1986_2MIC 0x0040 /* 2-channel mic select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) #define AC97_AD1986_SPRD 0x0080 /* SPREAD enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) #define AC97_AD1986_DMIX0 0x0100 /* downmix mode: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) /* 0 = 6-to-4, 1 = 6-to-2 downmix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) #define AC97_AD1986_DMIX1 0x0200 /* downmix mode: 1 = enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) #define AC97_AD1986_CLDIS 0x0800 /* center/lfe disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) #define AC97_AD1986_SODIS 0x1000 /* SURROUND_OUT disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) #define AC97_AD1986_MSPLT 0x2000 /* mute split (read only 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691) #define AC97_AD1986_AC97NC 0x4000 /* AC97 no compatible mode (r/o 1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) #define AC97_AD1986_DACZ 0x8000 /* DAC zero-fill mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) /* MISC 2 bits (AD1986 register 0x70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) #define AC97_AD_MISC2 0x70 /* Misc Control Bits 2 (AD1986) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) #define AC97_AD1986_CVREF0 0x0004 /* C/LFE VREF_OUT 2.25V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) #define AC97_AD1986_CVREF1 0x0008 /* C/LFE VREF_OUT 0V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) #define AC97_AD1986_CVREF2 0x0010 /* C/LFE VREF_OUT 3.7V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) #define AC97_AD1986_CVREF_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) (AC97_AD1986_CVREF2 | AC97_AD1986_CVREF1 | AC97_AD1986_CVREF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) #define AC97_AD1986_JSMAP 0x0020 /* Jack Sense Mapping 1 = alternate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) #define AC97_AD1986_MMDIS 0x0080 /* Mono Mute Disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) #define AC97_AD1986_MVREF0 0x0400 /* MIC VREF_OUT 2.25V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) #define AC97_AD1986_MVREF1 0x0800 /* MIC VREF_OUT 0V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) #define AC97_AD1986_MVREF2 0x1000 /* MIC VREF_OUT 3.7V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) #define AC97_AD1986_MVREF_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) (AC97_AD1986_MVREF2 | AC97_AD1986_MVREF1 | AC97_AD1986_MVREF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) /* MISC 3 bits (AD1986 register 0x7a) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) #define AC97_AD_MISC3 0x7a /* Misc Control Bits 3 (AD1986) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) #define AC97_AD1986_MMIX 0x0004 /* Mic Mix, left/right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) #define AC97_AD1986_GPO 0x0008 /* General Purpose Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) #define AC97_AD1986_LOHPEN 0x0010 /* LINE_OUT headphone drive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) #define AC97_AD1986_LVREF0 0x0100 /* LINE_OUT VREF_OUT 2.25V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) #define AC97_AD1986_LVREF1 0x0200 /* LINE_OUT VREF_OUT 0V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) #define AC97_AD1986_LVREF2 0x0400 /* LINE_OUT VREF_OUT 3.7V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) #define AC97_AD1986_LVREF_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) (AC97_AD1986_LVREF2 | AC97_AD1986_LVREF1 | AC97_AD1986_LVREF0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) #define AC97_AD1986_JSINVA 0x0800 /* Jack Sense Invert SENSE_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) #define AC97_AD1986_LOSEL 0x1000 /* LINE_OUT amplifiers input select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) #define AC97_AD1986_HPSEL0 0x2000 /* Headphone amplifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) /* input select Surround DACs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) #define AC97_AD1986_HPSEL1 0x4000 /* Headphone amplifiers input */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) /* select C/LFE DACs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) #define AC97_AD1986_JSINVB 0x8000 /* Jack Sense Invert SENSE_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) /* Serial Config bits (AD1986 register 0x74) (incomplete) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) #define AC97_AD1986_OMS0 0x0100 /* Optional Mic Selector bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) #define AC97_AD1986_OMS1 0x0200 /* Optional Mic Selector bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) #define AC97_AD1986_OMS2 0x0400 /* Optional Mic Selector bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) #define AC97_AD1986_OMS_MASK \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) (AC97_AD1986_OMS2 | AC97_AD1986_OMS1 | AC97_AD1986_OMS0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) #define AC97_AD1986_OMS_M 0x0000 /* MIC_1/2 pins are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) #define AC97_AD1986_OMS_L 0x0100 /* LINE_IN pins are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) #define AC97_AD1986_OMS_C 0x0200 /* Center/LFE pins are MCI sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) #define AC97_AD1986_OMS_MC 0x0400 /* Mix of MIC and C/LFE pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) /* are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) #define AC97_AD1986_OMS_ML 0x0500 /* MIX of MIC and LINE_IN pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) /* are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) #define AC97_AD1986_OMS_LC 0x0600 /* MIX of LINE_IN and C/LFE pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) /* are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) #define AC97_AD1986_OMS_MLC 0x0700 /* MIX of MIC, LINE_IN, C/LFE pins */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) /* are MIC sources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) static int snd_ac97_ad198x_spdif_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) static const char * const texts[2] = { "AC-Link", "A/D Converter" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) return snd_ctl_enum_info(uinfo, 1, 2, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) static int snd_ac97_ad198x_spdif_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) val = ac97->regs[AC97_AD_SERIAL_CFG];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) ucontrol->value.enumerated.item[0] = (val >> 2) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) static int snd_ac97_ad198x_spdif_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) if (ucontrol->value.enumerated.item[0] > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) val = ucontrol->value.enumerated.item[0] << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) return snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x0004, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) static const struct snd_kcontrol_new snd_ac97_ad198x_spdif_source = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) .info = snd_ac97_ad198x_spdif_source_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) .get = snd_ac97_ad198x_spdif_source_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) .put = snd_ac97_ad198x_spdif_source_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) static int patch_ad198x_post_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) return patch_build_controls(ac97, &snd_ac97_ad198x_spdif_source, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) static const struct snd_kcontrol_new snd_ac97_ad1981x_jack_sense[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 11, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) /* deny list to avoid HP/Line jack-sense controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) * (SS vendor << 16 | device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) static const unsigned int ad1981_jacks_denylist[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) 0x10140523, /* Thinkpad R40 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) 0x10140534, /* Thinkpad X31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) 0x10140537, /* Thinkpad T41p */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) 0x1014053e, /* Thinkpad R40e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) 0x10140554, /* Thinkpad T42p/R50p */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) 0x10140567, /* Thinkpad T43p 2668-G7U */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) 0x10140581, /* Thinkpad X41-2527 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) 0x10280160, /* Dell Dimension 2400 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) 0x104380b0, /* Asus A7V8X-MX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) 0x11790241, /* Toshiba Satellite A-15 S127 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) 0x1179ff10, /* Toshiba P500 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) 0x144dc01a, /* Samsung NP-X20C004/SEG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) 0 /* end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) static int check_list(struct snd_ac97 *ac97, const unsigned int *list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) u32 subid = ((u32)ac97->subsystem_vendor << 16) | ac97->subsystem_device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) for (; *list; list++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) if (*list == subid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) static int patch_ad1981a_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) if (check_list(ac97, ad1981_jacks_denylist))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) return patch_build_controls(ac97, snd_ac97_ad1981x_jack_sense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) static const struct snd_ac97_build_ops patch_ad1981a_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) .build_specific = patch_ad1981a_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) .resume = ad18xx_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) /* allow list to enable HP jack-sense bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) * (SS vendor << 16 | device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) static const unsigned int ad1981_jacks_allowlist[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) 0x0e11005a, /* HP nc4000/4010 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) 0x103c0890, /* HP nc6000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) 0x103c0938, /* HP nc4220 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) 0x103c099c, /* HP nx6110 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) 0x103c0944, /* HP nc6220 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) 0x103c0934, /* HP nc8220 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) 0x103c006d, /* HP nx9105 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) 0x103c300d, /* HP Compaq dc5100 SFF(PT003AW) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) 0x17340088, /* FSC Scenic-W */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) 0 /* end */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) static void check_ad1981_hp_jack_sense(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (check_list(ac97, ad1981_jacks_allowlist))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) /* enable headphone jack sense */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) snd_ac97_update_bits(ac97, AC97_AD_JACK_SPDIF, 1<<11, 1<<11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) static int patch_ad1981a(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) ac97->build_ops = &patch_ad1981a_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD198X_MSPLT, AC97_AD198X_MSPLT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) check_ad1981_hp_jack_sense(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) static const struct snd_kcontrol_new snd_ac97_ad198x_2cmic =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) AC97_SINGLE("Stereo Mic", AC97_AD_MISC, 6, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) static int patch_ad1981b_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) if ((err = patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) if (check_list(ac97, ad1981_jacks_denylist))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) return patch_build_controls(ac97, snd_ac97_ad1981x_jack_sense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) static const struct snd_ac97_build_ops patch_ad1981b_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) .build_specific = patch_ad1981b_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) .resume = ad18xx_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) static int patch_ad1981b(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) ac97->build_ops = &patch_ad1981b_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD198X_MSPLT, AC97_AD198X_MSPLT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) check_ad1981_hp_jack_sense(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) #define snd_ac97_ad1888_lohpsel_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) static int snd_ac97_ad1888_lohpsel_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) val = ac97->regs[AC97_AD_MISC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) ucontrol->value.integer.value[0] = !(val & AC97_AD198X_LOSEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) if (ac97->spec.ad18xx.lo_as_master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) ucontrol->value.integer.value[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) !ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) static int snd_ac97_ad1888_lohpsel_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) val = !ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) if (ac97->spec.ad18xx.lo_as_master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) val = !val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) val = val ? (AC97_AD198X_LOSEL | AC97_AD198X_HPSEL) : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) return snd_ac97_update_bits(ac97, AC97_AD_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) AC97_AD198X_LOSEL | AC97_AD198X_HPSEL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) static int snd_ac97_ad1888_downmix_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) static const char * const texts[3] = {"Off", "6 -> 4", "6 -> 2"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) return snd_ctl_enum_info(uinfo, 1, 3, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) static int snd_ac97_ad1888_downmix_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) val = ac97->regs[AC97_AD_MISC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) if (!(val & AC97_AD198X_DMIX1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) ucontrol->value.enumerated.item[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) ucontrol->value.enumerated.item[0] = 1 + ((val >> 8) & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) static int snd_ac97_ad1888_downmix_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) if (ucontrol->value.enumerated.item[0] > 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) if (ucontrol->value.enumerated.item[0] == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) val = AC97_AD198X_DMIX1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) ((ucontrol->value.enumerated.item[0] - 1) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) return snd_ac97_update_bits(ac97, AC97_AD_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) AC97_AD198X_DMIX0 | AC97_AD198X_DMIX1, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) static void ad1888_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) unsigned short val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) /* clear LODIS if shared jack is to be used for Surround out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) if (!ac97->spec.ad18xx.lo_as_master && is_shared_linein(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) val |= (1 << 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) /* clear CLDIS if shared jack is to be used for C/LFE out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) if (is_shared_micin(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) val |= (1 << 11);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) /* shared Line-In */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) snd_ac97_update_bits(ac97, AC97_AD_MISC, (1 << 11) | (1 << 12), val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) static const struct snd_kcontrol_new snd_ac97_ad1888_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) .name = "Exchange Front/Surround",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) .info = snd_ac97_ad1888_lohpsel_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) .get = snd_ac97_ad1888_lohpsel_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) .put = snd_ac97_ad1888_lohpsel_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) AC97_SINGLE("V_REFOUT Enable", AC97_AD_MISC, AC97_AD_VREFD_SHIFT, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) AC97_SINGLE("High Pass Filter Enable", AC97_AD_TEST2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) AC97_AD_HPFD_SHIFT, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) AC97_SINGLE("Spread Front to Surround and Center/LFE", AC97_AD_MISC, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) .name = "Downmix",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) .info = snd_ac97_ad1888_downmix_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) .get = snd_ac97_ad1888_downmix_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) .put = snd_ac97_ad1888_downmix_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) static int patch_ad1888_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) if (!ac97->spec.ad18xx.lo_as_master) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) /* rename 0x04 as "Master" and 0x02 as "Master Surround" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) snd_ac97_rename_vol_ctl(ac97, "Master Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) "Master Surround Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) "Master Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) return patch_build_controls(ac97, snd_ac97_ad1888_controls, ARRAY_SIZE(snd_ac97_ad1888_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) static const struct snd_ac97_build_ops patch_ad1888_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) .build_specific = patch_ad1888_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) .resume = ad1888_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) .update_jacks = ad1888_update_jacks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) static int patch_ad1888(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) unsigned short misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) ac97->build_ops = &patch_ad1888_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) * LO can be used as a real line-out on some devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) * and we need to revert the front/surround mixer switches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) if (ac97->subsystem_vendor == 0x1043 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) ac97->subsystem_device == 0x1193) /* ASUS A9T laptop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) ac97->spec.ad18xx.lo_as_master = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) misc = snd_ac97_read(ac97, AC97_AD_MISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) /* AD-compatible mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) /* Stereo mutes enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) misc |= AC97_AD198X_MSPLT | AC97_AD198X_AC97NC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) if (!ac97->spec.ad18xx.lo_as_master)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) /* Switch FRONT/SURROUND LINE-OUT/HP-OUT default connection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) /* it seems that most vendors connect line-out connector to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) * headphone out of AC'97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) misc |= AC97_AD198X_LOSEL | AC97_AD198X_HPSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) snd_ac97_write_cache(ac97, AC97_AD_MISC, misc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) static int patch_ad1980_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) if ((err = patch_ad1888_specific(ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) return patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) static const struct snd_ac97_build_ops patch_ad1980_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) .build_specific = patch_ad1980_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) .resume = ad18xx_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) .update_jacks = ad1888_update_jacks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) static int patch_ad1980(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) patch_ad1888(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) ac97->build_ops = &patch_ad1980_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) static int snd_ac97_ad1985_vrefout_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) static const char * const texts[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) "High-Z", "3.7 V", "2.25 V", "0 V"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) return snd_ctl_enum_info(uinfo, 1, 4, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) static int snd_ac97_ad1985_vrefout_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) static const int reg2ctrl[4] = {2, 0, 1, 3};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) val = (ac97->regs[AC97_AD_MISC] & AC97_AD198X_VREF_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) >> AC97_AD198X_VREF_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) ucontrol->value.enumerated.item[0] = reg2ctrl[val];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) static int snd_ac97_ad1985_vrefout_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) static const int ctrl2reg[4] = {1, 2, 0, 3};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) if (ucontrol->value.enumerated.item[0] > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) val = ctrl2reg[ucontrol->value.enumerated.item[0]]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) << AC97_AD198X_VREF_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) return snd_ac97_update_bits(ac97, AC97_AD_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) AC97_AD198X_VREF_MASK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) static const struct snd_kcontrol_new snd_ac97_ad1985_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) AC97_SINGLE("Exchange Center/LFE", AC97_AD_SERIAL_CFG, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125) .name = "Exchange Front/Surround",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) .info = snd_ac97_ad1888_lohpsel_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) .get = snd_ac97_ad1888_lohpsel_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) .put = snd_ac97_ad1888_lohpsel_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) AC97_SINGLE("High Pass Filter Enable", AC97_AD_TEST2, 12, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) AC97_SINGLE("Spread Front to Surround and Center/LFE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) AC97_AD_MISC, 7, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) .name = "Downmix",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) .info = snd_ac97_ad1888_downmix_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) .get = snd_ac97_ad1888_downmix_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) .put = snd_ac97_ad1888_downmix_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) .name = "V_REFOUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) .info = snd_ac97_ad1985_vrefout_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) .get = snd_ac97_ad1985_vrefout_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) .put = snd_ac97_ad1985_vrefout_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) static void ad1985_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) ad1888_update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) /* clear OMS if shared jack is to be used for C/LFE out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 1 << 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) is_shared_micin(ac97) ? 1 << 9 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) static int patch_ad1985_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) /* rename 0x04 as "Master" and 0x02 as "Master Surround" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) snd_ac97_rename_vol_ctl(ac97, "Master Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) "Master Surround Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) if ((err = patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) return patch_build_controls(ac97, snd_ac97_ad1985_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) ARRAY_SIZE(snd_ac97_ad1985_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) static const struct snd_ac97_build_ops patch_ad1985_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) .build_specific = patch_ad1985_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) .resume = ad18xx_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) .update_jacks = ad1985_update_jacks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) static int patch_ad1985(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) unsigned short misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) ac97->build_ops = &patch_ad1985_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) misc = snd_ac97_read(ac97, AC97_AD_MISC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) /* switch front/surround line-out/hp-out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) /* AD-compatible mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) /* Stereo mutes enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) snd_ac97_write_cache(ac97, AC97_AD_MISC, misc |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) AC97_AD198X_LOSEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) AC97_AD198X_HPSEL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) AC97_AD198X_MSPLT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) AC97_AD198X_AC97NC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) /* update current jack configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) ad1985_update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) /* on AD1985 rev. 3, AC'97 revision bits are zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) ac97->ext_id = (ac97->ext_id & ~AC97_EI_REV_MASK) | AC97_EI_REV_23;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) #define snd_ac97_ad1986_bool_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) static int snd_ac97_ad1986_lososel_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) val = ac97->regs[AC97_AD_MISC3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) ucontrol->value.integer.value[0] = (val & AC97_AD1986_LOSEL) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) static int snd_ac97_ad1986_lososel_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) int ret0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) int ret1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) int sprd = (ac97->regs[AC97_AD_MISC] & AC97_AD1986_SPRD) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) ret0 = snd_ac97_update_bits(ac97, AC97_AD_MISC3, AC97_AD1986_LOSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) ucontrol->value.integer.value[0] != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) ? AC97_AD1986_LOSEL : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) if (ret0 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) return ret0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) /* SOSEL is set to values of "Spread" or "Exchange F/S" controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) ret1 = snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD1986_SOSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) (ucontrol->value.integer.value[0] != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) || sprd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) ? AC97_AD1986_SOSEL : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) if (ret1 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) return ret1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) return (ret0 > 0 || ret1 > 0) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) static int snd_ac97_ad1986_spread_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) val = ac97->regs[AC97_AD_MISC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) ucontrol->value.integer.value[0] = (val & AC97_AD1986_SPRD) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) static int snd_ac97_ad1986_spread_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) int ret0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) int ret1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) int sprd = (ac97->regs[AC97_AD_MISC3] & AC97_AD1986_LOSEL) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) ret0 = snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD1986_SPRD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) ucontrol->value.integer.value[0] != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) ? AC97_AD1986_SPRD : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) if (ret0 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) return ret0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) /* SOSEL is set to values of "Spread" or "Exchange F/S" controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) ret1 = snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD1986_SOSEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) (ucontrol->value.integer.value[0] != 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) || sprd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) ? AC97_AD1986_SOSEL : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) if (ret1 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) return ret1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) return (ret0 > 0 || ret1 > 0) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) static int snd_ac97_ad1986_miclisel_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) ucontrol->value.integer.value[0] = ac97->spec.ad18xx.swap_mic_linein;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) static int snd_ac97_ad1986_miclisel_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) unsigned char swap = ucontrol->value.integer.value[0] != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) if (swap != ac97->spec.ad18xx.swap_mic_linein) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) ac97->spec.ad18xx.swap_mic_linein = swap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) if (ac97->build_ops->update_jacks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) ac97->build_ops->update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) static int snd_ac97_ad1986_vrefout_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) /* Use MIC_1/2 V_REFOUT as the "get" value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) unsigned short reg = ac97->regs[AC97_AD_MISC2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) if ((reg & AC97_AD1986_MVREF0) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) val = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) else if ((reg & AC97_AD1986_MVREF1) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) val = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) else if ((reg & AC97_AD1986_MVREF2) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) val = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) ucontrol->value.enumerated.item[0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) static int snd_ac97_ad1986_vrefout_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) unsigned short cval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) unsigned short lval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) unsigned short mval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) int cret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) int lret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) int mret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) switch (ucontrol->value.enumerated.item[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) case 0: /* High-Z */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) cval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) lval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) mval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) case 1: /* 3.7 V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348) cval = AC97_AD1986_CVREF2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) lval = AC97_AD1986_LVREF2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) mval = AC97_AD1986_MVREF2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) case 2: /* 2.25 V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) cval = AC97_AD1986_CVREF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) lval = AC97_AD1986_LVREF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) mval = AC97_AD1986_MVREF0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) case 3: /* 0 V */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) cval = AC97_AD1986_CVREF1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) lval = AC97_AD1986_LVREF1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) mval = AC97_AD1986_MVREF1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) cret = snd_ac97_update_bits(ac97, AC97_AD_MISC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) AC97_AD1986_CVREF_MASK, cval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) if (cret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) return cret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) lret = snd_ac97_update_bits(ac97, AC97_AD_MISC3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) AC97_AD1986_LVREF_MASK, lval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) if (lret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) return lret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) mret = snd_ac97_update_bits(ac97, AC97_AD_MISC2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) AC97_AD1986_MVREF_MASK, mval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) if (mret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377) return mret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) return (cret > 0 || lret > 0 || mret > 0) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) static const struct snd_kcontrol_new snd_ac97_ad1986_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) AC97_SINGLE("Exchange Center/LFE", AC97_AD_SERIAL_CFG, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) .name = "Exchange Front/Surround",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) .info = snd_ac97_ad1986_bool_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) .get = snd_ac97_ad1986_lososel_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) .put = snd_ac97_ad1986_lososel_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) .name = "Exchange Mic/Line In",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) .info = snd_ac97_ad1986_bool_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) .get = snd_ac97_ad1986_miclisel_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) .put = snd_ac97_ad1986_miclisel_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) .name = "Spread Front to Surround and Center/LFE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) .info = snd_ac97_ad1986_bool_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) .get = snd_ac97_ad1986_spread_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) .put = snd_ac97_ad1986_spread_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407) .name = "Downmix",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) .info = snd_ac97_ad1888_downmix_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) .get = snd_ac97_ad1888_downmix_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) .put = snd_ac97_ad1888_downmix_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) .name = "V_REFOUT",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415) .info = snd_ac97_ad1985_vrefout_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) .get = snd_ac97_ad1986_vrefout_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) .put = snd_ac97_ad1986_vrefout_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 12, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) static void ad1986_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) unsigned short misc_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) unsigned short ser_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) /* disable SURROUND and CENTER/LFE if not surround mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) if (!is_surround_on(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) misc_val |= AC97_AD1986_SODIS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) if (!is_clfe_on(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) misc_val |= AC97_AD1986_CLDIS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) /* select line input (default=LINE_IN, SURROUND or MIC_1/2) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) if (is_shared_linein(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) misc_val |= AC97_AD1986_LISEL_SURR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) else if (ac97->spec.ad18xx.swap_mic_linein != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) misc_val |= AC97_AD1986_LISEL_MIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) snd_ac97_update_bits(ac97, AC97_AD_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) AC97_AD1986_SODIS | AC97_AD1986_CLDIS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) AC97_AD1986_LISEL_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) misc_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) /* select microphone input (MIC_1/2, Center/LFE or LINE_IN) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) if (is_shared_micin(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) ser_val = AC97_AD1986_OMS_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) else if (ac97->spec.ad18xx.swap_mic_linein != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) ser_val = AC97_AD1986_OMS_L;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) ser_val = AC97_AD1986_OMS_M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) AC97_AD1986_OMS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) ser_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) static int patch_ad1986_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) if ((err = patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) return patch_build_controls(ac97, snd_ac97_ad1986_controls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) ARRAY_SIZE(snd_ac97_ad1985_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) static const struct snd_ac97_build_ops patch_ad1986_build_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) .build_post_spdif = patch_ad198x_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) .build_specific = patch_ad1986_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) .resume = ad18xx_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) .update_jacks = ad1986_update_jacks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) static int patch_ad1986(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) patch_ad1881(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) ac97->build_ops = &patch_ad1986_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) ac97->flags |= AC97_STEREO_MUTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) /* update current jack configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) ad1986_update_jacks(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) * realtek ALC203: use mono-out for pin 37
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) static int patch_alc203(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) snd_ac97_update_bits(ac97, 0x7a, 0x400, 0x400);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) * realtek ALC65x/850 codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) static void alc650_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) int shared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) shared = is_shared_surrout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) snd_ac97_update_bits(ac97, AC97_ALC650_MULTICH, 1 << 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) shared ? (1 << 9) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) /* update shared Mic In / Center/LFE Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) shared = is_shared_clfeout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) /* disable/enable vref */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) snd_ac97_update_bits(ac97, AC97_ALC650_CLOCK, 1 << 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) shared ? (1 << 12) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516) /* turn on/off center-on-mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) snd_ac97_update_bits(ac97, AC97_ALC650_MULTICH, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) shared ? (1 << 10) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) /* GPIO0 high for mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) snd_ac97_update_bits(ac97, AC97_ALC650_GPIO_STATUS, 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) shared ? 0 : 0x100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) static int alc650_swap_surround_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) struct snd_pcm_chmap *map = ac97->chmaps[SNDRV_PCM_STREAM_PLAYBACK];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) if (map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) if (ucontrol->value.integer.value[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) map->chmap = snd_pcm_std_chmaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) map->chmap = snd_pcm_alt_chmaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) return snd_ac97_put_volsw(kcontrol, ucontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) static const struct snd_kcontrol_new snd_ac97_controls_alc650[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) AC97_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) AC97_SINGLE("Surround Down Mix", AC97_ALC650_MULTICH, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) AC97_SINGLE("Center/LFE Down Mix", AC97_ALC650_MULTICH, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) AC97_SINGLE("Exchange Center/LFE", AC97_ALC650_MULTICH, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) /* 4: Analog Input To Surround */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) /* 5: Analog Input To Center/LFE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) /* 6: Independent Master Volume Right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) /* 7: Independent Master Volume Left */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) /* 8: reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) /* 9: Line-In/Surround share */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) /* 10: Mic/CLFE share */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) /* 11-13: in IEC958 controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) .name = "Swap Surround Slot",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) .info = snd_ac97_info_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) .get = snd_ac97_get_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) .put = alc650_swap_surround_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) .private_value = AC97_SINGLE_VALUE(AC97_ALC650_MULTICH, 14, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) #if 0 /* always set in patch_alc650 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) AC97_SINGLE("IEC958 Input Clock Enable", AC97_ALC650_CLOCK, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) AC97_SINGLE("IEC958 Input Pin Enable", AC97_ALC650_CLOCK, 1, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) AC97_SINGLE("Surround DAC Switch", AC97_ALC650_SURR_DAC_VOL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) AC97_DOUBLE("Surround DAC Volume", AC97_ALC650_SURR_DAC_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) AC97_SINGLE("Center/LFE DAC Switch", AC97_ALC650_LFE_DAC_VOL, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) AC97_DOUBLE("Center/LFE DAC Volume", AC97_ALC650_LFE_DAC_VOL, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) static const struct snd_kcontrol_new snd_ac97_spdif_controls_alc650[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_ALC650_MULTICH, 11, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) AC97_SINGLE("Analog to IEC958 Output", AC97_ALC650_MULTICH, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) /* disable this controls since it doesn't work as expected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) /* AC97_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 13, 1, 0), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) static const DECLARE_TLV_DB_SCALE(db_scale_5bit_3db_max, -4350, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581) static int patch_alc650_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) if ((err = patch_build_controls(ac97, snd_ac97_controls_alc650, ARRAY_SIZE(snd_ac97_controls_alc650))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc650, ARRAY_SIZE(snd_ac97_spdif_controls_alc650))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) if (ac97->id != AC97_ID_ALC650F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) reset_tlv(ac97, "Master Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) db_scale_5bit_3db_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) static const struct snd_ac97_build_ops patch_alc650_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) .build_specific = patch_alc650_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) .update_jacks = alc650_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) static int patch_alc650(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) ac97->build_ops = &patch_alc650_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) /* determine the revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) val = snd_ac97_read(ac97, AC97_ALC650_REVISION) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) if (val < 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) ac97->id = 0x414c4720; /* Old version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) else if (val < 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) ac97->id = 0x414c4721; /* D version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) else if (val < 0x20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) ac97->id = 0x414c4722; /* E version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) else if (val < 0x30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) ac97->id = 0x414c4723; /* F version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) /* revision E or F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) /* FIXME: what about revision D ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) ac97->spec.dev_flags = (ac97->id == 0x414c4722 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) ac97->id == 0x414c4723);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) /* enable AC97_ALC650_GPIO_SETUP, AC97_ALC650_CLOCK for R/W */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) snd_ac97_read(ac97, AC97_ALC650_GPIO_STATUS) | 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) /* Enable SPDIF-IN only on Rev.E and above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) val = snd_ac97_read(ac97, AC97_ALC650_CLOCK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) /* SPDIF IN with pin 47 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) if (ac97->spec.dev_flags &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) /* ASUS A6KM requires EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) ! (ac97->subsystem_vendor == 0x1043 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) ac97->subsystem_device == 0x1103))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) val |= 0x03; /* enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) val &= ~0x03; /* disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) snd_ac97_write_cache(ac97, AC97_ALC650_CLOCK, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) /* set default: slot 3,4,7,8,6,9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) spdif-in monitor off, analog-spdif off, spdif-in off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) center on mic off, surround on line-in off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) downmix off, duplicate front off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) /* set GPIO0 for mic bias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) /* GPIO0 pin output, no interrupt, high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_SETUP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) snd_ac97_read(ac97, AC97_ALC650_GPIO_SETUP) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651) snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) (snd_ac97_read(ac97, AC97_ALC650_GPIO_STATUS) | 0x100) & ~0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) /* full DAC volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) static void alc655_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) int shared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) shared = is_shared_surrout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) ac97_update_bits_page(ac97, AC97_ALC650_MULTICH, 1 << 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) shared ? (1 << 9) : 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) /* update shared Mic In / Center/LFE Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) shared = is_shared_clfeout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) /* misc control; vrefout disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) snd_ac97_update_bits(ac97, AC97_ALC650_CLOCK, 1 << 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) shared ? (1 << 12) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) ac97_update_bits_page(ac97, AC97_ALC650_MULTICH, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) shared ? (1 << 10) : 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) static const struct snd_kcontrol_new snd_ac97_controls_alc655[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) AC97_PAGE_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) static int alc655_iec958_route_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) static const char * const texts_655[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) "PCM", "Analog In", "IEC958 In"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) static const char * const texts_658[4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) "PCM", "Analog1 In", "Analog2 In", "IEC958 In"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) if (ac97->spec.dev_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) return snd_ctl_enum_info(uinfo, 1, 4, texts_658);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) return snd_ctl_enum_info(uinfo, 1, 3, texts_655);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) static int alc655_iec958_route_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) val = ac97->regs[AC97_ALC650_MULTICH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) val = (val >> 12) & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) if (ac97->spec.dev_flags && val == 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) ucontrol->value.enumerated.item[0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) static int alc655_iec958_route_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) return ac97_update_bits_page(ac97, AC97_ALC650_MULTICH, 3 << 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) (unsigned short)ucontrol->value.enumerated.item[0] << 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) static const struct snd_kcontrol_new snd_ac97_spdif_controls_alc655[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) AC97_PAGE_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_ALC650_MULTICH, 11, 1, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) /* disable this controls since it doesn't work as expected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) /* AC97_PAGE_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 14, 1, 0, 0), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) .info = alc655_iec958_route_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) .get = alc655_iec958_route_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) .put = alc655_iec958_route_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) static int patch_alc655_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) if ((err = patch_build_controls(ac97, snd_ac97_controls_alc655, ARRAY_SIZE(snd_ac97_controls_alc655))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc655, ARRAY_SIZE(snd_ac97_spdif_controls_alc655))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) static const struct snd_ac97_build_ops patch_alc655_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) .build_specific = patch_alc655_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) .update_jacks = alc655_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) static int patch_alc655(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) unsigned int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) if (ac97->id == AC97_ID_ALC658) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) ac97->spec.dev_flags = 1; /* ALC658 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) if ((snd_ac97_read(ac97, AC97_ALC650_REVISION) & 0x3f) == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) ac97->id = AC97_ID_ALC658D;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) ac97->spec.dev_flags = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) ac97->build_ops = &patch_alc655_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) /* assume only page 0 for writing cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) /* adjust default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) val = snd_ac97_read(ac97, 0x7a); /* misc control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) if (ac97->spec.dev_flags) /* ALC658 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) val &= ~(1 << 1); /* Pin 47 is spdif input pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) else { /* ALC655 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) if (ac97->subsystem_vendor == 0x1462 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) (ac97->subsystem_device == 0x0131 || /* MSI S270 laptop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) ac97->subsystem_device == 0x0161 || /* LG K1 Express */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) ac97->subsystem_device == 0x0351 || /* MSI L725 laptop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) ac97->subsystem_device == 0x0471 || /* MSI L720 laptop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) ac97->subsystem_device == 0x0061)) /* MSI S250 laptop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) val &= ~(1 << 1); /* Pin 47 is EAPD (for internal speaker) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) val |= (1 << 1); /* Pin 47 is spdif input pin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) /* this seems missing on some hardwares */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) ac97->ext_id |= AC97_EI_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) val &= ~(1 << 12); /* vref enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) snd_ac97_write_cache(ac97, 0x7a, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788) /* set default: spdif-in enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) spdif-in monitor off, spdif-in PCM off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) center on mic off, surround on line-in off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) duplicate front off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 1<<15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) /* full DAC volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) /* update undocumented bit... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) if (ac97->id == AC97_ID_ALC658D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) snd_ac97_update_bits(ac97, 0x74, 0x0800, 0x0800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) #define AC97_ALC850_JACK_SELECT 0x76
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) #define AC97_ALC850_MISC1 0x7a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) #define AC97_ALC850_MULTICH 0x6a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) static void alc850_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) int shared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) int aux_is_back_surround;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) shared = is_shared_surrout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) /* SURR 1kOhm (bit4), Amp (bit5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) snd_ac97_update_bits(ac97, AC97_ALC850_MISC1, (1<<4)|(1<<5),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) shared ? (1<<5) : (1<<4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) /* LINE-IN = 0, SURROUND = 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) snd_ac97_update_bits(ac97, AC97_ALC850_JACK_SELECT, 7 << 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) shared ? (2<<12) : (0<<12));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) /* update shared Mic In / Center/LFE Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) shared = is_shared_clfeout(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) /* Vref disable (bit12), 1kOhm (bit13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) snd_ac97_update_bits(ac97, AC97_ALC850_MISC1, (1<<12)|(1<<13),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) shared ? (1<<12) : (1<<13));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) /* MIC-IN = 1, CENTER-LFE = 5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) snd_ac97_update_bits(ac97, AC97_ALC850_JACK_SELECT, 7 << 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) shared ? (5<<4) : (1<<4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) aux_is_back_surround = alc850_is_aux_back_surround(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) /* Aux is Back Surround */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) snd_ac97_update_bits(ac97, AC97_ALC850_MULTICH, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) aux_is_back_surround ? (1<<10) : (0<<10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) static const struct snd_kcontrol_new snd_ac97_controls_alc850[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) AC97_PAGE_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) AC97_SINGLE("Mic Front Input Switch", AC97_ALC850_JACK_SELECT, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) AC97_CHANNEL_MODE_8CH_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) static int patch_alc850_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) if ((err = patch_build_controls(ac97, snd_ac97_controls_alc850, ARRAY_SIZE(snd_ac97_controls_alc850))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc655, ARRAY_SIZE(snd_ac97_spdif_controls_alc655))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) static const struct snd_ac97_build_ops patch_alc850_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) .build_specific = patch_alc850_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) .update_jacks = alc850_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) static int patch_alc850(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) ac97->build_ops = &patch_alc850_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) ac97->spec.dev_flags = 0; /* for IEC958 playback route - ALC655 compatible */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) ac97->flags |= AC97_HAS_8CH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) /* assume only page 0 for writing cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) /* adjust default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) /* set default: spdif-in enabled,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) spdif-in monitor off, spdif-in PCM off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) center on mic off, surround on line-in off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) duplicate front off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) NB default bit 10=0 = Aux is Capture, not Back Surround
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 1<<15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) /* SURR_OUT: on, Surr 1kOhm: on, Surr Amp: off, Front 1kOhm: off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) * Front Amp: on, Vref: enable, Center 1kOhm: on, Mix: on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) snd_ac97_write_cache(ac97, 0x7a, (1<<1)|(1<<4)|(0<<5)|(1<<6)|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) (1<<7)|(0<<12)|(1<<13)|(0<<14));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) /* detection UIO2,3: all path floating, UIO3: MIC, Vref2: disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) * UIO1: FRONT, Vref3: disable, UIO3: LINE, Front-Mic: mute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) snd_ac97_write_cache(ac97, 0x76, (0<<0)|(0<<2)|(1<<4)|(1<<7)|(2<<8)|
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) (1<<11)|(0<<12)|(1<<15));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) /* full DAC volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) static int patch_aztech_azf3328_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) struct snd_kcontrol *kctl_3d_center =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) snd_ac97_find_mixer_ctl(ac97, "3D Control - Center");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) struct snd_kcontrol *kctl_3d_depth =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) snd_ac97_find_mixer_ctl(ac97, "3D Control - Depth");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) * 3D register is different from AC97 standard layout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) * (also do some renaming, to resemble Windows driver naming)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) if (kctl_3d_center) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) kctl_3d_center->private_value =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) AC97_SINGLE_VALUE(AC97_3D_CONTROL, 1, 0x07, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) snd_ac97_rename_vol_ctl(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) "3D Control - Center", "3D Control - Width"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) if (kctl_3d_depth)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) kctl_3d_depth->private_value =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) AC97_SINGLE_VALUE(AC97_3D_CONTROL, 8, 0x03, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) /* Aztech Windows driver calls the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) equivalent control "Modem Playback", thus rename it: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) snd_ac97_rename_vol_ctl(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) "Master Mono Playback", "Modem Playback"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) snd_ac97_rename_vol_ctl(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) "Headphone Playback", "FM Synth Playback"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) static const struct snd_ac97_build_ops patch_aztech_azf3328_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) .build_specific = patch_aztech_azf3328_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937) static int patch_aztech_azf3328(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) ac97->build_ops = &patch_aztech_azf3328_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) * C-Media CM97xx codecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) static void cm9738_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) snd_ac97_update_bits(ac97, AC97_CM9738_VENDOR_CTRL, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) is_shared_surrout(ac97) ? (1 << 10) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) static const struct snd_kcontrol_new snd_ac97_cm9738_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) AC97_SINGLE("Duplicate Front", AC97_CM9738_VENDOR_CTRL, 13, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) AC97_CHANNEL_MODE_4CH_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) static int patch_cm9738_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) return patch_build_controls(ac97, snd_ac97_cm9738_controls, ARRAY_SIZE(snd_ac97_cm9738_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) static const struct snd_ac97_build_ops patch_cm9738_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) .build_specific = patch_cm9738_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) .update_jacks = cm9738_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) static int patch_cm9738(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971) ac97->build_ops = &patch_cm9738_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) /* FIXME: can anyone confirm below? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) /* CM9738 has no PCM volume although the register reacts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) ac97->flags |= AC97_HAS_NO_PCM_VOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975) snd_ac97_write_cache(ac97, AC97_PCM, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) static int snd_ac97_cmedia_spdif_playback_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982) static const char * const texts[] = { "Analog", "Digital" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) return snd_ctl_enum_info(uinfo, 1, 2, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987) static int snd_ac97_cmedia_spdif_playback_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) val = ac97->regs[AC97_CM9739_SPDIF_CTRL];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) ucontrol->value.enumerated.item[0] = (val >> 1) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) static int snd_ac97_cmedia_spdif_playback_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) return snd_ac97_update_bits(ac97, AC97_CM9739_SPDIF_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) 0x01 << 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) (ucontrol->value.enumerated.item[0] & 0x01) << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) static const struct snd_kcontrol_new snd_ac97_cm9739_controls_spdif[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) /* BIT 0: SPDI_EN - always true */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008) { /* BIT 1: SPDIFS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) .info = snd_ac97_cmedia_spdif_playback_source_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) .get = snd_ac97_cmedia_spdif_playback_source_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) .put = snd_ac97_cmedia_spdif_playback_source_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) /* BIT 2: IG_SPIV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Valid Switch", AC97_CM9739_SPDIF_CTRL, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) /* BIT 3: SPI2F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Monitor", AC97_CM9739_SPDIF_CTRL, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) /* BIT 4: SPI2SDI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_CM9739_SPDIF_CTRL, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) /* BIT 8: SPD32 - 32bit SPDIF - not supported yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) static void cm9739_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027) snd_ac97_update_bits(ac97, AC97_CM9739_MULTI_CHAN, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) is_shared_surrout(ac97) ? (1 << 10) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) /* shared Mic In / Center/LFE Out **/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) snd_ac97_update_bits(ac97, AC97_CM9739_MULTI_CHAN, 0x3000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) is_shared_clfeout(ac97) ? 0x1000 : 0x2000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) static const struct snd_kcontrol_new snd_ac97_cm9739_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) static int patch_cm9739_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) return patch_build_controls(ac97, snd_ac97_cm9739_controls, ARRAY_SIZE(snd_ac97_cm9739_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) static int patch_cm9739_post_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) return patch_build_controls(ac97, snd_ac97_cm9739_controls_spdif, ARRAY_SIZE(snd_ac97_cm9739_controls_spdif));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) static const struct snd_ac97_build_ops patch_cm9739_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) .build_specific = patch_cm9739_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) .build_post_spdif = patch_cm9739_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) .update_jacks = cm9739_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) static int patch_cm9739(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) ac97->build_ops = &patch_cm9739_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) /* CM9739/A has no Master and PCM volume although the register reacts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) ac97->flags |= AC97_HAS_NO_MASTER_VOL | AC97_HAS_NO_PCM_VOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) snd_ac97_write_cache(ac97, AC97_MASTER, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) snd_ac97_write_cache(ac97, AC97_PCM, 0x8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) /* check spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) if (val & AC97_EA_SPCV) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) /* enable spdif in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) snd_ac97_write_cache(ac97, AC97_CM9739_SPDIF_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) snd_ac97_read(ac97, AC97_CM9739_SPDIF_CTRL) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) ac97->ext_id &= ~AC97_EI_SPDIF; /* disable extended-id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) ac97->rates[AC97_RATES_SPDIF] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) /* set-up multi channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) /* bit 14: 0 = SPDIF, 1 = EAPD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) /* bit 13: enable internal vref output for mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) /* bit 12: disable center/lfe (switchable) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) /* bit 10: disable surround/line (switchable) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) /* bit 9: mix 2 surround off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) /* bit 4: undocumented; 0 mutes the CM9739A, which defaults to 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) /* bit 3: undocumented; surround? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) /* bit 0: dB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) val = snd_ac97_read(ac97, AC97_CM9739_MULTI_CHAN) & (1 << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) val |= (1 << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) val |= (1 << 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) if (! (ac97->ext_id & AC97_EI_SPDIF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) val |= (1 << 14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) snd_ac97_write_cache(ac97, AC97_CM9739_MULTI_CHAN, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) /* FIXME: set up GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) snd_ac97_write_cache(ac97, 0x70, 0x0100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) snd_ac97_write_cache(ac97, 0x72, 0x0020);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) /* Special exception for ASUS W1000/CMI9739. It does not have an SPDIF in. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) if (ac97->pci &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) ac97->subsystem_vendor == 0x1043 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) ac97->subsystem_device == 0x1843) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) snd_ac97_write_cache(ac97, AC97_CM9739_SPDIF_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) snd_ac97_read(ac97, AC97_CM9739_SPDIF_CTRL) & ~0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) snd_ac97_write_cache(ac97, AC97_CM9739_MULTI_CHAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) snd_ac97_read(ac97, AC97_CM9739_MULTI_CHAN) | (1 << 14));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) #define AC97_CM9761_MULTI_CHAN 0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) #define AC97_CM9761_FUNC 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) #define AC97_CM9761_SPDIF_CTRL 0x6c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) static void cm9761_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) /* FIXME: check the bits for each model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) * model 83 is confirmed to work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) static const unsigned short surr_on[3][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) { 0x0008, 0x0000 }, /* 9761-78 & 82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121) { 0x0000, 0x0008 }, /* 9761-82 rev.B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) { 0x0000, 0x0008 }, /* 9761-83 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) static const unsigned short clfe_on[3][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) { 0x0000, 0x1000 }, /* 9761-78 & 82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) { 0x1000, 0x0000 }, /* 9761-82 rev.B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) { 0x0000, 0x1000 }, /* 9761-83 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) static const unsigned short surr_shared[3][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) { 0x0000, 0x0400 }, /* 9761-78 & 82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) { 0x0000, 0x0400 }, /* 9761-82 rev.B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) { 0x0000, 0x0400 }, /* 9761-83 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) static const unsigned short clfe_shared[3][2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) { 0x2000, 0x0880 }, /* 9761-78 & 82 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) { 0x0000, 0x2880 }, /* 9761-82 rev.B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) { 0x2000, 0x0800 }, /* 9761-83 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) unsigned short val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) val |= surr_on[ac97->spec.dev_flags][is_surround_on(ac97)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) val |= clfe_on[ac97->spec.dev_flags][is_clfe_on(ac97)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143) val |= surr_shared[ac97->spec.dev_flags][is_shared_surrout(ac97)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) val |= clfe_shared[ac97->spec.dev_flags][is_shared_clfeout(ac97)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) snd_ac97_update_bits(ac97, AC97_CM9761_MULTI_CHAN, 0x3c88, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) static const struct snd_kcontrol_new snd_ac97_cm9761_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) static int cm9761_spdif_out_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156) static const char * const texts[] = { "AC-Link", "ADC", "SPDIF-In" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) return snd_ctl_enum_info(uinfo, 1, 3, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) static int cm9761_spdif_out_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) if (ac97->regs[AC97_CM9761_FUNC] & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) ucontrol->value.enumerated.item[0] = 2; /* SPDIF-loopback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167) else if (ac97->regs[AC97_CM9761_SPDIF_CTRL] & 0x2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) ucontrol->value.enumerated.item[0] = 1; /* ADC loopback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) ucontrol->value.enumerated.item[0] = 0; /* AC-link */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) static int cm9761_spdif_out_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) if (ucontrol->value.enumerated.item[0] == 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) return snd_ac97_update_bits(ac97, AC97_CM9761_FUNC, 0x1, 0x1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) snd_ac97_update_bits(ac97, AC97_CM9761_FUNC, 0x1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) return snd_ac97_update_bits(ac97, AC97_CM9761_SPDIF_CTRL, 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) ucontrol->value.enumerated.item[0] == 1 ? 0x2 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) static const char * const cm9761_dac_clock[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) "AC-Link", "SPDIF-In", "Both"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188) static const struct ac97_enum cm9761_dac_clock_enum =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) AC97_ENUM_SINGLE(AC97_CM9761_SPDIF_CTRL, 9, 3, cm9761_dac_clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191) static const struct snd_kcontrol_new snd_ac97_cm9761_controls_spdif[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) { /* BIT 1: SPDIFS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) .info = cm9761_spdif_out_source_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196) .get = cm9761_spdif_out_source_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) .put = cm9761_spdif_out_source_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) /* BIT 2: IG_SPIV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Valid Switch", AC97_CM9761_SPDIF_CTRL, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) /* BIT 3: SPI2F */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Monitor", AC97_CM9761_SPDIF_CTRL, 3, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) /* BIT 4: SPI2SDI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_CM9761_SPDIF_CTRL, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) /* BIT 9-10: DAC_CTL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) AC97_ENUM("DAC Clock Source", cm9761_dac_clock_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) static int patch_cm9761_post_spdif(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) return patch_build_controls(ac97, snd_ac97_cm9761_controls_spdif, ARRAY_SIZE(snd_ac97_cm9761_controls_spdif));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214) static int patch_cm9761_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216) return patch_build_controls(ac97, snd_ac97_cm9761_controls, ARRAY_SIZE(snd_ac97_cm9761_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) static const struct snd_ac97_build_ops patch_cm9761_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) .build_specific = patch_cm9761_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) .build_post_spdif = patch_cm9761_post_spdif,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) .update_jacks = cm9761_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) static int patch_cm9761(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) /* CM9761 has no PCM volume although the register reacts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) /* Master volume seems to have _some_ influence on the analog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) * input sounds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) ac97->flags |= /*AC97_HAS_NO_MASTER_VOL |*/ AC97_HAS_NO_PCM_VOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) snd_ac97_write_cache(ac97, AC97_MASTER, 0x8808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) snd_ac97_write_cache(ac97, AC97_PCM, 0x8808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) ac97->spec.dev_flags = 0; /* 1 = model 82 revision B, 2 = model 83 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238) if (ac97->id == AC97_ID_CM9761_82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) unsigned short tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) /* check page 1, reg 0x60 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) val = snd_ac97_read(ac97, AC97_INT_PAGING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) snd_ac97_write_cache(ac97, AC97_INT_PAGING, (val & ~0x0f) | 0x01);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) tmp = snd_ac97_read(ac97, 0x60);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) ac97->spec.dev_flags = tmp & 1; /* revision B? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) snd_ac97_write_cache(ac97, AC97_INT_PAGING, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) } else if (ac97->id == AC97_ID_CM9761_83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) ac97->spec.dev_flags = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) ac97->build_ops = &patch_cm9761_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) /* enable spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) /* force the SPDIF bit in ext_id - codec doesn't set this bit! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) ac97->ext_id |= AC97_EI_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) /* to be sure: we overwrite the ext status bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) snd_ac97_write_cache(ac97, AC97_EXTENDED_STATUS, 0x05c0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) /* Don't set 0x0200 here. This results in the silent analog output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) snd_ac97_write_cache(ac97, AC97_CM9761_SPDIF_CTRL, 0x0001); /* enable spdif-in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) /* set-up multi channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) /* bit 15: pc master beep off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) * bit 14: pin47 = EAPD/SPDIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) * bit 13: vref ctl [= cm9739]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) * bit 12: CLFE control (reverted on rev B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) * bit 11: Mic/center share (reverted on rev B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) * bit 10: suddound/line share
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) * bit 9: Analog-in mix -> surround
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) * bit 8: Analog-in mix -> CLFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) * bit 7: Mic/LFE share (mic/center/lfe)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) * bit 5: vref select (9761A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) * bit 4: front control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) * bit 3: surround control (revereted with rev B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) * bit 2: front mic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274) * bit 1: stereo mic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) * bit 0: mic boost level (0=20dB, 1=30dB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) if (ac97->spec.dev_flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) val = 0x0214;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) val = 0x321c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) val = snd_ac97_read(ac97, AC97_CM9761_MULTI_CHAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) val |= (1 << 4); /* front on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) snd_ac97_write_cache(ac97, AC97_CM9761_MULTI_CHAN, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) /* FIXME: set up GPIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) snd_ac97_write_cache(ac97, 0x70, 0x0100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) snd_ac97_write_cache(ac97, 0x72, 0x0020);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) #define AC97_CM9780_SIDE 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) #define AC97_CM9780_JACK 0x62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) #define AC97_CM9780_MIXER 0x64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) #define AC97_CM9780_MULTI_CHAN 0x66
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) #define AC97_CM9780_SPDIF 0x6c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) static const char * const cm9780_ch_select[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) "Front", "Side", "Center/LFE", "Rear"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) static const struct ac97_enum cm9780_ch_select_enum =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305) AC97_ENUM_SINGLE(AC97_CM9780_MULTI_CHAN, 6, 4, cm9780_ch_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) static const struct snd_kcontrol_new cm9780_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) AC97_DOUBLE("Side Playback Switch", AC97_CM9780_SIDE, 15, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) AC97_DOUBLE("Side Playback Volume", AC97_CM9780_SIDE, 8, 0, 31, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) AC97_ENUM("Side Playback Route", cm9780_ch_select_enum),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) static int patch_cm9780_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) return patch_build_controls(ac97, cm9780_controls, ARRAY_SIZE(cm9780_controls));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) static const struct snd_ac97_build_ops patch_cm9780_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) .build_specific = patch_cm9780_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) .build_post_spdif = patch_cm9761_post_spdif /* identical with CM9761 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) static int patch_cm9780(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) ac97->build_ops = &patch_cm9780_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) /* enable spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) val = snd_ac97_read(ac97, AC97_CM9780_SPDIF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) val |= 0x1; /* SPDI_EN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) snd_ac97_write_cache(ac97, AC97_CM9780_SPDIF, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) * VIA VT1613 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) static const struct snd_kcontrol_new snd_ac97_controls_vt1613[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343) AC97_SINGLE("DC Offset removal", 0x5a, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) static int patch_vt1613_specific(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) return patch_build_controls(ac97, &snd_ac97_controls_vt1613[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) ARRAY_SIZE(snd_ac97_controls_vt1613));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) static const struct snd_ac97_build_ops patch_vt1613_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) .build_specific = patch_vt1613_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) static int patch_vt1613(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) ac97->build_ops = &patch_vt1613_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) ac97->flags |= AC97_HAS_NO_VIDEO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) ac97->caps |= AC97_BC_HEADPHONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) * VIA VT1616 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369) static const struct snd_kcontrol_new snd_ac97_controls_vt1616[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) AC97_SINGLE("DC Offset removal", 0x5a, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) AC97_SINGLE("Alternate Level to Surround Out", 0x5a, 15, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) AC97_SINGLE("Downmix LFE and Center to Front", 0x5a, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) AC97_SINGLE("Downmix Surround to Front", 0x5a, 11, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) static const char * const follower_vols_vt1616[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) "Front Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) "Surround Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379) "Center Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) "LFE Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) static const char * const follower_sws_vt1616[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385) "Front Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) "Surround Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) "Center Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) "LFE Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392) /* find a mixer control element with the given name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) static struct snd_kcontrol *snd_ac97_find_mixer_ctl(struct snd_ac97 *ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) struct snd_ctl_elem_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) memset(&id, 0, sizeof(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398) id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) strcpy(id.name, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) return snd_ctl_find_id(ac97->bus->card, &id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) /* create a virtual master control and add followers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) static int snd_ac97_add_vmaster(struct snd_ac97 *ac97, char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) const unsigned int *tlv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) const char * const *followers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) const char * const *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) kctl = snd_ctl_make_virtual_master(name, tlv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) if (!kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) err = snd_ctl_add(ac97->bus->card, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) for (s = followers; *s; s++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) struct snd_kcontrol *sctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) sctl = snd_ac97_find_mixer_ctl(ac97, *s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423) if (!sctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) dev_dbg(ac97->bus->card->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) "Cannot find follower %s, skipped\n", *s);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) err = snd_ctl_add_follower(kctl, sctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) static int patch_vt1616_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440) if (snd_ac97_try_bit(ac97, 0x5a, 9))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[0], 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[1], ARRAY_SIZE(snd_ac97_controls_vt1616) - 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) /* There is already a misnamed master switch. Rename it. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) kctl = snd_ac97_find_mixer_ctl(ac97, "Master Playback Volume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) if (!kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) snd_ac97_rename_vol_ctl(ac97, "Master Playback", "Front Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) err = snd_ac97_add_vmaster(ac97, "Master Playback Volume",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) kctl->tlv.p, follower_vols_vt1616);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) err = snd_ac97_add_vmaster(ac97, "Master Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) NULL, follower_sws_vt1616);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) static const struct snd_ac97_build_ops patch_vt1616_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) .build_specific = patch_vt1616_specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) static int patch_vt1616(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) ac97->build_ops = &patch_vt1616_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) * VT1617A codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) * unfortunately, the vt1617a stashes the twiddlers required for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) * noodling the i/o jacks on 2 different regs. that means that we can't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) * use the easy way provided by AC97_ENUM_DOUBLE() we have to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484) * are own funcs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) * NB: this is absolutely and utterly different from the vt1618. dunno
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) * about the 1616.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) /* copied from ac97_surround_jack_mode_info() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491) static int snd_ac97_vt1617a_smart51_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) /* ordering in this list reflects vt1617a docs for Reg 20 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) * 7a and Table 6 that lays out the matrix NB WRT Table6: SM51
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) * is SM51EN *AND* it's Bit14, not Bit15 so the table is very
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) * counter-intuitive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) static const char * const texts[] = {"LineIn Mic1", "LineIn Mic1 Mic3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) "Surr LFE/C Mic3", "LineIn LFE/C Mic3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) "LineIn Mic2", "LineIn Mic2 Mic1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) "Surr LFE Mic1", "Surr LFE Mic1 Mic2"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) return snd_ctl_enum_info(uinfo, 1, 8, texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507) static int snd_ac97_vt1617a_smart51_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) ushort usSM51, usMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) struct snd_ac97 *pac97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) pac97 = snd_kcontrol_chip(kcontrol); /* grab codec handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) /* grab our desired bits, then mash them together in a manner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) * consistent with Table 6 on page 17 in the 1617a docs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519) usSM51 = snd_ac97_read(pac97, 0x7a) >> 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) usMS = snd_ac97_read(pac97, 0x20) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) ucontrol->value.enumerated.item[0] = (usSM51 << 1) + usMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) static int snd_ac97_vt1617a_smart51_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) ushort usSM51, usMS, usReg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) struct snd_ac97 *pac97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) pac97 = snd_kcontrol_chip(kcontrol); /* grab codec handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) usSM51 = ucontrol->value.enumerated.item[0] >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) usMS = ucontrol->value.enumerated.item[0] & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) /* push our values into the register - consider that things will be left
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) * in a funky state if the write fails */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) usReg = snd_ac97_read(pac97, 0x7a);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) snd_ac97_write_cache(pac97, 0x7a, (usReg & 0x3FFF) + (usSM51 << 14));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544) usReg = snd_ac97_read(pac97, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) snd_ac97_write_cache(pac97, 0x20, (usReg & 0xFEFF) + (usMS << 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) static const struct snd_kcontrol_new snd_ac97_controls_vt1617a[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) AC97_SINGLE("Center/LFE Exchange", 0x5a, 8, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) * These are used to enable/disable surround sound on motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) * that have 3 bidirectional analog jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) .name = "Smart 5.1 Select",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) .info = snd_ac97_vt1617a_smart51_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) .get = snd_ac97_vt1617a_smart51_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) .put = snd_ac97_vt1617a_smart51_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) static int patch_vt1617a(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) int val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) /* we choose to not fail out at this point, but we tell the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) caller when we return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) err = patch_build_controls(ac97, &snd_ac97_controls_vt1617a[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) ARRAY_SIZE(snd_ac97_controls_vt1617a));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) /* bring analog power consumption to normal by turning off the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) * headphone amplifier, like WinXP driver for EPIA SP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) /* We need to check the bit before writing it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581) * On some (many?) hardwares, setting bit actually clears it!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) val = snd_ac97_read(ac97, 0x5c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) if (!(val & 0x20))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) snd_ac97_write_cache(ac97, 0x5c, 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) ac97->build_ops = &patch_vt1616_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) /* VIA VT1618 8 CHANNEL AC97 CODEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) * VIA implements 'Smart 5.1' completely differently on the 1618 than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) * it does on the 1617a. awesome! They seem to have sourced this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598) * particular revision of the technology from somebody else, it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) * called Universal Audio Jack and it shows up on some other folk's chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) * as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602) * ordering in this list reflects vt1618 docs for Reg 60h and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) * the block diagram, DACs are as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) * OUT_O -> Front,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) * OUT_1 -> Surround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) * OUT_2 -> C/LFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609) * Unlike the 1617a, each OUT has a consistent set of mappings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) * for all bitpatterns other than 00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) * 01 Unmixed Output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) * 10 Line In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614) * 11 Mic In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) * Special Case of 00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) * OUT_0 Mixed Output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) * OUT_1 Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) * OUT_2 Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) * I have no idea what the hell Reserved does, but on an MSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) * CN700T, i have to set it to get 5.1 output - YMMV, bad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) * shit may happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626) * If other chips use Universal Audio Jack, then this code might be applicable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) * to them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) struct vt1618_uaj_item {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) unsigned short mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) unsigned short shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633) const char * const items[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) /* This list reflects the vt1618 docs for Vendor Defined Register 0x60. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) static const struct vt1618_uaj_item vt1618_uaj[3] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) /* speaker jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) .mask = 0x03,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) .shift = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) .items = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) "Speaker Out", "DAC Unmixed Out", "Line In", "Mic In"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) /* line jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) .mask = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) .shift = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) .items = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) "Surround Out", "DAC Unmixed Out", "Line In", "Mic In"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) /* mic jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) .mask = 0x30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658) .shift = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) .items = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) "Center LFE Out", "DAC Unmixed Out", "Line In", "Mic In"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) static int snd_ac97_vt1618_UAJ_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) return snd_ctl_enum_info(uinfo, 1, 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) vt1618_uaj[kcontrol->private_value].items);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) /* All of the vt1618 Universal Audio Jack twiddlers are on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) * Vendor Defined Register 0x60, page 0. The bits, and thus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) * the mask, are the only thing that changes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) static int snd_ac97_vt1618_UAJ_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) unsigned short datpag, uaj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680) struct snd_ac97 *pac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) mutex_lock(&pac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) datpag = snd_ac97_read(pac97, AC97_INT_PAGING) & AC97_PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) snd_ac97_update_bits(pac97, AC97_INT_PAGING, AC97_PAGE_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) uaj = snd_ac97_read(pac97, 0x60) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) vt1618_uaj[kcontrol->private_value].mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) snd_ac97_update_bits(pac97, AC97_INT_PAGING, AC97_PAGE_MASK, datpag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) mutex_unlock(&pac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) ucontrol->value.enumerated.item[0] = uaj >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) vt1618_uaj[kcontrol->private_value].shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) static int snd_ac97_vt1618_UAJ_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) return ac97_update_bits_page(snd_kcontrol_chip(kcontrol), 0x60,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) vt1618_uaj[kcontrol->private_value].mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) ucontrol->value.enumerated.item[0]<<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) vt1618_uaj[kcontrol->private_value].shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) /* config aux in jack - not found on 3 jack motherboards or soundcards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) static int snd_ac97_vt1618_aux_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) static const char * const txt_aux[] = {"Aux In", "Back Surr Out"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) return snd_ctl_enum_info(uinfo, 1, 2, txt_aux);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) static int snd_ac97_vt1618_aux_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) ucontrol->value.enumerated.item[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723) (snd_ac97_read(snd_kcontrol_chip(kcontrol), 0x5c) & 0x0008)>>3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) static int snd_ac97_vt1618_aux_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) /* toggle surround rear dac power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) snd_ac97_update_bits(snd_kcontrol_chip(kcontrol), 0x5c, 0x0008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) ucontrol->value.enumerated.item[0] << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) /* toggle aux in surround rear out jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737) return snd_ac97_update_bits(snd_kcontrol_chip(kcontrol), 0x76, 0x0008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) ucontrol->value.enumerated.item[0] << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741) static const struct snd_kcontrol_new snd_ac97_controls_vt1618[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742) AC97_SINGLE("Exchange Center/LFE", 0x5a, 8, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) AC97_SINGLE("DC Offset", 0x5a, 10, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) AC97_SINGLE("Soft Mute", 0x5c, 0, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745) AC97_SINGLE("Headphone Amp", 0x5c, 5, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) AC97_DOUBLE("Back Surr Volume", 0x5e, 8, 0, 31, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) AC97_SINGLE("Back Surr Switch", 0x5e, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) .name = "Speaker Jack Mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) .info = snd_ac97_vt1618_UAJ_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) .get = snd_ac97_vt1618_UAJ_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) .put = snd_ac97_vt1618_UAJ_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) .private_value = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) .name = "Line Jack Mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) .info = snd_ac97_vt1618_UAJ_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) .get = snd_ac97_vt1618_UAJ_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) .put = snd_ac97_vt1618_UAJ_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) .private_value = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) .name = "Mic Jack Mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) .info = snd_ac97_vt1618_UAJ_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768) .get = snd_ac97_vt1618_UAJ_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) .put = snd_ac97_vt1618_UAJ_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) .private_value = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) .name = "Aux Jack Mode",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) .info = snd_ac97_vt1618_aux_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) .get = snd_ac97_vt1618_aux_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777) .put = snd_ac97_vt1618_aux_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) static int patch_vt1618(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) return patch_build_controls(ac97, snd_ac97_controls_vt1618,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) ARRAY_SIZE(snd_ac97_controls_vt1618));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) static void it2646_update_jacks(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) /* shared Line-In / Surround Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) snd_ac97_update_bits(ac97, 0x76, 1 << 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) is_shared_surrout(ac97) ? (1<<9) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794) /* shared Mic / Center/LFE Out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) snd_ac97_update_bits(ac97, 0x76, 1 << 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) is_shared_clfeout(ac97) ? (1<<10) : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799) static const struct snd_kcontrol_new snd_ac97_controls_it2646[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) AC97_SURROUND_JACK_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) AC97_CHANNEL_MODE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) static const struct snd_kcontrol_new snd_ac97_spdif_controls_it2646[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0x76, 11, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) AC97_SINGLE("Analog to IEC958 Output", 0x76, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) AC97_SINGLE("IEC958 Input Monitor", 0x76, 13, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) static int patch_it2646_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) if ((err = patch_build_controls(ac97, snd_ac97_controls_it2646, ARRAY_SIZE(snd_ac97_controls_it2646))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_it2646, ARRAY_SIZE(snd_ac97_spdif_controls_it2646))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) static const struct snd_ac97_build_ops patch_it2646_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) .build_specific = patch_it2646_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) .update_jacks = it2646_update_jacks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) static int patch_it2646(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) ac97->build_ops = &patch_it2646_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) /* full DAC volume */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) snd_ac97_write_cache(ac97, 0x5E, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830) snd_ac97_write_cache(ac97, 0x7A, 0x0808);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) * Si3036 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) #define AC97_SI3036_CHIP_ID 0x5a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) #define AC97_SI3036_LINE_CFG 0x5c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) static const struct snd_kcontrol_new snd_ac97_controls_si3036[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) AC97_DOUBLE("Modem Speaker Volume", 0x5c, 14, 12, 3, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) static int patch_si3036_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847) int idx, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) for (idx = 0; idx < ARRAY_SIZE(snd_ac97_controls_si3036); idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) if ((err = snd_ctl_add(ac97->bus->card, snd_ctl_new1(&snd_ac97_controls_si3036[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) static const struct snd_ac97_build_ops patch_si3036_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) .build_specific = patch_si3036_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) static int mpatch_si3036(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) ac97->build_ops = &patch_si3036_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) snd_ac97_write_cache(ac97, 0x5c, 0xf210 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) snd_ac97_write_cache(ac97, 0x68, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) * LM 4550 Codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3868) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3869) * We use a static resolution table since LM4550 codec cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3870) * properly autoprobed to determine the resolution via
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3871) * check_volume_resolution().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3874) static const struct snd_ac97_res_table lm4550_restbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3875) { AC97_MASTER, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3876) { AC97_HEADPHONE, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3877) { AC97_MASTER_MONO, 0x001f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3878) { AC97_PC_BEEP, 0x001f }, /* LSB is ignored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3879) { AC97_PHONE, 0x001f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3880) { AC97_MIC, 0x001f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3881) { AC97_LINE, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3882) { AC97_CD, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3883) { AC97_VIDEO, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3884) { AC97_AUX, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3885) { AC97_PCM, 0x1f1f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3886) { AC97_REC_GAIN, 0x0f0f },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3887) { } /* terminator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3888) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3890) static int patch_lm4550(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3891) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3892) ac97->res_table = lm4550_restbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3893) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3896) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3897) * UCB1400 codec (http://www.semiconductors.philips.com/acrobat_download/datasheets/UCB1400-02.pdf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3898) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3899) static const struct snd_kcontrol_new snd_ac97_controls_ucb1400[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3900) /* enable/disable headphone driver which allows direct connection to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3901) stereo headphone without the use of external DC blocking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3902) capacitors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3903) AC97_SINGLE("Headphone Driver", 0x6a, 6, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3904) /* Filter used to compensate the DC offset is added in the ADC to remove idle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3905) tones from the audio band. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3906) AC97_SINGLE("DC Filter", 0x6a, 4, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3907) /* Control smart-low-power mode feature. Allows automatic power down
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3908) of unused blocks in the ADC analog front end and the PLL. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3909) AC97_SINGLE("Smart Low Power Mode", 0x6c, 4, 3, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3910) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3912) static int patch_ucb1400_specific(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3913) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3914) int idx, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3915) for (idx = 0; idx < ARRAY_SIZE(snd_ac97_controls_ucb1400); idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3916) if ((err = snd_ctl_add(ac97->bus->card, snd_ctl_new1(&snd_ac97_controls_ucb1400[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3917) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3918) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3921) static const struct snd_ac97_build_ops patch_ucb1400_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3922) .build_specific = patch_ucb1400_specific,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3923) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3925) static int patch_ucb1400(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3927) ac97->build_ops = &patch_ucb1400_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3928) /* enable headphone driver and smart low power mode by default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3929) snd_ac97_write_cache(ac97, 0x6a, 0x0050);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3930) snd_ac97_write_cache(ac97, 0x6c, 0x0030);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3931) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3932) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags