^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Universal interface for Audio Codec '97
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * For more details look to AC '97 component specification revision 2.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * by Intel Corporation (http://developer.intel.com).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mutex.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <sound/tlv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <sound/ac97_codec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <sound/asoundef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "ac97_id.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "ac97_patch.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MODULE_DESCRIPTION("Universal interface for Audio Codec '97");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static bool enable_loopback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) module_param(enable_loopback, bool, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) MODULE_PARM_DESC(enable_loopback, "Enable AC97 ADC/DAC Loopback Control");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static int power_save = CONFIG_SND_AC97_POWER_SAVE_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) module_param(power_save, int, 0644);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "(in second, 0 = disable).");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct ac97_codec_id {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int (*patch)(struct snd_ac97 *ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int (*mpatch)(struct snd_ac97 *ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct ac97_codec_id snd_ac97_codec_id_vendors[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { 0x41445300, 0xffffff00, "Analog Devices", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { 0x414b4d00, 0xffffff00, "Asahi Kasei", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { 0x414c4300, 0xffffff00, "Realtek", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { 0x414c4700, 0xffffff00, "Realtek", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * This is an _inofficial_ Aztech Labs entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * (value might differ from unknown official Aztech ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * currently used by the AC97 emulation of the almost-AC97 PCI168 card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { 0x415a5400, 0xffffff00, "Aztech Labs (emulated)", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { 0x434d4900, 0xffffff00, "C-Media Electronics", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { 0x43525900, 0xffffff00, "Cirrus Logic", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { 0x43585400, 0xffffff00, "Conexant", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { 0x44543000, 0xffffff00, "Diamond Technology", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { 0x454d4300, 0xffffff00, "eMicro", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { 0x45838300, 0xffffff00, "ESS Technology", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { 0x48525300, 0xffffff00, "Intersil", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { 0x49434500, 0xffffff00, "ICEnsemble", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) { 0x49544500, 0xffffff00, "ITE Tech.Inc", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) { 0x4e534300, 0xffffff00, "National Semiconductor", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) { 0x50534300, 0xffffff00, "Philips", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) { 0x53494c00, 0xffffff00, "Silicon Laboratory", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) { 0x53544d00, 0xffffff00, "STMicroelectronics", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) { 0x54524100, 0xffffff00, "TriTech", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { 0x54584e00, 0xffffff00, "Texas Instruments", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { 0x56494100, 0xffffff00, "VIA Technologies", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) { 0x57454300, 0xffffff00, "Winbond", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) { 0x574d4c00, 0xffffff00, "Wolfson", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { 0x594d4800, 0xffffff00, "Yamaha", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) { 0x83847600, 0xffffff00, "SigmaTel", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) { 0, 0, NULL, NULL, NULL }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const struct ac97_codec_id snd_ac97_codec_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) { 0x41445303, 0xffffffff, "AD1819", patch_ad1819, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) { 0x41445340, 0xffffffff, "AD1881", patch_ad1881, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) { 0x41445348, 0xffffffff, "AD1881A", patch_ad1881, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { 0x41445360, 0xffffffff, "AD1885", patch_ad1885, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) { 0x41445361, 0xffffffff, "AD1886", patch_ad1886, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { 0x41445362, 0xffffffff, "AD1887", patch_ad1881, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { 0x41445363, 0xffffffff, "AD1886A", patch_ad1881, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) { 0x41445368, 0xffffffff, "AD1888", patch_ad1888, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) { 0x41445370, 0xffffffff, "AD1980", patch_ad1980, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) { 0x41445372, 0xffffffff, "AD1981A", patch_ad1981a, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) { 0x41445374, 0xffffffff, "AD1981B", patch_ad1981b, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) { 0x41445375, 0xffffffff, "AD1985", patch_ad1985, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) { 0x41445378, 0xffffffff, "AD1986", patch_ad1986, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) { 0x414b4d00, 0xffffffff, "AK4540", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) { 0x414b4d01, 0xffffffff, "AK4542", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) { 0x414b4d02, 0xffffffff, "AK4543", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { 0x414b4d06, 0xffffffff, "AK4544A", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { 0x414b4d07, 0xffffffff, "AK4545", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { 0x414c4300, 0xffffff00, "ALC100,100P", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) { 0x414c4710, 0xfffffff0, "ALC200,200P", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) { 0x414c4721, 0xffffffff, "ALC650D", NULL, NULL }, /* already patched */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) { 0x414c4722, 0xffffffff, "ALC650E", NULL, NULL }, /* already patched */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { 0x414c4723, 0xffffffff, "ALC650F", NULL, NULL }, /* already patched */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { 0x414c4720, 0xfffffff0, "ALC650", patch_alc650, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { 0x414c4730, 0xffffffff, "ALC101", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { 0x414c4740, 0xfffffff0, "ALC202", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) { 0x414c4750, 0xfffffff0, "ALC250", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) { 0x414c4760, 0xfffffff0, "ALC655", patch_alc655, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) { 0x414c4770, 0xfffffff0, "ALC203", patch_alc203, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) { 0x414c4781, 0xffffffff, "ALC658D", NULL, NULL }, /* already patched */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) { 0x414c4780, 0xfffffff0, "ALC658", patch_alc655, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) { 0x414c4790, 0xfffffff0, "ALC850", patch_alc850, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) { 0x415a5401, 0xffffffff, "AZF3328", patch_aztech_azf3328, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) { 0x434d4941, 0xffffffff, "CMI9738", patch_cm9738, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) { 0x434d4961, 0xffffffff, "CMI9739", patch_cm9739, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) { 0x434d4969, 0xffffffff, "CMI9780", patch_cm9780, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) { 0x434d4978, 0xffffffff, "CMI9761A", patch_cm9761, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) { 0x434d4982, 0xffffffff, "CMI9761B", patch_cm9761, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) { 0x434d4983, 0xffffffff, "CMI9761A+", patch_cm9761, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) { 0x43525900, 0xfffffff8, "CS4297", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) { 0x43525910, 0xfffffff8, "CS4297A", patch_cirrus_spdif, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) { 0x43525920, 0xfffffff8, "CS4298", patch_cirrus_spdif, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) { 0x43525928, 0xfffffff8, "CS4294", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) { 0x43525930, 0xfffffff8, "CS4299", patch_cirrus_cs4299, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) { 0x43525948, 0xfffffff8, "CS4201", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) { 0x43525958, 0xfffffff8, "CS4205", patch_cirrus_spdif, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) { 0x43525960, 0xfffffff8, "CS4291", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) { 0x43525970, 0xfffffff8, "CS4202", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) { 0x43585421, 0xffffffff, "HSD11246", NULL, NULL }, // SmartMC II
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) { 0x43585428, 0xfffffff8, "Cx20468", patch_conexant, NULL }, // SmartAMC fixme: the mask might be different
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) { 0x43585430, 0xffffffff, "Cx20468-31", patch_conexant, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) { 0x43585431, 0xffffffff, "Cx20551", patch_cx20551, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) { 0x44543031, 0xfffffff0, "DT0398", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) { 0x454d4328, 0xffffffff, "EM28028", NULL, NULL }, // same as TR28028?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) { 0x45838308, 0xffffffff, "ESS1988", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) { 0x48525300, 0xffffff00, "HMP9701", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { 0x49434501, 0xffffffff, "ICE1230", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { 0x49434511, 0xffffffff, "ICE1232", NULL, NULL }, // alias VIA VT1611A?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { 0x49434514, 0xffffffff, "ICE1232A", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { 0x49434551, 0xffffffff, "VT1616", patch_vt1616, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { 0x49434552, 0xffffffff, "VT1616i", patch_vt1616, NULL }, // VT1616 compatible (chipset integrated)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { 0x49544520, 0xffffffff, "IT2226E", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { 0x49544561, 0xffffffff, "IT2646E", patch_it2646, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { 0x4e534300, 0xffffffff, "LM4540,43,45,46,48", NULL, NULL }, // only guess --jk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { 0x4e534331, 0xffffffff, "LM4549", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { 0x4e534350, 0xffffffff, "LM4550", patch_lm4550, NULL }, // volume wrap fix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { 0x50534304, 0xffffffff, "UCB1400", patch_ucb1400, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 0x53494c20, 0xffffffe0, "Si3036,8", mpatch_si3036, mpatch_si3036, AC97_MODEM_PATCH },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) { 0x53544d02, 0xffffffff, "ST7597", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) { 0x54524102, 0xffffffff, "TR28022", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) { 0x54524103, 0xffffffff, "TR28023", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) { 0x54524106, 0xffffffff, "TR28026", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) { 0x54524108, 0xffffffff, "TR28028", patch_tritech_tr28028, NULL }, // added by xin jin [07/09/99]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) { 0x54524123, 0xffffffff, "TR28602", NULL, NULL }, // only guess --jk [TR28023 = eMicro EM28023 (new CT1297)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) { 0x54584e03, 0xffffffff, "TLV320AIC27", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) { 0x54584e20, 0xffffffff, "TLC320AD9xC", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) { 0x56494120, 0xfffffff0, "VIA1613", patch_vt1613, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) { 0x56494161, 0xffffffff, "VIA1612A", NULL, NULL }, // modified ICE1232 with S/PDIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) { 0x56494170, 0xffffffff, "VIA1617A", patch_vt1617a, NULL }, // modified VT1616 with S/PDIF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) { 0x56494182, 0xffffffff, "VIA1618", patch_vt1618, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) { 0x57454301, 0xffffffff, "W83971D", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) { 0x574d4c00, 0xffffffff, "WM9701,WM9701A", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) { 0x574d4C03, 0xffffffff, "WM9703,WM9707,WM9708,WM9717", patch_wolfson03, NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) { 0x574d4C04, 0xffffffff, "WM9704M,WM9704Q", patch_wolfson04, NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) { 0x574d4C05, 0xffffffff, "WM9705,WM9710", patch_wolfson05, NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) { 0x574d4C09, 0xffffffff, "WM9709", NULL, NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) { 0x574d4C12, 0xffffffff, "WM9711,WM9712,WM9715", patch_wolfson11, NULL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) { 0x574d4c13, 0xffffffff, "WM9713,WM9714", patch_wolfson13, NULL, AC97_DEFAULT_POWER_OFF},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) { 0x594d4800, 0xffffffff, "YMF743", patch_yamaha_ymf743, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) { 0x594d4802, 0xffffffff, "YMF752", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) { 0x594d4803, 0xffffffff, "YMF753", patch_yamaha_ymf753, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) { 0x83847600, 0xffffffff, "STAC9700,83,84", patch_sigmatel_stac9700, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) { 0x83847604, 0xffffffff, "STAC9701,3,4,5", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) { 0x83847605, 0xffffffff, "STAC9704", NULL, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) { 0x83847608, 0xffffffff, "STAC9708,11", patch_sigmatel_stac9708, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) { 0x83847609, 0xffffffff, "STAC9721,23", patch_sigmatel_stac9721, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) { 0x83847644, 0xffffffff, "STAC9744", patch_sigmatel_stac9744, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) { 0x83847650, 0xffffffff, "STAC9750,51", NULL, NULL }, // patch?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) { 0x83847652, 0xffffffff, "STAC9752,53", NULL, NULL }, // patch?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) { 0x83847656, 0xffffffff, "STAC9756,57", patch_sigmatel_stac9756, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) { 0x83847658, 0xffffffff, "STAC9758,59", patch_sigmatel_stac9758, NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { 0x83847666, 0xffffffff, "STAC9766,67", NULL, NULL }, // patch?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { 0, 0, NULL, NULL, NULL }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static void update_power_regs(struct snd_ac97 *ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define ac97_is_power_save_mode(ac97) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) ((ac97->scaps & AC97_SCAP_POWER_SAVE) && power_save)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define ac97_is_power_save_mode(ac97) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define ac97_err(ac97, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) dev_err((ac97)->bus->card->dev, fmt, ##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define ac97_warn(ac97, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) dev_warn((ac97)->bus->card->dev, fmt, ##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define ac97_dbg(ac97, fmt, args...) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dev_dbg((ac97)->bus->card->dev, fmt, ##args)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * I/O routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int snd_ac97_valid_reg(struct snd_ac97 *ac97, unsigned short reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* filter some registers for buggy codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) switch (ac97->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) case AC97_ID_ST_AC97_ID4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (reg == 0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) case AC97_ID_ST7597:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (reg == 0x22 || reg == 0x7a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) case AC97_ID_AK4540:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) case AC97_ID_AK4542:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (reg <= 0x1c || reg == 0x20 || reg == 0x26 || reg >= 0x7c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) case AC97_ID_AD1819: /* AD1819 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) case AC97_ID_AD1881: /* AD1881 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case AC97_ID_AD1881A: /* AD1881A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (reg >= 0x3a && reg <= 0x6e) /* 0x59 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) case AC97_ID_AD1885: /* AD1885 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) case AC97_ID_AD1886: /* AD1886 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) case AC97_ID_AD1886A: /* AD1886A - !!verify!! --jk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) case AC97_ID_AD1887: /* AD1887 - !!verify!! --jk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (reg == 0x5a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (reg >= 0x3c && reg <= 0x6e) /* 0x59 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) case AC97_ID_STAC9700:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) case AC97_ID_STAC9704:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) case AC97_ID_STAC9705:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) case AC97_ID_STAC9708:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case AC97_ID_STAC9721:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) case AC97_ID_STAC9744:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) case AC97_ID_STAC9756:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (reg <= 0x3a || reg >= 0x5a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * snd_ac97_write - write a value on the given register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * @reg: the register to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * @value: the value to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * Writes a value on the given register. This will invoke the write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * callback directly after the register check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * This function doesn't change the register cache unlike
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * #snd_ca97_write_cache(), so use this only when you don't want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * reflect the change to the suspend/resume state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) void snd_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (!snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) if ((ac97->id & 0xffffff00) == AC97_ID_ALC100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Fix H/W bug of ALC100/100P */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (reg == AC97_MASTER || reg == AC97_HEADPHONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ac97->bus->ops->write(ac97, AC97_RESET, 0); /* reset audio codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ac97->bus->ops->write(ac97, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) EXPORT_SYMBOL(snd_ac97_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * snd_ac97_read - read a value from the given register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) * @reg: the register to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * Reads a value from the given register. This will invoke the read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * callback directly after the register check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) * Return: The read value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) unsigned short snd_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) if (!snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return ac97->bus->ops->read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* read a register - return the cached value if already read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static inline unsigned short snd_ac97_read_cache(struct snd_ac97 *ac97, unsigned short reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (! test_bit(reg, ac97->reg_accessed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) ac97->regs[reg] = ac97->bus->ops->read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) // set_bit(reg, ac97->reg_accessed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) return ac97->regs[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) EXPORT_SYMBOL(snd_ac97_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * snd_ac97_write_cache - write a value on the given register and update the cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * @reg: the register to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * @value: the value to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * Writes a value on the given register and updates the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * cache. The cached values are used for the cached-read and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) * suspend/resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) void snd_ac97_write_cache(struct snd_ac97 *ac97, unsigned short reg, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (!snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ac97->regs[reg] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) ac97->bus->ops->write(ac97, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) set_bit(reg, ac97->reg_accessed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) EXPORT_SYMBOL(snd_ac97_write_cache);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * snd_ac97_update - update the value on the given register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * @reg: the register to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * @value: the value to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * Compares the value with the register cache and updates the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * only when the value is changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * Return: 1 if the value is changed, 0 if no change, or a negative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) int snd_ac97_update(struct snd_ac97 *ac97, unsigned short reg, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (!snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) change = ac97->regs[reg] != value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) ac97->regs[reg] = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ac97->bus->ops->write(ac97, reg, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) set_bit(reg, ac97->reg_accessed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) EXPORT_SYMBOL(snd_ac97_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * snd_ac97_update_bits - update the bits on the given register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * @reg: the register to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * @mask: the bit-mask to change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * @value: the value to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * Updates the masked-bits on the given register only when the value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * is changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * Return: 1 if the bits are changed, 0 if no change, or a negative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) int snd_ac97_update_bits(struct snd_ac97 *ac97, unsigned short reg, unsigned short mask, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (!snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) change = snd_ac97_update_bits_nolock(ac97, reg, mask, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) EXPORT_SYMBOL(snd_ac97_update_bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /* no lock version - see snd_ac97_update_bits() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int snd_ac97_update_bits_nolock(struct snd_ac97 *ac97, unsigned short reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) unsigned short mask, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) unsigned short old, new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) old = snd_ac97_read_cache(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) new = (old & ~mask) | (value & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) change = old != new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) ac97->regs[reg] = new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ac97->bus->ops->write(ac97, reg, new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) set_bit(reg, ac97->reg_accessed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static int snd_ac97_ad18xx_update_pcm_bits(struct snd_ac97 *ac97, int codec, unsigned short mask, unsigned short value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) unsigned short old, new, cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) mutex_lock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) old = ac97->spec.ad18xx.pcmreg[codec];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) new = (old & ~mask) | (value & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) change = old != new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) if (change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) cfg = snd_ac97_read_cache(ac97, AC97_AD_SERIAL_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) ac97->spec.ad18xx.pcmreg[codec] = new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* select single codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ac97->bus->ops->write(ac97, AC97_AD_SERIAL_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) (cfg & ~0x7000) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) /* update PCM bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) ac97->bus->ops->write(ac97, AC97_PCM, new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /* select all codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ac97->bus->ops->write(ac97, AC97_AD_SERIAL_CFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) cfg | 0x7000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) mutex_unlock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * Controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static int snd_ac97_info_enum_double(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return snd_ctl_enum_info(uinfo, e->shift_l == e->shift_r ? 1 : 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) e->mask, e->texts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) static int snd_ac97_get_enum_double(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) unsigned short val, bitmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) for (bitmask = 1; bitmask < e->mask; bitmask <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) val = snd_ac97_read_cache(ac97, e->reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ucontrol->value.enumerated.item[0] = (val >> e->shift_l) & (bitmask - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (e->shift_l != e->shift_r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ucontrol->value.enumerated.item[1] = (val >> e->shift_r) & (bitmask - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) static int snd_ac97_put_enum_double(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) unsigned short mask, bitmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) for (bitmask = 1; bitmask < e->mask; bitmask <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) if (ucontrol->value.enumerated.item[0] > e->mask - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) val = ucontrol->value.enumerated.item[0] << e->shift_l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) mask = (bitmask - 1) << e->shift_l;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if (e->shift_l != e->shift_r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (ucontrol->value.enumerated.item[1] > e->mask - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) val |= ucontrol->value.enumerated.item[1] << e->shift_r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) mask |= (bitmask - 1) << e->shift_r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return snd_ac97_update_bits(ac97, e->reg, mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* save/restore ac97 v2.3 paging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) static int snd_ac97_page_save(struct snd_ac97 *ac97, int reg, struct snd_kcontrol *kcontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) int page_save = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) if ((kcontrol->private_value & (1<<25)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) (ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_23 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) (reg >= 0x60 && reg < 0x70)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) unsigned short page = (kcontrol->private_value >> 26) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) mutex_lock(&ac97->page_mutex); /* lock paging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) page_save = snd_ac97_read(ac97, AC97_INT_PAGING) & AC97_PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return page_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static void snd_ac97_page_restore(struct snd_ac97 *ac97, int page_save)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) if (page_save >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page_save);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) mutex_unlock(&ac97->page_mutex); /* unlock paging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* volume and switch controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static int snd_ac97_info_volsw(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) uinfo->count = shift == rshift ? 1 : 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) uinfo->value.integer.max = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static int snd_ac97_get_volsw(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) int invert = (kcontrol->private_value >> 24) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) int page_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) page_save = snd_ac97_page_save(ac97, reg, kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ucontrol->value.integer.value[0] = (snd_ac97_read_cache(ac97, reg) >> shift) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (shift != rshift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) ucontrol->value.integer.value[1] = (snd_ac97_read_cache(ac97, reg) >> rshift) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (invert) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) if (shift != rshift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) snd_ac97_page_restore(ac97, page_save);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static int snd_ac97_put_volsw(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) int reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) int invert = (kcontrol->private_value >> 24) & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) int err, page_save;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) unsigned short val, val2, val_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) page_save = snd_ac97_page_save(ac97, reg, kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) val = (ucontrol->value.integer.value[0] & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) val = mask - val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) val_mask = mask << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) val = val << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (shift != rshift) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) val2 = (ucontrol->value.integer.value[1] & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (invert)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) val2 = mask - val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) val_mask |= mask << rshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) val |= val2 << rshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) err = snd_ac97_update_bits(ac97, reg, val_mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) snd_ac97_page_restore(ac97, page_save);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /* check analog mixer power-down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if ((val_mask & AC97_PD_EAPD) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) (kcontrol->private_value & (1<<30))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (val & AC97_PD_EAPD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ac97->power_up &= ~(1 << (reg>>1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) ac97->power_up |= 1 << (reg>>1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) update_power_regs(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) static const struct snd_kcontrol_new snd_ac97_controls_tone[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) AC97_SINGLE("Tone Control - Bass", AC97_MASTER_TONE, 8, 15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) AC97_SINGLE("Tone Control - Treble", AC97_MASTER_TONE, 0, 15, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) static const struct snd_kcontrol_new snd_ac97_controls_pc_beep[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) AC97_SINGLE("Beep Playback Switch", AC97_PC_BEEP, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) AC97_SINGLE("Beep Playback Volume", AC97_PC_BEEP, 1, 15, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) static const struct snd_kcontrol_new snd_ac97_controls_mic_boost =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) AC97_SINGLE("Mic Boost (+20dB)", AC97_MIC, 6, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) static const char* std_rec_sel[] = {"Mic", "CD", "Video", "Aux", "Line", "Mix", "Mix Mono", "Phone"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) static const char* std_3d_path[] = {"pre 3D", "post 3D"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) static const char* std_mix[] = {"Mix", "Mic"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) static const char* std_mic[] = {"Mic1", "Mic2"};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) static const struct ac97_enum std_enum[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) AC97_ENUM_DOUBLE(AC97_REC_SEL, 8, 0, 8, std_rec_sel),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 15, 2, std_3d_path),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 9, 2, std_mix),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 8, 2, std_mic),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static const struct snd_kcontrol_new snd_ac97_control_capture_src =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) AC97_ENUM("Capture Source", std_enum[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static const struct snd_kcontrol_new snd_ac97_control_capture_vol =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) AC97_DOUBLE("Capture Volume", AC97_REC_GAIN, 8, 0, 15, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static const struct snd_kcontrol_new snd_ac97_controls_mic_capture[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) AC97_SINGLE("Mic Capture Switch", AC97_REC_GAIN_MIC, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) AC97_SINGLE("Mic Capture Volume", AC97_REC_GAIN_MIC, 0, 15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) AC97_GENERAL_PCM_OUT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) AC97_GENERAL_STEREO_ENHANCEMENT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) AC97_GENERAL_3D,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) AC97_GENERAL_LOUDNESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) AC97_GENERAL_MONO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) AC97_GENERAL_MIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) AC97_GENERAL_LOOPBACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static const struct snd_kcontrol_new snd_ac97_controls_general[7] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) AC97_ENUM("PCM Out Path & Mute", std_enum[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) AC97_SINGLE("Simulated Stereo Enhancement", AC97_GENERAL_PURPOSE, 14, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) AC97_SINGLE("3D Control - Switch", AC97_GENERAL_PURPOSE, 13, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) AC97_SINGLE("Loudness (bass boost)", AC97_GENERAL_PURPOSE, 12, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) AC97_ENUM("Mono Output Select", std_enum[2]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) AC97_ENUM("Mic Select", std_enum[3]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) AC97_SINGLE("ADC/DAC Loopback", AC97_GENERAL_PURPOSE, 7, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) static const struct snd_kcontrol_new snd_ac97_controls_3d[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) AC97_SINGLE("3D Control - Center", AC97_3D_CONTROL, 8, 15, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) AC97_SINGLE("3D Control - Depth", AC97_3D_CONTROL, 0, 15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static const struct snd_kcontrol_new snd_ac97_controls_center[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) AC97_SINGLE("Center Playback Switch", AC97_CENTER_LFE_MASTER, 7, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) AC97_SINGLE("Center Playback Volume", AC97_CENTER_LFE_MASTER, 0, 31, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static const struct snd_kcontrol_new snd_ac97_controls_lfe[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) AC97_SINGLE("LFE Playback Switch", AC97_CENTER_LFE_MASTER, 15, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) AC97_SINGLE("LFE Playback Volume", AC97_CENTER_LFE_MASTER, 8, 31, 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) static const struct snd_kcontrol_new snd_ac97_control_eapd =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) AC97_SINGLE("External Amplifier", AC97_POWERDOWN, 15, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static const struct snd_kcontrol_new snd_ac97_controls_modem_switches[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) AC97_SINGLE("Off-hook Switch", AC97_GPIO_STATUS, 0, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) AC97_SINGLE("Caller ID Switch", AC97_GPIO_STATUS, 2, 1, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) /* change the existing EAPD control as inverted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) static void set_inv_eapd(struct snd_ac97 *ac97, struct snd_kcontrol *kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) kctl->private_value = AC97_SINGLE_VALUE(AC97_POWERDOWN, 15, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) snd_ac97_update_bits(ac97, AC97_POWERDOWN, (1<<15), (1<<15)); /* EAPD up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) ac97->scaps |= AC97_SCAP_INV_EAPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static int snd_ac97_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static int snd_ac97_spdif_cmask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) ucontrol->value.iec958.status[0] = IEC958_AES0_PROFESSIONAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) IEC958_AES0_NONAUDIO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) IEC958_AES0_CON_EMPHASIS_5015 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) IEC958_AES0_CON_NOT_COPYRIGHT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ucontrol->value.iec958.status[1] = IEC958_AES1_CON_CATEGORY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) IEC958_AES1_CON_ORIGINAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static int snd_ac97_spdif_pmask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /* FIXME: AC'97 spec doesn't say which bits are used for what */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) ucontrol->value.iec958.status[0] = IEC958_AES0_PROFESSIONAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) IEC958_AES0_NONAUDIO |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) IEC958_AES0_PRO_FS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) IEC958_AES0_PRO_EMPHASIS_5015;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static int snd_ac97_spdif_default_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) ucontrol->value.iec958.status[0] = ac97->spdif_status & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) ucontrol->value.iec958.status[1] = (ac97->spdif_status >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ucontrol->value.iec958.status[2] = (ac97->spdif_status >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) ucontrol->value.iec958.status[3] = (ac97->spdif_status >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) static int snd_ac97_spdif_default_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) unsigned int new = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) unsigned short val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) new = val = ucontrol->value.iec958.status[0] & (IEC958_AES0_PROFESSIONAL|IEC958_AES0_NONAUDIO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) if (ucontrol->value.iec958.status[0] & IEC958_AES0_PROFESSIONAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) new |= ucontrol->value.iec958.status[0] & (IEC958_AES0_PRO_FS|IEC958_AES0_PRO_EMPHASIS_5015);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) switch (new & IEC958_AES0_PRO_FS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) case IEC958_AES0_PRO_FS_44100: val |= 0<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) case IEC958_AES0_PRO_FS_48000: val |= 2<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) case IEC958_AES0_PRO_FS_32000: val |= 3<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) default: val |= 1<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) if ((new & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) val |= 1<<3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) new |= ucontrol->value.iec958.status[0] & (IEC958_AES0_CON_EMPHASIS_5015|IEC958_AES0_CON_NOT_COPYRIGHT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) new |= ((ucontrol->value.iec958.status[1] & (IEC958_AES1_CON_CATEGORY|IEC958_AES1_CON_ORIGINAL)) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) new |= ((ucontrol->value.iec958.status[3] & IEC958_AES3_CON_FS) << 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if ((new & IEC958_AES0_CON_EMPHASIS) == IEC958_AES0_CON_EMPHASIS_5015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) val |= 1<<3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (!(new & IEC958_AES0_CON_NOT_COPYRIGHT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) val |= 1<<2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) val |= ((new >> 8) & 0xff) << 4; // category + original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) switch ((new >> 24) & 0xff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) case IEC958_AES3_CON_FS_44100: val |= 0<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) case IEC958_AES3_CON_FS_48000: val |= 2<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) case IEC958_AES3_CON_FS_32000: val |= 3<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) default: val |= 1<<12; break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) change = ac97->spdif_status != new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) ac97->spdif_status = new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (ac97->flags & AC97_CS_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) int x = (val >> 12) & 0x03;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) switch (x) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) case 0: x = 1; break; // 44.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) case 2: x = 0; break; // 48.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) default: x = 0; break; // illegal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) change |= snd_ac97_update_bits_nolock(ac97, AC97_CSR_SPDIF, 0x3fff, ((val & 0xcfff) | (x << 12)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) } else if (ac97->flags & AC97_CX_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) int v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) v = new & (IEC958_AES0_CON_EMPHASIS_5015|IEC958_AES0_CON_NOT_COPYRIGHT) ? 0 : AC97_CXR_COPYRGT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) v |= new & IEC958_AES0_NONAUDIO ? AC97_CXR_SPDIF_AC3 : AC97_CXR_SPDIF_PCM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) change |= snd_ac97_update_bits_nolock(ac97, AC97_CXR_AUDIO_MISC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) AC97_CXR_SPDIF_MASK | AC97_CXR_COPYRGT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) } else if (ac97->id == AC97_ID_YMF743) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) change |= snd_ac97_update_bits_nolock(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) AC97_YMF7X3_DIT_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) 0xff38,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) ((val << 4) & 0xff00) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) ((val << 2) & 0x0038));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) unsigned short extst = snd_ac97_read_cache(ac97, AC97_EXTENDED_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); /* turn off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) change |= snd_ac97_update_bits_nolock(ac97, AC97_SPDIF, 0x3fff, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) if (extst & AC97_EA_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) static int snd_ac97_put_spsa(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) int reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) // int invert = (kcontrol->private_value >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) unsigned short value, old, new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) value = (ucontrol->value.integer.value[0] & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) mutex_lock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) mask <<= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) value <<= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) old = snd_ac97_read_cache(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) new = (old & ~mask) | value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) change = old != new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if (change) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) unsigned short extst = snd_ac97_read_cache(ac97, AC97_EXTENDED_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); /* turn off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) change = snd_ac97_update_bits_nolock(ac97, reg, mask, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) if (extst & AC97_EA_SPDIF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) mutex_unlock(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) static const struct snd_kcontrol_new snd_ac97_controls_spdif[5] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .access = SNDRV_CTL_ELEM_ACCESS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) .info = snd_ac97_spdif_mask_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .get = snd_ac97_spdif_cmask_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .access = SNDRV_CTL_ELEM_ACCESS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .info = snd_ac97_spdif_mask_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .get = snd_ac97_spdif_pmask_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) .info = snd_ac97_spdif_mask_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .get = snd_ac97_spdif_default_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) .put = snd_ac97_spdif_default_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),AC97_EXTENDED_STATUS, 2, 1, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) .info = snd_ac97_info_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) .get = snd_ac97_get_volsw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .put = snd_ac97_put_spsa,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) .private_value = AC97_SINGLE_VALUE(AC97_EXTENDED_STATUS, 4, 3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) #define AD18XX_PCM_BITS(xname, codec, lshift, rshift, mask) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_ad18xx_pcm_info_bits, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) .get = snd_ac97_ad18xx_pcm_get_bits, .put = snd_ac97_ad18xx_pcm_put_bits, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) .private_value = (codec) | ((lshift) << 8) | ((rshift) << 12) | ((mask) << 16) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static int snd_ac97_ad18xx_pcm_info_bits(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) int mask = (kcontrol->private_value >> 16) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) int lshift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) uinfo->count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) uinfo->value.integer.max = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) static int snd_ac97_ad18xx_pcm_get_bits(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) int codec = kcontrol->private_value & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) int lshift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) ucontrol->value.integer.value[0] = mask - ((ac97->spec.ad18xx.pcmreg[codec] >> lshift) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) ucontrol->value.integer.value[1] = mask - ((ac97->spec.ad18xx.pcmreg[codec] >> rshift) & mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) static int snd_ac97_ad18xx_pcm_put_bits(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) int codec = kcontrol->private_value & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) int lshift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) int mask = (kcontrol->private_value >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) unsigned short val, valmask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) val = (mask - (ucontrol->value.integer.value[0] & mask)) << lshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) valmask = mask << lshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) val |= (mask - (ucontrol->value.integer.value[1] & mask)) << rshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) valmask |= mask << rshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return snd_ac97_ad18xx_update_pcm_bits(ac97, codec, valmask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) #define AD18XX_PCM_VOLUME(xname, codec) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_ad18xx_pcm_info_volume, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) .get = snd_ac97_ad18xx_pcm_get_volume, .put = snd_ac97_ad18xx_pcm_put_volume, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) .private_value = codec }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) static int snd_ac97_ad18xx_pcm_info_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) uinfo->count = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) uinfo->value.integer.max = 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static int snd_ac97_ad18xx_pcm_get_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) int codec = kcontrol->private_value & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) mutex_lock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) ucontrol->value.integer.value[0] = 31 - ((ac97->spec.ad18xx.pcmreg[codec] >> 8) & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) ucontrol->value.integer.value[1] = 31 - ((ac97->spec.ad18xx.pcmreg[codec] >> 0) & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) mutex_unlock(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) static int snd_ac97_ad18xx_pcm_put_volume(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) int codec = kcontrol->private_value & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) unsigned short val1, val2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) val1 = 31 - (ucontrol->value.integer.value[0] & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) val2 = 31 - (ucontrol->value.integer.value[1] & 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) return snd_ac97_ad18xx_update_pcm_bits(ac97, codec, 0x1f1f, (val1 << 8) | val2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) static const struct snd_kcontrol_new snd_ac97_controls_ad18xx_pcm[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) AD18XX_PCM_BITS("PCM Playback Switch", 0, 15, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) AD18XX_PCM_VOLUME("PCM Playback Volume", 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) static const struct snd_kcontrol_new snd_ac97_controls_ad18xx_surround[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) AD18XX_PCM_BITS("Surround Playback Switch", 1, 15, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) AD18XX_PCM_VOLUME("Surround Playback Volume", 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) static const struct snd_kcontrol_new snd_ac97_controls_ad18xx_center[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) AD18XX_PCM_BITS("Center Playback Switch", 2, 15, 15, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) AD18XX_PCM_BITS("Center Playback Volume", 2, 8, 8, 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) static const struct snd_kcontrol_new snd_ac97_controls_ad18xx_lfe[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) AD18XX_PCM_BITS("LFE Playback Switch", 2, 7, 7, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) AD18XX_PCM_BITS("LFE Playback Volume", 2, 0, 0, 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) static void snd_ac97_powerdown(struct snd_ac97 *ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) static int snd_ac97_bus_free(struct snd_ac97_bus *bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) if (bus) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) snd_ac97_bus_proc_done(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) kfree(bus->pcms);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) if (bus->private_free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) bus->private_free(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) kfree(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) static int snd_ac97_bus_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) struct snd_ac97_bus *bus = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) return snd_ac97_bus_free(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) static int snd_ac97_free(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) if (ac97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) cancel_delayed_work_sync(&ac97->power_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) snd_ac97_proc_done(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) if (ac97->bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ac97->bus->codec[ac97->num] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) if (ac97->private_free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) ac97->private_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) kfree(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) static int snd_ac97_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) struct snd_ac97 *ac97 = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) snd_ac97_powerdown(ac97); /* for avoiding click noises during shut down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) return snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) static int snd_ac97_try_volume_mix(struct snd_ac97 * ac97, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) unsigned short val, mask = AC97_MUTE_MASK_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) if (! snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) switch (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) case AC97_MASTER_TONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) return ac97->caps & AC97_BC_BASS_TREBLE ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) case AC97_HEADPHONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) return ac97->caps & AC97_BC_HEADPHONE ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) case AC97_REC_GAIN_MIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) return ac97->caps & AC97_BC_DEDICATED_MIC ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) case AC97_3D_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) if (ac97->caps & AC97_BC_3D_TECH_ID_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /* if nonzero - fixed and we can't set it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) return val == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) case AC97_CENTER_LFE_MASTER: /* center */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) if ((ac97->ext_id & AC97_EI_CDAC) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) case AC97_CENTER_LFE_MASTER+1: /* lfe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) if ((ac97->ext_id & AC97_EI_LDAC) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) reg = AC97_CENTER_LFE_MASTER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) mask = 0x0080;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) case AC97_SURROUND_MASTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) if ((ac97->ext_id & AC97_EI_SDAC) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) if (!(val & mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) /* nothing seems to be here - mute flag is not set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) /* try another test */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) snd_ac97_write_cache(ac97, reg, val | mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) if (!(val & mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) return 0; /* nothing here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) return 1; /* success, useable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) static void check_volume_resolution(struct snd_ac97 *ac97, int reg, unsigned char *lo_max, unsigned char *hi_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) unsigned short cbit[3] = { 0x20, 0x10, 0x01 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) unsigned char max[3] = { 63, 31, 15 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) /* first look up the static resolution table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) if (ac97->res_table) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) const struct snd_ac97_res_table *tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) for (tbl = ac97->res_table; tbl->reg; tbl++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (tbl->reg == reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) *lo_max = tbl->bits & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) *hi_max = (tbl->bits >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) *lo_max = *hi_max = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) for (i = 0 ; i < ARRAY_SIZE(cbit); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) snd_ac97_write(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) ac97, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) AC97_MUTE_MASK_STEREO | cbit[i] | (cbit[i] << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) /* Do the read twice due to buffers on some ac97 codecs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) * e.g. The STAC9704 returns exactly what you wrote to the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) * if you read it immediately. This causes the detect routine to fail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (! *lo_max && (val & 0x7f) == cbit[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) *lo_max = max[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) if (! *hi_max && ((val >> 8) & 0x7f) == cbit[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) *hi_max = max[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) if (*lo_max && *hi_max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) static int snd_ac97_try_bit(struct snd_ac97 * ac97, int reg, int bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) unsigned short mask, val, orig, res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) mask = 1 << bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) orig = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) val = orig ^ mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) snd_ac97_write(ac97, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) res = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) snd_ac97_write_cache(ac97, reg, orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) return res == val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) /* check the volume resolution of center/lfe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) static void snd_ac97_change_volume_params2(struct snd_ac97 * ac97, int reg, int shift, unsigned char *max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) unsigned short val, val1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) *max = 63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) val = AC97_MUTE_MASK_STEREO | (0x20 << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) snd_ac97_write(ac97, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) val1 = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) if (val != val1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) *max = 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) /* reset volume to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) snd_ac97_write_cache(ac97, reg, AC97_MUTE_MASK_STEREO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) static inline int printable(unsigned int x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) x &= 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) if (x < ' ' || x >= 0x71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) if (x <= 0x89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) return x - 0x71 + 'A';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) return '?';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) return x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) static struct snd_kcontrol *snd_ac97_cnew(const struct snd_kcontrol_new *_template,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) struct snd_kcontrol_new template;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) memcpy(&template, _template, sizeof(template));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) template.index = ac97->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) return snd_ctl_new1(&template, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) * create mute switch(es) for normal stereo controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) static int snd_ac97_cmute_new_stereo(struct snd_card *card, char *name, int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) int check_stereo, int check_amix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) unsigned short val, val1, mute_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) if (! snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) mute_mask = AC97_MUTE_MASK_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) if (check_stereo || (ac97->flags & AC97_STEREO_MUTES)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) /* check whether both mute bits work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) val1 = val | AC97_MUTE_MASK_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) snd_ac97_write(ac97, reg, val1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) if (val1 == snd_ac97_read(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) mute_mask = AC97_MUTE_MASK_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) if (mute_mask == AC97_MUTE_MASK_STEREO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) struct snd_kcontrol_new tmp = AC97_DOUBLE(name, reg, 15, 7, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) if (check_amix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) tmp.private_value |= (1 << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) tmp.index = ac97->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) kctl = snd_ctl_new1(&tmp, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) struct snd_kcontrol_new tmp = AC97_SINGLE(name, reg, 15, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) if (check_amix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) tmp.private_value |= (1 << 30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) tmp.index = ac97->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) kctl = snd_ctl_new1(&tmp, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) err = snd_ctl_add(card, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) /* mute as default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) snd_ac97_write_cache(ac97, reg, val | mute_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) * set dB information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) static const unsigned int *find_db_scale(unsigned int maxval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) switch (maxval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) case 0x0f: return db_scale_4bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) case 0x1f: return db_scale_5bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) case 0x3f: return db_scale_6bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) static void set_tlv_db_scale(struct snd_kcontrol *kctl, const unsigned int *tlv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) kctl->tlv.p = tlv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) if (tlv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_TLV_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) * create a volume for normal stereo/mono controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) static int snd_ac97_cvol_new(struct snd_card *card, char *name, int reg, unsigned int lo_max,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) unsigned int hi_max, struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) if (! snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) if (hi_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) /* invert */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) struct snd_kcontrol_new tmp = AC97_DOUBLE(name, reg, 8, 0, lo_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) tmp.index = ac97->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) kctl = snd_ctl_new1(&tmp, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) /* invert */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) struct snd_kcontrol_new tmp = AC97_SINGLE(name, reg, 0, lo_max, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) tmp.index = ac97->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) kctl = snd_ctl_new1(&tmp, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) if (!kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) if (reg >= AC97_PHONE && reg <= AC97_PCM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) set_tlv_db_scale(kctl, db_scale_5bit_12db_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) set_tlv_db_scale(kctl, find_db_scale(lo_max));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) err = snd_ctl_add(card, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) snd_ac97_write_cache(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) ac97, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) (snd_ac97_read(ac97, reg) & AC97_MUTE_MASK_STEREO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) | lo_max | (hi_max << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) * create a mute-switch and a volume for normal stereo/mono controls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) static int snd_ac97_cmix_new_stereo(struct snd_card *card, const char *pfx,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) int reg, int check_stereo, int check_amix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) unsigned char lo_max, hi_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) if (! snd_ac97_valid_reg(ac97, reg))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) if (snd_ac97_try_bit(ac97, reg, 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) sprintf(name, "%s Switch", pfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) if ((err = snd_ac97_cmute_new_stereo(card, name, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) check_stereo, check_amix,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) check_volume_resolution(ac97, reg, &lo_max, &hi_max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) if (lo_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) sprintf(name, "%s Volume", pfx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) if ((err = snd_ac97_cvol_new(card, name, reg, lo_max, hi_max, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) #define snd_ac97_cmix_new(card, pfx, reg, acheck, ac97) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) snd_ac97_cmix_new_stereo(card, pfx, reg, 0, acheck, ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) #define snd_ac97_cmute_new(card, name, reg, acheck, ac97) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) snd_ac97_cmute_new_stereo(card, name, reg, 0, acheck, ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) static unsigned int snd_ac97_determine_spdif_rates(struct snd_ac97 *ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) static int snd_ac97_mixer_build(struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) struct snd_card *card = ac97->bus->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) unsigned char max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) /* build master controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) /* AD claims to remove this control from AD1887, although spec v2.2 does not allow this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) if (snd_ac97_try_volume_mix(ac97, AC97_MASTER)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) if (ac97->flags & AC97_HAS_NO_MASTER_VOL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) err = snd_ac97_cmute_new(card, "Master Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) AC97_MASTER, 0, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) err = snd_ac97_cmix_new(card, "Master Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) AC97_MASTER, 0, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) ac97->regs[AC97_CENTER_LFE_MASTER] = AC97_MUTE_MASK_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) /* build center controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) if ((snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) && !(ac97->flags & AC97_AD_MULTI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_center[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_center[1], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) snd_ac97_change_volume_params2(ac97, AC97_CENTER_LFE_MASTER, 0, &max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) kctl->private_value &= ~(0xff << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) kctl->private_value |= (int)max << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) set_tlv_db_scale(kctl, find_db_scale(max));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) snd_ac97_write_cache(ac97, AC97_CENTER_LFE_MASTER, ac97->regs[AC97_CENTER_LFE_MASTER] | max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) /* build LFE controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) if ((snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER+1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) && !(ac97->flags & AC97_AD_MULTI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_lfe[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_lfe[1], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) snd_ac97_change_volume_params2(ac97, AC97_CENTER_LFE_MASTER, 8, &max);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) kctl->private_value &= ~(0xff << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) kctl->private_value |= (int)max << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) set_tlv_db_scale(kctl, find_db_scale(max));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) snd_ac97_write_cache(ac97, AC97_CENTER_LFE_MASTER, ac97->regs[AC97_CENTER_LFE_MASTER] | max << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) /* build surround controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) if ((snd_ac97_try_volume_mix(ac97, AC97_SURROUND_MASTER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) && !(ac97->flags & AC97_AD_MULTI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) /* Surround Master (0x38) is with stereo mutes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) if ((err = snd_ac97_cmix_new_stereo(card, "Surround Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) AC97_SURROUND_MASTER, 1, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) /* build headphone controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) if (snd_ac97_try_volume_mix(ac97, AC97_HEADPHONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) if ((err = snd_ac97_cmix_new(card, "Headphone Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) AC97_HEADPHONE, 0, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) /* build master mono controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) if (snd_ac97_try_volume_mix(ac97, AC97_MASTER_MONO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) if ((err = snd_ac97_cmix_new(card, "Master Mono Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) AC97_MASTER_MONO, 0, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) /* build master tone controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) if (!(ac97->flags & AC97_HAS_NO_TONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) if (snd_ac97_try_volume_mix(ac97, AC97_MASTER_TONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) for (idx = 0; idx < 2; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_tone[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) if (ac97->id == AC97_ID_YMF743 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) ac97->id == AC97_ID_YMF753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) kctl->private_value &= ~(0xff << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) kctl->private_value |= 7 << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) snd_ac97_write_cache(ac97, AC97_MASTER_TONE, 0x0f0f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) /* build Beep controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) if (!(ac97->flags & AC97_HAS_NO_PC_BEEP) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) ((ac97->flags & AC97_HAS_PC_BEEP) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) snd_ac97_try_volume_mix(ac97, AC97_PC_BEEP))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_pc_beep[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) set_tlv_db_scale(kctl, db_scale_4bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) snd_ac97_write_cache(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) AC97_PC_BEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) (snd_ac97_read(ac97, AC97_PC_BEEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) | AC97_MUTE_MASK_MONO | 0x001e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) /* build Phone controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) if (!(ac97->flags & AC97_HAS_NO_PHONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) if (snd_ac97_try_volume_mix(ac97, AC97_PHONE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) if ((err = snd_ac97_cmix_new(card, "Phone Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) AC97_PHONE, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) /* build MIC controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) if (!(ac97->flags & AC97_HAS_NO_MIC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) if (snd_ac97_try_volume_mix(ac97, AC97_MIC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) if ((err = snd_ac97_cmix_new(card, "Mic Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) AC97_MIC, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_mic_boost, ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) /* build Line controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) if (snd_ac97_try_volume_mix(ac97, AC97_LINE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) if ((err = snd_ac97_cmix_new(card, "Line Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) AC97_LINE, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) /* build CD controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) if (!(ac97->flags & AC97_HAS_NO_CD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) if (snd_ac97_try_volume_mix(ac97, AC97_CD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) if ((err = snd_ac97_cmix_new(card, "CD Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) AC97_CD, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) /* build Video controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) if (!(ac97->flags & AC97_HAS_NO_VIDEO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) if (snd_ac97_try_volume_mix(ac97, AC97_VIDEO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) if ((err = snd_ac97_cmix_new(card, "Video Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) AC97_VIDEO, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) /* build Aux controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) if (!(ac97->flags & AC97_HAS_NO_AUX)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) if (snd_ac97_try_volume_mix(ac97, AC97_AUX)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) if ((err = snd_ac97_cmix_new(card, "Aux Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) AC97_AUX, 1, ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) /* build PCM controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) if (ac97->flags & AC97_AD_MULTI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) unsigned short init_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) if (ac97->flags & AC97_STEREO_MUTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) init_val = 0x9f9f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) init_val = 0x9f1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_ad18xx_pcm[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) set_tlv_db_scale(kctl, db_scale_5bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) ac97->spec.ad18xx.pcmreg[0] = init_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) if (ac97->scaps & AC97_SCAP_SURROUND_DAC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_ad18xx_surround[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) set_tlv_db_scale(kctl, db_scale_5bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) ac97->spec.ad18xx.pcmreg[1] = init_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_ad18xx_center[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) set_tlv_db_scale(kctl, db_scale_5bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_ad18xx_lfe[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) set_tlv_db_scale(kctl, db_scale_5bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) ac97->spec.ad18xx.pcmreg[2] = init_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) snd_ac97_write_cache(ac97, AC97_PCM, init_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) if (!(ac97->flags & AC97_HAS_NO_STD_PCM)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) if (ac97->flags & AC97_HAS_NO_PCM_VOL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) err = snd_ac97_cmute_new(card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) "PCM Playback Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) AC97_PCM, 0, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) err = snd_ac97_cmix_new(card, "PCM Playback",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) AC97_PCM, 0, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) /* build Capture controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) if (!(ac97->flags & AC97_HAS_NO_REC_GAIN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_src, ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) if (snd_ac97_try_bit(ac97, AC97_REC_GAIN, 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) err = snd_ac97_cmute_new(card, "Capture Switch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) AC97_REC_GAIN, 0, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_control_capture_vol, ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) set_tlv_db_scale(kctl, db_scale_rec_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) snd_ac97_write_cache(ac97, AC97_REC_SEL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) /* build MIC Capture controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) if (snd_ac97_try_volume_mix(ac97, AC97_REC_GAIN_MIC)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) for (idx = 0; idx < 2; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_mic_capture[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) set_tlv_db_scale(kctl, db_scale_rec_gain);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) snd_ac97_write_cache(ac97, AC97_REC_GAIN_MIC, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) /* build PCM out path & mute control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_PCM_OUT], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) /* build Simulated Stereo Enhancement control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) if (ac97->caps & AC97_BC_SIM_STEREO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_STEREO_ENHANCEMENT], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) /* build 3D Stereo Enhancement control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 13)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_3D], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) /* build Loudness control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) if (ac97->caps & AC97_BC_LOUDNESS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOUDNESS], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) /* build Mono output select control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 9)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_MONO], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) /* build Mic select control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 8)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_MIC], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) /* build ADC/DAC loopback control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) if (enable_loopback && snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOOPBACK], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, ~AC97_GP_DRSS_MASK, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) /* build 3D controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) if (ac97->build_ops->build_3d) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) ac97->build_ops->build_3d(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) if (snd_ac97_try_volume_mix(ac97, AC97_3D_CONTROL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) val = 0x0707;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) snd_ac97_write(ac97, AC97_3D_CONTROL, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) val = snd_ac97_read(ac97, AC97_3D_CONTROL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) val = val == 0x0606;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) kctl->private_value = AC97_3D_CONTROL | (9 << 8) | (7 << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[1], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) kctl->private_value = AC97_3D_CONTROL | (1 << 8) | (7 << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) /* build S/PDIF controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) /* Hack for ASUS P5P800-VM, which does not indicate S/PDIF capability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) if (ac97->subsystem_vendor == 0x1043 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) ac97->subsystem_device == 0x810f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) ac97->ext_id |= AC97_EI_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) if ((ac97->ext_id & AC97_EI_SPDIF) && !(ac97->scaps & AC97_SCAP_NO_SPDIF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) if (ac97->build_ops->build_spdif) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) if ((err = ac97->build_ops->build_spdif(ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) for (idx = 0; idx < 5; idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_spdif[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) if (ac97->build_ops->build_post_spdif) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) if ((err = ac97->build_ops->build_post_spdif(ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) /* set default PCM S/PDIF params */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) snd_ac97_write_cache(ac97, AC97_SPDIF, 0x2a20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) ac97->rates[AC97_RATES_SPDIF] = snd_ac97_determine_spdif_rates(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) ac97->spdif_status = SNDRV_PCM_DEFAULT_CON_SPDIF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) /* build chip specific controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) if (ac97->build_ops->build_specific)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) if ((err = ac97->build_ops->build_specific(ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) if (snd_ac97_try_bit(ac97, AC97_POWERDOWN, 15)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) kctl = snd_ac97_cnew(&snd_ac97_control_eapd, ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) if (! kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) if (ac97->scaps & AC97_SCAP_INV_EAPD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) set_inv_eapd(ac97, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) if ((err = snd_ctl_add(card, kctl)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) static int snd_ac97_modem_build(struct snd_card *card, struct snd_ac97 * ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) int err, idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) ac97_dbg(ac97, "AC97_GPIO_CFG = %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) snd_ac97_read(ac97,AC97_GPIO_CFG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) snd_ac97_write(ac97, AC97_GPIO_CFG, 0xffff & ~(AC97_GPIO_LINE1_OH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) snd_ac97_write(ac97, AC97_GPIO_POLARITY, 0xffff & ~(AC97_GPIO_LINE1_OH));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) snd_ac97_write(ac97, AC97_GPIO_STICKY, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) snd_ac97_write(ac97, AC97_GPIO_WAKEUP, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) snd_ac97_write(ac97, AC97_MISC_AFE, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) /* build modem switches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) for (idx = 0; idx < ARRAY_SIZE(snd_ac97_controls_modem_switches); idx++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ac97_controls_modem_switches[idx], ac97))) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) /* build chip specific controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) if (ac97->build_ops->build_specific)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) if ((err = ac97->build_ops->build_specific(ac97)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) static int snd_ac97_test_rate(struct snd_ac97 *ac97, int reg, int shadow_reg, int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) unsigned int tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) tmp = ((unsigned int)rate * ac97->bus->clock) / 48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) snd_ac97_write_cache(ac97, reg, tmp & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) if (shadow_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) snd_ac97_write_cache(ac97, shadow_reg, tmp & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) val = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) return val == (tmp & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) static void snd_ac97_determine_rates(struct snd_ac97 *ac97, int reg, int shadow_reg, unsigned int *r_result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) unsigned int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) unsigned short saved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) if (ac97->bus->no_vra) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) *r_result = SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) if ((ac97->flags & AC97_DOUBLE_RATE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) reg == AC97_PCM_FRONT_DAC_RATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) *r_result |= SNDRV_PCM_RATE_96000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) saved = snd_ac97_read(ac97, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) AC97_EA_DRA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) /* test a non-standard rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 11000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) result |= SNDRV_PCM_RATE_CONTINUOUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) /* let's try to obtain standard rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 8000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) result |= SNDRV_PCM_RATE_8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 11025))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) result |= SNDRV_PCM_RATE_11025;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 16000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) result |= SNDRV_PCM_RATE_16000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 22050))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) result |= SNDRV_PCM_RATE_22050;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 32000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) result |= SNDRV_PCM_RATE_32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 44100))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) result |= SNDRV_PCM_RATE_44100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 48000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) result |= SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) if ((ac97->flags & AC97_DOUBLE_RATE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) reg == AC97_PCM_FRONT_DAC_RATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) /* test standard double rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) AC97_EA_DRA, AC97_EA_DRA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 64000 / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) result |= SNDRV_PCM_RATE_64000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 88200 / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) result |= SNDRV_PCM_RATE_88200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) if (snd_ac97_test_rate(ac97, reg, shadow_reg, 96000 / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) result |= SNDRV_PCM_RATE_96000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) /* some codecs don't support variable double rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) if (!snd_ac97_test_rate(ac97, reg, shadow_reg, 76100 / 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) result &= ~SNDRV_PCM_RATE_CONTINUOUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) AC97_EA_DRA, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) /* restore the default value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) snd_ac97_write_cache(ac97, reg, saved);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) if (shadow_reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) snd_ac97_write_cache(ac97, shadow_reg, saved);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) *r_result = result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) /* check AC97_SPDIF register to accept which sample rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) static unsigned int snd_ac97_determine_spdif_rates(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) unsigned int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) static const unsigned short ctl_bits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) AC97_SC_SPSR_44K, AC97_SC_SPSR_32K, AC97_SC_SPSR_48K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) static const unsigned int rate_bits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) SNDRV_PCM_RATE_44100, SNDRV_PCM_RATE_32000, SNDRV_PCM_RATE_48000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) for (i = 0; i < (int)ARRAY_SIZE(ctl_bits); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) snd_ac97_update_bits(ac97, AC97_SPDIF, AC97_SC_SPSR_MASK, ctl_bits[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) if ((snd_ac97_read(ac97, AC97_SPDIF) & AC97_SC_SPSR_MASK) == ctl_bits[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) result |= rate_bits[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) /* look for the codec id table matching with the given id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) static const struct ac97_codec_id *look_for_codec_id(const struct ac97_codec_id *table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) unsigned int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) const struct ac97_codec_id *pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) for (pid = table; pid->id; pid++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) if (pid->id == (id & pid->mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) return pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) void snd_ac97_get_name(struct snd_ac97 *ac97, unsigned int id, char *name, int modem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) const struct ac97_codec_id *pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) sprintf(name, "0x%x %c%c%c", id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) printable(id >> 24),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) printable(id >> 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) printable(id >> 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) pid = look_for_codec_id(snd_ac97_codec_id_vendors, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) if (! pid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) strcpy(name, pid->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) if (ac97 && pid->patch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) pid->patch(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) pid = look_for_codec_id(snd_ac97_codec_ids, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) if (pid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) strcat(name, " ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) strcat(name, pid->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) if (pid->mask != 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) sprintf(name + strlen(name), " rev %d", id & ~pid->mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) if (ac97 && pid->patch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) pid->patch(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) sprintf(name + strlen(name), " id %x", id & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) * snd_ac97_get_short_name - retrieve codec name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) * @ac97: the codec instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) * Return: The short identifying name of the codec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) const char *snd_ac97_get_short_name(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) const struct ac97_codec_id *pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) for (pid = snd_ac97_codec_ids; pid->id; pid++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) if (pid->id == (ac97->id & pid->mask))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) return pid->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) return "unknown codec";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) EXPORT_SYMBOL(snd_ac97_get_short_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) /* wait for a while until registers are accessible after RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) * return 0 if ok, negative not ready
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) static int ac97_reset_wait(struct snd_ac97 *ac97, int timeout, int with_modem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) unsigned long end_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) end_time = jiffies + timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) /* use preliminary reads to settle the communication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) snd_ac97_read(ac97, AC97_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) snd_ac97_read(ac97, AC97_VENDOR_ID1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) snd_ac97_read(ac97, AC97_VENDOR_ID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) /* modem? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) if (with_modem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) val = snd_ac97_read(ac97, AC97_EXTENDED_MID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) if (val != 0xffff && (val & 1) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) if (ac97->scaps & AC97_SCAP_DETECT_BY_VENDOR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) /* probably only Xbox issue - all registers are read as zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) val = snd_ac97_read(ac97, AC97_VENDOR_ID1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) if (val != 0 && val != 0xffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) /* because the PCM or MASTER volume registers can be modified,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) * the REC_GAIN register is used for tests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) /* test if we can write to the record gain volume register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a05);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) if ((snd_ac97_read(ac97, AC97_REC_GAIN) & 0x7fff) == 0x0a05)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) } while (time_after_eq(end_time, jiffies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) * snd_ac97_bus - create an AC97 bus component
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) * @card: the card instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) * @num: the bus number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) * @ops: the bus callbacks table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) * @private_data: private data pointer for the new instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) * @rbus: the pointer to store the new AC97 bus instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) * Creates an AC97 bus component. An struct snd_ac97_bus instance is newly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) * allocated and initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) * The ops table must include valid callbacks (at least read and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) * write). The other callbacks, wait and reset, are not mandatory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) * The clock is set to 48000. If another clock is needed, set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) * ``(*rbus)->clock`` manually.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) * The AC97 bus instance is registered as a low-level device, so you don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) * have to release it manually.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895) * Return: Zero if successful, or a negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) int snd_ac97_bus(struct snd_card *card, int num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) const struct snd_ac97_bus_ops *ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) void *private_data, struct snd_ac97_bus **rbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) struct snd_ac97_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) static const struct snd_device_ops dev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904) .dev_free = snd_ac97_bus_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) if (snd_BUG_ON(!card))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) bus = kzalloc(sizeof(*bus), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) if (bus == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) bus->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) bus->num = num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) bus->ops = ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915) bus->private_data = private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) bus->clock = 48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) spin_lock_init(&bus->bus_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) snd_ac97_bus_proc_init(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) if ((err = snd_device_new(card, SNDRV_DEV_BUS, bus, &dev_ops)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) snd_ac97_bus_free(bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) if (rbus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) *rbus = bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) EXPORT_SYMBOL(snd_ac97_bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930) /* stop no dev release warning */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) static void ac97_device_release(struct device * dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) /* register ac97 codec to bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) static int snd_ac97_dev_register(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) struct snd_ac97 *ac97 = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) ac97->dev.bus = &ac97_bus_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) ac97->dev.parent = ac97->bus->card->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) ac97->dev.release = ac97_device_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) dev_set_name(&ac97->dev, "%d-%d:%s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) ac97->bus->card->number, ac97->num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) snd_ac97_get_short_name(ac97));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) if ((err = device_register(&ac97->dev)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) ac97_err(ac97, "Can't register ac97 bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) ac97->dev.bus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) /* disconnect ac97 codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) static int snd_ac97_dev_disconnect(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) struct snd_ac97 *ac97 = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) if (ac97->dev.bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) device_unregister(&ac97->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) /* build_ops to do nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) static const struct snd_ac97_build_ops null_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) static void do_update_power(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) update_power_regs(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) container_of(work, struct snd_ac97, power_work.work));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) * snd_ac97_mixer - create an Codec97 component
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) * @bus: the AC97 bus which codec is attached to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) * @template: the template of ac97, including index, callbacks and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) * the private data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) * @rac97: the pointer to store the new ac97 instance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) * Creates an Codec97 component. An struct snd_ac97 instance is newly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) * allocated and initialized from the template. The codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) * is then initialized by the standard procedure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) * The template must include the codec number (num) and address (addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) * and the private data (private_data).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) * The ac97 instance is registered as a low-level device, so you don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) * have to release it manually.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) * Return: Zero if successful, or a negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) int snd_ac97_mixer(struct snd_ac97_bus *bus, struct snd_ac97_template *template, struct snd_ac97 **rac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) struct snd_ac97 *ac97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) char name[64];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) unsigned long end_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) unsigned int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) const struct ac97_codec_id *pid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) static const struct snd_device_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) .dev_free = snd_ac97_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) .dev_register = snd_ac97_dev_register,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) .dev_disconnect = snd_ac97_dev_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) if (rac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) *rac97 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) if (snd_BUG_ON(!bus || !template))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) if (snd_BUG_ON(template->num >= 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) if (bus->codec[template->num])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) card = bus->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019) ac97 = kzalloc(sizeof(*ac97), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) if (ac97 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) ac97->private_data = template->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) ac97->private_free = template->private_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) ac97->bus = bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025) ac97->pci = template->pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) ac97->num = template->num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) ac97->addr = template->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) ac97->scaps = template->scaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) ac97->res_table = template->res_table;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) bus->codec[ac97->num] = ac97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031) mutex_init(&ac97->reg_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) mutex_init(&ac97->page_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) INIT_DELAYED_WORK(&ac97->power_work, do_update_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) if (ac97->pci) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) pci_read_config_word(ac97->pci, PCI_SUBSYSTEM_VENDOR_ID, &ac97->subsystem_vendor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) pci_read_config_word(ac97->pci, PCI_SUBSYSTEM_ID, &ac97->subsystem_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) if (bus->ops->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) bus->ops->reset(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) goto __access_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) ac97->id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) ac97->id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) if (ac97->id && ac97->id != (unsigned int)-1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) pid = look_for_codec_id(snd_ac97_codec_ids, ac97->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) if (pid && (pid->flags & AC97_DEFAULT_POWER_OFF))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) goto __access_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) /* reset to defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) if (!(ac97->scaps & AC97_SCAP_SKIP_AUDIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) snd_ac97_write(ac97, AC97_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) if (!(ac97->scaps & AC97_SCAP_SKIP_MODEM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) snd_ac97_write(ac97, AC97_EXTENDED_MID, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061) if (bus->ops->wait)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) bus->ops->wait(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) udelay(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) if (ac97->scaps & AC97_SCAP_SKIP_AUDIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) err = ac97_reset_wait(ac97, msecs_to_jiffies(500), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) err = ac97_reset_wait(ac97, msecs_to_jiffies(500), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) err = ac97_reset_wait(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071) msecs_to_jiffies(500), 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) ac97_warn(ac97, "AC'97 %d does not respond - RESET\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) ac97->num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076) /* proceed anyway - it's often non-critical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) __access_ok:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080) ac97->id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) ac97->id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) if (! (ac97->scaps & AC97_SCAP_DETECT_BY_VENDOR) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) (ac97->id == 0x00000000 || ac97->id == 0xffffffff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) ac97_err(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) "AC'97 %d access is not valid [0x%x], removing mixer.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) ac97->num, ac97->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) pid = look_for_codec_id(snd_ac97_codec_ids, ac97->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) if (pid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) ac97->flags |= pid->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) /* test for AC'97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) if (!(ac97->scaps & AC97_SCAP_SKIP_AUDIO) && !(ac97->scaps & AC97_SCAP_AUDIO)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) /* test if we can write to the record gain volume register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a06);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) if (((err = snd_ac97_read(ac97, AC97_REC_GAIN)) & 0x7fff) == 0x0a06)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) ac97->scaps |= AC97_SCAP_AUDIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) if (ac97->scaps & AC97_SCAP_AUDIO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) ac97->caps = snd_ac97_read(ac97, AC97_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) ac97->ext_id = snd_ac97_read(ac97, AC97_EXTENDED_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) if (ac97->ext_id == 0xffff) /* invalid combination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) ac97->ext_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) /* test for MC'97 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) if (!(ac97->scaps & AC97_SCAP_SKIP_MODEM) && !(ac97->scaps & AC97_SCAP_MODEM)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) ac97->ext_mid = snd_ac97_read(ac97, AC97_EXTENDED_MID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) if (ac97->ext_mid == 0xffff) /* invalid combination */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) ac97->ext_mid = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113) if (ac97->ext_mid & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) ac97->scaps |= AC97_SCAP_MODEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) if (!ac97_is_audio(ac97) && !ac97_is_modem(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) if (!(ac97->scaps & (AC97_SCAP_SKIP_AUDIO|AC97_SCAP_SKIP_MODEM)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119) ac97_err(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) "AC'97 %d access error (not audio or modem codec)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) ac97->num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) return -EACCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) if (bus->ops->reset) // FIXME: always skipping?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) goto __ready_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) /* FIXME: add powerdown control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) if (ac97_is_audio(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131) /* nothing should be in powerdown mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) if (! (ac97->flags & AC97_DEFAULT_POWER_OFF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) snd_ac97_write_cache(ac97, AC97_RESET, 0); /* reset to defaults */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) /* nothing should be in powerdown mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) snd_ac97_write_cache(ac97, AC97_GENERAL_PURPOSE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) end_time = jiffies + msecs_to_jiffies(5000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) if ((snd_ac97_read(ac97, AC97_POWERDOWN) & 0x0f) == 0x0f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) goto __ready_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) } while (time_after_eq(end_time, jiffies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) ac97_warn(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) "AC'97 %d analog subsections not ready\n", ac97->num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) /* FIXME: add powerdown control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) if (ac97_is_modem(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154) /* nothing should be in powerdown mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) /* note: it's important to set the rate at first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) tmp = AC97_MEA_GPIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) if (ac97->ext_mid & AC97_MEI_LINE1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) snd_ac97_write_cache(ac97, AC97_LINE1_RATE, 8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) tmp |= AC97_MEA_ADC1 | AC97_MEA_DAC1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) if (ac97->ext_mid & AC97_MEI_LINE2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162) snd_ac97_write_cache(ac97, AC97_LINE2_RATE, 8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) tmp |= AC97_MEA_ADC2 | AC97_MEA_DAC2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) if (ac97->ext_mid & AC97_MEI_HANDSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) snd_ac97_write_cache(ac97, AC97_HANDSET_RATE, 8000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) tmp |= AC97_MEA_HADC | AC97_MEA_HDAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) /* nothing should be in powerdown mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) end_time = jiffies + msecs_to_jiffies(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) if ((snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS) & tmp) == tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) goto __ready_ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178) } while (time_after_eq(end_time, jiffies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) ac97_warn(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) "MC'97 %d converters and GPIO not ready (0x%x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) ac97->num,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) __ready_ok:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) if (ac97_is_audio(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) ac97->addr = (ac97->ext_id & AC97_EI_ADDR_MASK) >> AC97_EI_ADDR_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) ac97->addr = (ac97->ext_mid & AC97_MEI_ADDR_MASK) >> AC97_MEI_ADDR_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190) if (ac97->ext_id & 0x01c9) { /* L/R, MIC, SDAC, LDAC VRA support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) reg = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) reg |= ac97->ext_id & 0x01c0; /* LDAC/SDAC/CDAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) if (! bus->no_vra)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) reg |= ac97->ext_id & 0x0009; /* VRA/VRM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) snd_ac97_write_cache(ac97, AC97_EXTENDED_STATUS, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197) if ((ac97->ext_id & AC97_EI_DRA) && bus->dra) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) /* Intel controllers require double rate data to be put in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) * slots 7+8, so let's hope the codec supports it. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, AC97_GP_DRSS_78);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) if ((snd_ac97_read(ac97, AC97_GENERAL_PURPOSE) & AC97_GP_DRSS_MASK) == AC97_GP_DRSS_78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) ac97->flags |= AC97_DOUBLE_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) /* restore to slots 10/11 to avoid the confliction with surrounds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) if (ac97->ext_id & AC97_EI_VRA) { /* VRA support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) snd_ac97_determine_rates(ac97, AC97_PCM_FRONT_DAC_RATE, 0, &ac97->rates[AC97_RATES_FRONT_DAC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) snd_ac97_determine_rates(ac97, AC97_PCM_LR_ADC_RATE, 0, &ac97->rates[AC97_RATES_ADC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) ac97->rates[AC97_RATES_FRONT_DAC] = SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) if (ac97->flags & AC97_DOUBLE_RATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212) ac97->rates[AC97_RATES_FRONT_DAC] |= SNDRV_PCM_RATE_96000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) ac97->rates[AC97_RATES_ADC] = SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) /* codec specific code (patch) should override these values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) if (ac97->ext_id & AC97_EI_VRM) { /* MIC VRA support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220) snd_ac97_determine_rates(ac97, AC97_PCM_MIC_ADC_RATE, 0, &ac97->rates[AC97_RATES_MIC_ADC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) ac97->rates[AC97_RATES_MIC_ADC] = SNDRV_PCM_RATE_48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) if (ac97->ext_id & AC97_EI_SDAC) { /* SDAC support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225) snd_ac97_determine_rates(ac97, AC97_PCM_SURR_DAC_RATE, AC97_PCM_FRONT_DAC_RATE, &ac97->rates[AC97_RATES_SURR_DAC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) ac97->scaps |= AC97_SCAP_SURROUND_DAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) if (ac97->ext_id & AC97_EI_LDAC) { /* LDAC support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) snd_ac97_determine_rates(ac97, AC97_PCM_LFE_DAC_RATE, AC97_PCM_FRONT_DAC_RATE, &ac97->rates[AC97_RATES_LFE_DAC]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) ac97->scaps |= AC97_SCAP_CENTER_LFE_DAC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) /* additional initializations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) if (bus->ops->init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234) bus->ops->init(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) snd_ac97_get_name(ac97, ac97->id, name, !ac97_is_audio(ac97));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) snd_ac97_get_name(NULL, ac97->id, name, !ac97_is_audio(ac97)); // ac97->id might be changed in the special setup code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) if (! ac97->build_ops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) ac97->build_ops = &null_build_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) if (ac97_is_audio(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) char comp[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) if (card->mixername[0] == '\0') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) strcpy(card->mixername, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) if (strlen(card->mixername) + 1 + strlen(name) + 1 <= sizeof(card->mixername)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246) strcat(card->mixername, ",");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) strcat(card->mixername, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) sprintf(comp, "AC97a:%08x", ac97->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251) if ((err = snd_component_add(card, comp)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) if (snd_ac97_mixer_build(ac97) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) if (ac97_is_modem(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) char comp[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262) if (card->mixername[0] == '\0') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) strcpy(card->mixername, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) if (strlen(card->mixername) + 1 + strlen(name) + 1 <= sizeof(card->mixername)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) strcat(card->mixername, ",");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) strcat(card->mixername, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270) sprintf(comp, "AC97m:%08x", ac97->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) if ((err = snd_component_add(card, comp)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) if (snd_ac97_modem_build(card, ac97) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) if (ac97_is_audio(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281) update_power_regs(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) snd_ac97_proc_init(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) if ((err = snd_device_new(card, SNDRV_DEV_CODEC, ac97, &ops)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) snd_ac97_free(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) *rac97 = ac97;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) EXPORT_SYMBOL(snd_ac97_mixer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) * Power down the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) * MASTER and HEADPHONE registers are muted but the register cache values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) * are not changed, so that the values can be restored in snd_ac97_resume().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) static void snd_ac97_powerdown(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) unsigned short power;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) if (ac97_is_audio(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) /* some codecs have stereo mute bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) snd_ac97_write(ac97, AC97_MASTER, 0x9f9f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) snd_ac97_write(ac97, AC97_HEADPHONE, 0x9f9f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /* surround, CLFE, mic powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) power = ac97->regs[AC97_EXTENDED_STATUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) power |= AC97_EA_PRJ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) power |= AC97_EA_PRI | AC97_EA_PRK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) power |= AC97_EA_PRL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316) snd_ac97_write(ac97, AC97_EXTENDED_STATUS, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) /* powerdown external amplifier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) if (ac97->scaps & AC97_SCAP_INV_EAPD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) power = ac97->regs[AC97_POWERDOWN] & ~AC97_PD_EAPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321) else if (! (ac97->scaps & AC97_SCAP_EAPD_LED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) power = ac97->regs[AC97_POWERDOWN] | AC97_PD_EAPD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323) power |= AC97_PD_PR6; /* Headphone amplifier powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) power |= AC97_PD_PR0 | AC97_PD_PR1; /* ADC & DAC powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325) snd_ac97_write(ac97, AC97_POWERDOWN, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) power |= AC97_PD_PR2; /* Analog Mixer powerdown (Vref on) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) snd_ac97_write(ac97, AC97_POWERDOWN, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) if (ac97_is_power_save_mode(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) power |= AC97_PD_PR3; /* Analog Mixer powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) snd_ac97_write(ac97, AC97_POWERDOWN, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) /* AC-link powerdown, internal Clk disable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334) /* FIXME: this may cause click noises on some boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) power |= AC97_PD_PR4 | AC97_PD_PR5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) snd_ac97_write(ac97, AC97_POWERDOWN, power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341) struct ac97_power_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) unsigned short reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) unsigned short power_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) unsigned short mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) enum { PWIDX_ADC, PWIDX_FRONT, PWIDX_CLFE, PWIDX_SURR, PWIDX_MIC, PWIDX_SIZE };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) static const struct ac97_power_reg power_regs[PWIDX_SIZE] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) [PWIDX_ADC] = { AC97_PCM_LR_ADC_RATE, AC97_POWERDOWN, AC97_PD_PR0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) [PWIDX_FRONT] = { AC97_PCM_FRONT_DAC_RATE, AC97_POWERDOWN, AC97_PD_PR1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) [PWIDX_CLFE] = { AC97_PCM_LFE_DAC_RATE, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) AC97_EA_PRI | AC97_EA_PRK},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354) [PWIDX_SURR] = { AC97_PCM_SURR_DAC_RATE, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) AC97_EA_PRJ},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) [PWIDX_MIC] = { AC97_PCM_MIC_ADC_RATE, AC97_EXTENDED_STATUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) AC97_EA_PRL},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) * snd_ac97_update_power - update the powerdown register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) * @ac97: the codec instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) * @reg: the rate register, e.g. AC97_PCM_FRONT_DAC_RATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) * @powerup: non-zero when power up the part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) * Update the AC97 powerdown register bits of the given part.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) * Return: Zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) int snd_ac97_update_power(struct snd_ac97 *ac97, int reg, int powerup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) if (! ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) if (reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) /* SPDIF requires DAC power, too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) if (reg == AC97_SPDIF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) reg = AC97_PCM_FRONT_DAC_RATE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382) for (i = 0; i < PWIDX_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) if (power_regs[i].reg == reg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) if (powerup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) ac97->power_up |= (1 << i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) ac97->power_up &= ~(1 << i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) if (ac97_is_power_save_mode(ac97) && !powerup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) /* adjust power-down bits after two seconds delay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) * (for avoiding loud click noises for many (OSS) apps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) * that open/close frequently)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398) schedule_delayed_work(&ac97->power_work,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) msecs_to_jiffies(power_save * 1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) cancel_delayed_work(&ac97->power_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) update_power_regs(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) EXPORT_SYMBOL(snd_ac97_update_power);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) #endif /* CONFIG_SND_AC97_POWER_SAVE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) static void update_power_regs(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) unsigned int power_up, bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) power_up = (1 << PWIDX_FRONT) | (1 << PWIDX_ADC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417) power_up |= (1 << PWIDX_MIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419) power_up |= (1 << PWIDX_SURR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421) power_up |= (1 << PWIDX_CLFE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) if (ac97_is_power_save_mode(ac97))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) power_up = ac97->power_up;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) if (power_up) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) if (ac97->regs[AC97_POWERDOWN] & AC97_PD_PR2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) /* needs power-up analog mix and vref */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) snd_ac97_update_bits(ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) AC97_PD_PR3, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432) snd_ac97_update_bits(ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) AC97_PD_PR2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) for (i = 0; i < PWIDX_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) if (power_up & (1 << i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440) bits = power_regs[i].mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) snd_ac97_update_bits(ac97, power_regs[i].power_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) power_regs[i].mask, bits);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) if (! power_up) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) if (! (ac97->regs[AC97_POWERDOWN] & AC97_PD_PR2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446) /* power down analog mix and vref */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) snd_ac97_update_bits(ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) AC97_PD_PR2, AC97_PD_PR2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449) snd_ac97_update_bits(ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) AC97_PD_PR3, AC97_PD_PR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) * snd_ac97_suspend - General suspend function for AC97 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) * Suspends the codec, power down the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) void snd_ac97_suspend(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) if (! ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) if (ac97->build_ops->suspend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) ac97->build_ops->suspend(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) #ifdef CONFIG_SND_AC97_POWER_SAVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) cancel_delayed_work_sync(&ac97->power_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) snd_ac97_powerdown(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) EXPORT_SYMBOL(snd_ac97_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) * restore ac97 status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) static void snd_ac97_restore_status(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) for (i = 2; i < 0x7c ; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) if (i == AC97_POWERDOWN || i == AC97_EXTENDED_ID)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) /* restore only accessible registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) * some chip (e.g. nm256) may hang up when unsupported registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) * are accessed..!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) if (test_bit(i, ac97->reg_accessed)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) snd_ac97_write(ac97, i, ac97->regs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) snd_ac97_read(ac97, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) * restore IEC958 status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) static void snd_ac97_restore_iec958(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) if (ac97->ext_id & AC97_EI_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504) if (ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_SPDIF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) /* reset spdif status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) snd_ac97_write(ac97, AC97_EXTENDED_STATUS, ac97->regs[AC97_EXTENDED_STATUS]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) if (ac97->flags & AC97_CS_SPDIF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) snd_ac97_write(ac97, AC97_CSR_SPDIF, ac97->regs[AC97_CSR_SPDIF]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) snd_ac97_write(ac97, AC97_SPDIF, ac97->regs[AC97_SPDIF]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512) snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) * snd_ac97_resume - General resume function for AC97 codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) * Do the standard resume procedure, power up and restoring the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522) * old register values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) void snd_ac97_resume(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526) unsigned long end_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528) if (! ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) if (ac97->bus->ops->reset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) ac97->bus->ops->reset(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) goto __reset_ready;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) snd_ac97_write(ac97, AC97_POWERDOWN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537) if (! (ac97->flags & AC97_DEFAULT_POWER_OFF)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) if (!(ac97->scaps & AC97_SCAP_SKIP_AUDIO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539) snd_ac97_write(ac97, AC97_RESET, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) else if (!(ac97->scaps & AC97_SCAP_SKIP_MODEM))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) snd_ac97_write(ac97, AC97_EXTENDED_MID, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) snd_ac97_write(ac97, AC97_POWERDOWN, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) snd_ac97_write(ac97, AC97_GENERAL_PURPOSE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) snd_ac97_write(ac97, AC97_POWERDOWN, ac97->regs[AC97_POWERDOWN]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) if (ac97_is_audio(ac97)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) ac97->bus->ops->write(ac97, AC97_MASTER, 0x8101);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) end_time = jiffies + msecs_to_jiffies(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) if (snd_ac97_read(ac97, AC97_MASTER) == 0x8101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) } while (time_after_eq(end_time, jiffies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556) /* FIXME: extra delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) ac97->bus->ops->write(ac97, AC97_MASTER, AC97_MUTE_MASK_MONO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) if (snd_ac97_read(ac97, AC97_MASTER) != AC97_MUTE_MASK_MONO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) msleep(250);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) end_time = jiffies + msecs_to_jiffies(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) unsigned short val = snd_ac97_read(ac97, AC97_EXTENDED_MID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564) if (val != 0xffff && (val & 1) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) schedule_timeout_uninterruptible(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567) } while (time_after_eq(end_time, jiffies));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) __reset_ready:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) if (ac97->bus->ops->init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) ac97->bus->ops->init(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) if (ac97->build_ops->resume)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) ac97->build_ops->resume(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) snd_ac97_restore_status(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578) snd_ac97_restore_iec958(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582) EXPORT_SYMBOL(snd_ac97_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) * Hardware tuning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) static void set_ctl_name(char *dst, const char *src, const char *suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591) if (suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) sprintf(dst, "%s %s", src, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) strcpy(dst, src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) /* remove the control with the given name and optional suffix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) static int snd_ac97_remove_ctl(struct snd_ac97 *ac97, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) const char *suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) struct snd_ctl_elem_id id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602) memset(&id, 0, sizeof(id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) set_ctl_name(id.name, name, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) return snd_ctl_remove_id(ac97->bus->card, &id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608) static struct snd_kcontrol *ctl_find(struct snd_ac97 *ac97, const char *name, const char *suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) struct snd_ctl_elem_id sid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) memset(&sid, 0, sizeof(sid));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) set_ctl_name(sid.name, name, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) return snd_ctl_find_id(ac97->bus->card, &sid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) /* rename the control with the given name and optional suffix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618) static int snd_ac97_rename_ctl(struct snd_ac97 *ac97, const char *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) const char *dst, const char *suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621) struct snd_kcontrol *kctl = ctl_find(ac97, src, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) if (kctl) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) set_ctl_name(kctl->id.name, dst, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) /* rename both Volume and Switch controls - don't check the return value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) static void snd_ac97_rename_vol_ctl(struct snd_ac97 *ac97, const char *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) const char *dst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) snd_ac97_rename_ctl(ac97, src, dst, "Switch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634) snd_ac97_rename_ctl(ac97, src, dst, "Volume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) /* swap controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) static int snd_ac97_swap_ctl(struct snd_ac97 *ac97, const char *s1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639) const char *s2, const char *suffix)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641) struct snd_kcontrol *kctl1, *kctl2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642) kctl1 = ctl_find(ac97, s1, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) kctl2 = ctl_find(ac97, s2, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644) if (kctl1 && kctl2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) set_ctl_name(kctl1->id.name, s2, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) set_ctl_name(kctl2->id.name, s1, suffix);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) /* bind hp and master controls instead of using only hp control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) static int bind_hp_volsw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) int err = snd_ac97_put_volsw(kcontrol, ucontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) if (err > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) unsigned long priv_saved = kcontrol->private_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) kcontrol->private_value = (kcontrol->private_value & ~0xff) | AC97_HEADPHONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) snd_ac97_put_volsw(kcontrol, ucontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) kcontrol->private_value = priv_saved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) /* ac97 tune: bind Master and Headphone controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) static int tune_hp_only(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) struct snd_kcontrol *msw = ctl_find(ac97, "Master Playback Switch", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) struct snd_kcontrol *mvol = ctl_find(ac97, "Master Playback Volume", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) if (! msw || ! mvol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) msw->put = bind_hp_volsw_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) mvol->put = bind_hp_volsw_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) snd_ac97_remove_ctl(ac97, "Headphone Playback", "Switch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676) snd_ac97_remove_ctl(ac97, "Headphone Playback", "Volume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) /* ac97 tune: use Headphone control as master */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) static int tune_hp_only(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) if (ctl_find(ac97, "Headphone Playback Switch", NULL) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) snd_ac97_remove_ctl(ac97, "Master Playback", "Switch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) snd_ac97_remove_ctl(ac97, "Master Playback", "Volume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693) /* ac97 tune: swap Headphone and Master controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) static int tune_swap_hp(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) if (ctl_find(ac97, "Headphone Playback Switch", NULL) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) snd_ac97_rename_vol_ctl(ac97, "Master Playback", "Line-Out Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) /* ac97 tune: swap Surround and Master controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704) static int tune_swap_surround(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) if (snd_ac97_swap_ctl(ac97, "Master Playback", "Surround Playback", "Switch") ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) snd_ac97_swap_ctl(ac97, "Master Playback", "Surround Playback", "Volume"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) /* ac97 tune: set up mic sharing for AD codecs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) static int tune_ad_sharing(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) unsigned short scfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) if ((ac97->id & 0xffffff00) != 0x41445300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) ac97_err(ac97, "ac97_quirk AD_SHARING is only for AD codecs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) /* Turn on OMS bit to route microphone to back panel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721) scfg = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, scfg | 0x0200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) static const struct snd_kcontrol_new snd_ac97_alc_jack_detect =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) AC97_SINGLE("Jack Detect", AC97_ALC650_CLOCK, 5, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) /* ac97 tune: set up ALC jack-select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) static int tune_alc_jack(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) if ((ac97->id & 0xffffff00) != 0x414c4700) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) ac97_err(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) "ac97_quirk ALC_JACK is only for Realtek codecs\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) snd_ac97_update_bits(ac97, 0x7a, 0x20, 0x20); /* select jack detect function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) snd_ac97_update_bits(ac97, 0x7a, 0x01, 0x01); /* Line-out auto mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) if (ac97->id == AC97_ID_ALC658D)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) snd_ac97_update_bits(ac97, 0x74, 0x0800, 0x0800);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) return snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&snd_ac97_alc_jack_detect, ac97));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) /* ac97 tune: inversed EAPD bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) static int tune_inv_eapd(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) struct snd_kcontrol *kctl = ctl_find(ac97, "External Amplifier", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) if (! kctl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) set_inv_eapd(ac97, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) static int master_mute_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) int err = snd_ac97_put_volsw(kcontrol, ucontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) if (err > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) unsigned short mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) if (shift != rshift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) mask = AC97_MUTE_MASK_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) mask = AC97_MUTE_MASK_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) snd_ac97_update_bits(ac97, AC97_POWERDOWN, AC97_PD_EAPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) (ac97->regs[AC97_MASTER] & mask) == mask ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) AC97_PD_EAPD : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) /* ac97 tune: EAPD controls mute LED bound with the master mute */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) static int tune_mute_led(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776) struct snd_kcontrol *msw = ctl_find(ac97, "Master Playback Switch", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) if (! msw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) msw->put = master_mute_sw_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) snd_ac97_remove_ctl(ac97, "External Amplifier", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) snd_ac97_update_bits(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) AC97_PD_EAPD, AC97_PD_EAPD /* mute LED on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) ac97->scaps |= AC97_SCAP_EAPD_LED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) static int hp_master_mute_sw_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) int err = bind_hp_volsw_put(kcontrol, ucontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793) if (err > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) struct snd_ac97 *ac97 = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795) int shift = (kcontrol->private_value >> 8) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) int rshift = (kcontrol->private_value >> 12) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) unsigned short mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798) if (shift != rshift)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) mask = AC97_MUTE_MASK_STEREO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) mask = AC97_MUTE_MASK_MONO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) snd_ac97_update_bits(ac97, AC97_POWERDOWN, AC97_PD_EAPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) (ac97->regs[AC97_MASTER] & mask) == mask ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) AC97_PD_EAPD : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809) static int tune_hp_mute_led(struct snd_ac97 *ac97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) struct snd_kcontrol *msw = ctl_find(ac97, "Master Playback Switch", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) struct snd_kcontrol *mvol = ctl_find(ac97, "Master Playback Volume", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813) if (! msw || ! mvol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) msw->put = hp_master_mute_sw_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) mvol->put = bind_hp_volsw_put;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) snd_ac97_remove_ctl(ac97, "External Amplifier", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) snd_ac97_remove_ctl(ac97, "Headphone Playback", "Switch");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) snd_ac97_remove_ctl(ac97, "Headphone Playback", "Volume");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) snd_ac97_update_bits(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) ac97, AC97_POWERDOWN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) AC97_PD_EAPD, AC97_PD_EAPD /* mute LED on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) struct quirk_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) int (*func)(struct snd_ac97 *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832) static const struct quirk_table applicable_quirks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) { "none", NULL },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) { "hp_only", tune_hp_only },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) { "swap_hp", tune_swap_hp },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836) { "swap_surround", tune_swap_surround },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) { "ad_sharing", tune_ad_sharing },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) { "alc_jack", tune_alc_jack },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) { "inv_eapd", tune_inv_eapd },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) { "mute_led", tune_mute_led },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) { "hp_mute_led", tune_hp_mute_led },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) /* apply the quirk with the given type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) static int apply_quirk(struct snd_ac97 *ac97, int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) if (type <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) else if (type >= ARRAY_SIZE(applicable_quirks))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) if (applicable_quirks[type].func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) return applicable_quirks[type].func(ac97);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) /* apply the quirk with the given name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) static int apply_quirk_str(struct snd_ac97 *ac97, const char *typestr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) const struct quirk_table *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) for (i = 0; i < ARRAY_SIZE(applicable_quirks); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) q = &applicable_quirks[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) if (q->name && ! strcmp(typestr, q->name))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) return apply_quirk(ac97, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) /* for compatibility, accept the numbers, too */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) if (*typestr >= '0' && *typestr <= '9')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) return apply_quirk(ac97, (int)simple_strtoul(typestr, NULL, 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) * snd_ac97_tune_hardware - tune up the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) * @ac97: the ac97 instance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) * @quirk: quirk list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) * @override: explicit quirk value (overrides the list if non-NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) * Do some workaround for each pci device, such as renaming of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) * headphone (true line-out) control as "Master".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) * The quirk-list must be terminated with a zero-filled entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) * Return: Zero if successful, or a negative error code on failure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) int snd_ac97_tune_hardware(struct snd_ac97 *ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) const struct ac97_quirk *quirk, const char *override)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) int result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) /* quirk overriden? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) if (override && strcmp(override, "-1") && strcmp(override, "default")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893) result = apply_quirk_str(ac97, override);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) ac97_err(ac97, "applying quirk type %s failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) override, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) if (! quirk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) for (; quirk->subvendor; quirk++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) if (quirk->subvendor != ac97->subsystem_vendor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) if ((! quirk->mask && quirk->subdevice == ac97->subsystem_device) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) quirk->subdevice == (quirk->mask & ac97->subsystem_device)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) if (quirk->codec_id && quirk->codec_id != ac97->id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) ac97_dbg(ac97, "ac97 quirk for %s (%04x:%04x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) quirk->name, ac97->subsystem_vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) ac97->subsystem_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) result = apply_quirk(ac97, quirk->type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) if (result < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) ac97_err(ac97,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) "applying quirk type %d for %s failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) quirk->type, quirk->name, result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) EXPORT_SYMBOL(snd_ac97_tune_hardware);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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