Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  Routines for Gravis UltraSound soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <sound/gus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) MODULE_DESCRIPTION("Routines for Gravis UltraSound soundcards");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) static int snd_gus_init_dma_irq(struct snd_gus_card * gus, int latches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) int snd_gus_use_inc(struct snd_gus_card * gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	if (!try_module_get(gus->card->module))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) void snd_gus_use_dec(struct snd_gus_card * gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	module_put(gus->card->module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) static int snd_gus_joystick_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	uinfo->value.integer.max = 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) static int snd_gus_joystick_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	struct snd_gus_card *gus = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	ucontrol->value.integer.value[0] = gus->joystick_dac & 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static int snd_gus_joystick_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	struct snd_gus_card *gus = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	int change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	unsigned char nval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	nval = ucontrol->value.integer.value[0] & 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	change = gus->joystick_dac != nval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	gus->joystick_dac = nval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	snd_gf1_write8(gus, SNDRV_GF1_GB_JOYSTICK_DAC_LEVEL, gus->joystick_dac);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	return change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static const struct snd_kcontrol_new snd_gus_joystick_control = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.iface = SNDRV_CTL_ELEM_IFACE_CARD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	.name = "Joystick Speed",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.info = snd_gus_joystick_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.get = snd_gus_joystick_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	.put = snd_gus_joystick_put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static void snd_gus_init_control(struct snd_gus_card *gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	if (!gus->ace_flag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		snd_ctl_add(gus->card, snd_ctl_new1(&snd_gus_joystick_control, gus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) static int snd_gus_free(struct snd_gus_card *gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	if (gus->gf1.res_port2 == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 		goto __hw_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	snd_gf1_stop(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	snd_gus_init_dma_irq(gus, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)       __hw_end:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	release_and_free_resource(gus->gf1.res_port1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	release_and_free_resource(gus->gf1.res_port2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	if (gus->gf1.irq >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		free_irq(gus->gf1.irq, (void *) gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	if (gus->gf1.dma1 >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		disable_dma(gus->gf1.dma1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		free_dma(gus->gf1.dma1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (!gus->equal_dma && gus->gf1.dma2 >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		disable_dma(gus->gf1.dma2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		free_dma(gus->gf1.dma2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	kfree(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static int snd_gus_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	struct snd_gus_card *gus = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	return snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int snd_gus_create(struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 		   unsigned long port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		   int irq, int dma1, int dma2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 		   int timer_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		   int voices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		   int pcm_channels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		   int effect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		   struct snd_gus_card **rgus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct snd_gus_card *gus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	static const struct snd_device_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		.dev_free =	snd_gus_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	*rgus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	gus = kzalloc(sizeof(*gus), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	if (gus == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	spin_lock_init(&gus->reg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	spin_lock_init(&gus->voice_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	spin_lock_init(&gus->active_voice_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	spin_lock_init(&gus->event_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	spin_lock_init(&gus->dma_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	spin_lock_init(&gus->pcm_volume_level_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	spin_lock_init(&gus->uart_cmd_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	mutex_init(&gus->dma_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	gus->gf1.irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	gus->gf1.dma1 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	gus->gf1.dma2 = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	gus->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	gus->gf1.port = port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	/* fill register variables for speedup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	gus->gf1.reg_page = GUSP(gus, GF1PAGE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	gus->gf1.reg_regsel = GUSP(gus, GF1REGSEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	gus->gf1.reg_data8 = GUSP(gus, GF1DATAHIGH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	gus->gf1.reg_data16 = GUSP(gus, GF1DATALOW);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	gus->gf1.reg_irqstat = GUSP(gus, IRQSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	gus->gf1.reg_dram = GUSP(gus, DRAM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	gus->gf1.reg_timerctrl = GUSP(gus, TIMERCNTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	gus->gf1.reg_timerdata = GUSP(gus, TIMERDATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	/* allocate resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	if ((gus->gf1.res_port1 = request_region(port, 16, "GUS GF1 (Adlib/SB)")) == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		snd_printk(KERN_ERR "gus: can't grab SB port 0x%lx\n", port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 		snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if ((gus->gf1.res_port2 = request_region(port + 0x100, 12, "GUS GF1 (Synth)")) == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		snd_printk(KERN_ERR "gus: can't grab synth port 0x%lx\n", port + 0x100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	if (irq >= 0 && request_irq(irq, snd_gus_interrupt, 0, "GUS GF1", (void *) gus)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		snd_printk(KERN_ERR "gus: can't grab irq %d\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	gus->gf1.irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	card->sync_irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	if (request_dma(dma1, "GUS - 1")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		snd_printk(KERN_ERR "gus: can't grab DMA1 %d\n", dma1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	gus->gf1.dma1 = dma1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	if (dma2 >= 0 && dma1 != dma2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		if (request_dma(dma2, "GUS - 2")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 			snd_printk(KERN_ERR "gus: can't grab DMA2 %d\n", dma2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 			snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 			return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		gus->gf1.dma2 = dma2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		gus->gf1.dma2 = gus->gf1.dma1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		gus->equal_dma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	gus->timer_dev = timer_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (voices < 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		voices = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	if (voices > 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		voices = 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	if (pcm_channels < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		pcm_channels = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (pcm_channels > 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		pcm_channels = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	pcm_channels++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	pcm_channels &= ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	gus->gf1.effect = effect ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	gus->gf1.active_voices = voices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	gus->gf1.pcm_channels = pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	gus->gf1.volume_ramp = 25;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	gus->gf1.smooth_pan = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, gus, &ops)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		snd_gus_free(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	*rgus = gus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)  *  Memory detection routine for plain GF1 soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static int snd_gus_detect_memory(struct snd_gus_card * gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	int l, idx, local;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	unsigned char d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	snd_gf1_poke(gus, 0L, 0xaa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	snd_gf1_poke(gus, 1L, 0x55);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (snd_gf1_peek(gus, 0L) != 0xaa || snd_gf1_peek(gus, 1L) != 0x55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		snd_printk(KERN_ERR "plain GF1 card at 0x%lx without onboard DRAM?\n", gus->gf1.port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	for (idx = 1, d = 0xab; idx < 4; idx++, d++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		local = idx << 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		snd_gf1_poke(gus, local, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		snd_gf1_poke(gus, local + 1, d + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 		if (snd_gf1_peek(gus, local) != d ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		    snd_gf1_peek(gus, local + 1) != d + 1 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		    snd_gf1_peek(gus, 0L) != 0xaa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	gus->gf1.memory = idx << 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	gus->gf1.memory = 256 * 1024;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	for (l = 0, local = gus->gf1.memory; l < 4; l++, local -= 256 * 1024) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 		gus->gf1.mem_alloc.banks_8[l].address =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 		    gus->gf1.mem_alloc.banks_8[l].size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 		gus->gf1.mem_alloc.banks_16[l].address = l << 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		gus->gf1.mem_alloc.banks_16[l].size = local > 0 ? 256 * 1024 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	gus->gf1.mem_alloc.banks_8[0].size = gus->gf1.memory;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	return 0;		/* some memory were detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static int snd_gus_init_dma_irq(struct snd_gus_card * gus, int latches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	int irq, dma1, dma2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	static const unsigned char irqs[16] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		{0, 0, 1, 3, 0, 2, 0, 4, 0, 1, 0, 5, 6, 0, 0, 7};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	static const unsigned char dmas[8] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		{6, 1, 0, 2, 0, 3, 4, 5};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	if (snd_BUG_ON(!gus))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	card = gus->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (snd_BUG_ON(!card))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	gus->mix_cntrl_reg &= 0xf8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	gus->mix_cntrl_reg |= 0x01;	/* disable MIC, LINE IN, enable LINE OUT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	if (gus->codec_flag || gus->ess_flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		gus->mix_cntrl_reg &= ~1;	/* enable LINE IN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		gus->mix_cntrl_reg |= 4;	/* enable MIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	dma1 = gus->gf1.dma1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	dma1 = abs(dma1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	dma1 = dmas[dma1 & 7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	dma2 = gus->gf1.dma2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	dma2 = abs(dma2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	dma2 = dmas[dma2 & 7];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	dma1 |= gus->equal_dma ? 0x40 : (dma2 << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	if ((dma1 & 7) == 0 || (dma2 & 7) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		snd_printk(KERN_ERR "Error! DMA isn't defined.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	irq = gus->gf1.irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	irq = abs(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	irq = irqs[irq & 0x0f];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	if (irq == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		snd_printk(KERN_ERR "Error! IRQ isn't defined.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	irq |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	card->mixer.mix_ctrl_reg |= 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	outb(5, GUSP(gus, REGCNTRLS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	outb(gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	outb(0x00, GUSP(gus, IRQDMACNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	outb(0, GUSP(gus, REGCNTRLS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	outb(0x00 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	outb(dma1, GUSP(gus, IRQDMACNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	if (latches) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		outb(0x40 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		outb(irq, GUSP(gus, IRQDMACNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	udelay(100);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	outb(0x00 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	outb(dma1, GUSP(gus, IRQDMACNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	if (latches) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		outb(0x40 | gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		outb(irq, GUSP(gus, IRQDMACNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	snd_gf1_delay(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	if (latches)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		gus->mix_cntrl_reg |= 0x08;	/* enable latches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		gus->mix_cntrl_reg &= ~0x08;	/* disable latches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	outb(gus->mix_cntrl_reg, GUSP(gus, MIXCNTRLREG));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	outb(0, GUSP(gus, GF1PAGE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int snd_gus_check_version(struct snd_gus_card * gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	unsigned char val, rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	card = gus->card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	spin_lock_irqsave(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	outb(0x20, GUSP(gus, REGCNTRLS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	val = inb(GUSP(gus, REGCNTRLS));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	rev = inb(GUSP(gus, BOARDVERSION));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	spin_unlock_irqrestore(&gus->reg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	snd_printdd("GF1 [0x%lx] init - val = 0x%x, rev = 0x%x\n", gus->gf1.port, val, rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	strcpy(card->driver, "GUS");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	strcpy(card->longname, "Gravis UltraSound Classic (2.4)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	if ((val != 255 && (val & 0x06)) || (rev >= 5 && rev != 255)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 		if (rev >= 5 && rev <= 9) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 			gus->ics_flag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 			if (rev == 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 				gus->ics_flipped = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 			card->longname[27] = '3';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 			card->longname[29] = rev == 5 ? '5' : '7';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 		if (rev >= 10 && rev != 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 			if (rev >= 10 && rev <= 11) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 				strcpy(card->driver, "GUS MAX");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 				strcpy(card->longname, "Gravis UltraSound MAX");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 				gus->max_flag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 			} else if (rev == 0x30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 				strcpy(card->driver, "GUS ACE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 				strcpy(card->longname, "Gravis UltraSound Ace");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 				gus->ace_flag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 			} else if (rev == 0x50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 				strcpy(card->driver, "GUS Extreme");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 				strcpy(card->longname, "Gravis UltraSound Extreme");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 				gus->ess_flag = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 			} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 				snd_printk(KERN_ERR "unknown GF1 revision number at 0x%lx - 0x%x (0x%x)\n", gus->gf1.port, rev, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 				snd_printk(KERN_ERR "  please - report to <perex@perex.cz>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	strcpy(card->shortname, card->longname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	gus->uart_enable = 1;	/* standard GUSes doesn't have midi uart trouble */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 	snd_gus_init_control(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) int snd_gus_initialize(struct snd_gus_card *gus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	if (!gus->interwave) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 		if ((err = snd_gus_check_version(gus)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 			snd_printk(KERN_ERR "version check failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 		if ((err = snd_gus_detect_memory(gus)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	if ((err = snd_gus_init_dma_irq(gus, 1)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	snd_gf1_start(gus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	gus->initialized = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)   /* gus_io.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) EXPORT_SYMBOL(snd_gf1_delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) EXPORT_SYMBOL(snd_gf1_write8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) EXPORT_SYMBOL(snd_gf1_look8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) EXPORT_SYMBOL(snd_gf1_write16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) EXPORT_SYMBOL(snd_gf1_look16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) EXPORT_SYMBOL(snd_gf1_i_write8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) EXPORT_SYMBOL(snd_gf1_i_look8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) EXPORT_SYMBOL(snd_gf1_i_look16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) EXPORT_SYMBOL(snd_gf1_dram_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) EXPORT_SYMBOL(snd_gf1_write_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) EXPORT_SYMBOL(snd_gf1_poke);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) EXPORT_SYMBOL(snd_gf1_peek);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)   /* gus_reset.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) EXPORT_SYMBOL(snd_gf1_alloc_voice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) EXPORT_SYMBOL(snd_gf1_free_voice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) EXPORT_SYMBOL(snd_gf1_ctrl_stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) EXPORT_SYMBOL(snd_gf1_stop_voice);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)   /* gus_mixer.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) EXPORT_SYMBOL(snd_gf1_new_mixer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)   /* gus_pcm.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) EXPORT_SYMBOL(snd_gf1_pcm_new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)   /* gus.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) EXPORT_SYMBOL(snd_gus_use_inc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) EXPORT_SYMBOL(snd_gus_use_dec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) EXPORT_SYMBOL(snd_gus_create);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) EXPORT_SYMBOL(snd_gus_initialize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)   /* gus_irq.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) EXPORT_SYMBOL(snd_gus_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)   /* gus_uart.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) EXPORT_SYMBOL(snd_gf1_rawmidi_new);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)   /* gus_dram.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) EXPORT_SYMBOL(snd_gus_dram_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) EXPORT_SYMBOL(snd_gus_dram_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)   /* gus_volume.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) EXPORT_SYMBOL(snd_gf1_lvol_to_gvol_raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) EXPORT_SYMBOL(snd_gf1_translate_freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)   /* gus_mem.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) EXPORT_SYMBOL(snd_gf1_mem_alloc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) EXPORT_SYMBOL(snd_gf1_mem_xfree);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) EXPORT_SYMBOL(snd_gf1_mem_free);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) EXPORT_SYMBOL(snd_gf1_mem_lock);