^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Routines for control of the AK4114 via I2C and 4-wire serial interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * IEC958 (S/PDIF) receiver by Asahi Kasei
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <sound/ak4114.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/asoundef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AK4114_ADDR 0x00 /* fixed address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void ak4114_stats(struct work_struct *work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static void ak4114_init_regs(struct ak4114 *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ak4114->write(ak4114->private_data, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) if (reg <= AK4114_REG_INT1_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ak4114->regmap[reg] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return ak4114->read(ak4114->private_data, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static void reg_dump(struct ak4114 *ak4114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) printk(KERN_DEBUG "AK4114 REG DUMP:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) for (i = 0; i < 0x20; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static void snd_ak4114_free(struct ak4114 *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) atomic_inc(&chip->wq_processing); /* don't schedule new work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) cancel_delayed_work_sync(&chip->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) kfree(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static int snd_ak4114_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct ak4114 *chip = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) snd_ak4114_free(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int snd_ak4114_create(struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ak4114_read_t *read, ak4114_write_t *write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) const unsigned char pgm[6], const unsigned char txcsb[5],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void *private_data, struct ak4114 **r_ak4114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct ak4114 *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned char reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct snd_device_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .dev_free = snd_ak4114_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) chip = kzalloc(sizeof(*chip), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (chip == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) spin_lock_init(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) chip->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) chip->read = read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) chip->write = write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) chip->private_data = private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) INIT_DELAYED_WORK(&chip->work, ak4114_stats);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) atomic_set(&chip->wq_processing, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) mutex_init(&chip->reinit_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) for (reg = 0; reg < 6; reg++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) chip->regmap[reg] = pgm[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) for (reg = 0; reg < 5; reg++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) chip->txcsb[reg] = txcsb[reg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ak4114_init_regs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) goto __fail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (r_ak4114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *r_ak4114 = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) __fail:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) snd_ak4114_free(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) EXPORT_SYMBOL(snd_ak4114_create);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (reg <= AK4114_REG_INT1_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) reg_write(chip, reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) EXPORT_SYMBOL(snd_ak4114_reg_write);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void ak4114_init_regs(struct ak4114 *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* bring the chip to reset state and powerdown state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* release reset, but leave powerdown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) udelay(200);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) for (reg = 1; reg < 6; reg++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) reg_write(chip, reg, chip->regmap[reg]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) for (reg = 0; reg < 5; reg++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* release powerdown, everything is initialized now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) void snd_ak4114_reinit(struct ak4114 *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (atomic_inc_return(&chip->wq_processing) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) cancel_delayed_work_sync(&chip->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) mutex_lock(&chip->reinit_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) ak4114_init_regs(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) mutex_unlock(&chip->reinit_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* bring up statistics / event queing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (atomic_dec_and_test(&chip->wq_processing))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) schedule_delayed_work(&chip->work, HZ / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) EXPORT_SYMBOL(snd_ak4114_reinit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static unsigned int external_rate(unsigned char rcs1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) case AK4114_FS_32000HZ: return 32000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) case AK4114_FS_44100HZ: return 44100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) case AK4114_FS_48000HZ: return 48000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) case AK4114_FS_88200HZ: return 88200;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) case AK4114_FS_96000HZ: return 96000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) case AK4114_FS_176400HZ: return 176400;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) case AK4114_FS_192000HZ: return 192000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) default: return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) uinfo->value.integer.max = LONG_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) spin_lock_irq(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ucontrol->value.integer.value[0] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) chip->errors[kcontrol->private_value];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) chip->errors[kcontrol->private_value] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) spin_unlock_irq(&chip->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) unsigned char reg = kcontrol->private_value & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) unsigned char inv = (kcontrol->private_value >> 31) & 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) uinfo->value.integer.max = 192000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ucontrol->value.iec958.status[i] = chip->txcsb[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) uinfo->count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) uinfo->value.integer.min = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) uinfo->value.integer.max = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) uinfo->count = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) unsigned short tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ucontrol->value.integer.value[0] = 0xf8f2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ucontrol->value.integer.value[1] = 0x4e1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ucontrol->value.integer.value[2] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ucontrol->value.integer.value[3] = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) uinfo->count = AK4114_REG_QSUB_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct snd_ctl_elem_value *ucontrol)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) unsigned i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* Don't forget to change AK4114_CONTROLS define!!! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) static const struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .name = "IEC958 Parity Errors",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) .info = snd_ak4114_in_error_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) .get = snd_ak4114_in_error_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .private_value = AK4114_PARITY_ERRORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) .name = "IEC958 V-Bit Errors",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .info = snd_ak4114_in_error_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .get = snd_ak4114_in_error_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) .private_value = AK4114_V_BIT_ERRORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .name = "IEC958 C-CRC Errors",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .info = snd_ak4114_in_error_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .get = snd_ak4114_in_error_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .private_value = AK4114_CCRC_ERRORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .name = "IEC958 Q-CRC Errors",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .info = snd_ak4114_in_error_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .get = snd_ak4114_in_error_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .private_value = AK4114_QCRC_ERRORS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .name = "IEC958 External Rate",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .info = snd_ak4114_rate_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .get = snd_ak4114_rate_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .access = SNDRV_CTL_ELEM_ACCESS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .info = snd_ak4114_spdif_mask_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .get = snd_ak4114_spdif_mask_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .info = snd_ak4114_spdif_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .get = snd_ak4114_spdif_playback_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .put = snd_ak4114_spdif_playback_put,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .access = SNDRV_CTL_ELEM_ACCESS_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .info = snd_ak4114_spdif_mask_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .get = snd_ak4114_spdif_mask_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .info = snd_ak4114_spdif_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .get = snd_ak4114_spdif_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .name = "IEC958 Preamble Capture Default",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .info = snd_ak4114_spdif_pinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .get = snd_ak4114_spdif_pget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .name = "IEC958 Q-subcode Capture Default",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .info = snd_ak4114_spdif_qinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .get = snd_ak4114_spdif_qget,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) .name = "IEC958 Audio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .info = snd_ak4114_in_bit_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .get = snd_ak4114_in_bit_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .name = "IEC958 Non-PCM Bitstream",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .info = snd_ak4114_in_bit_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .get = snd_ak4114_in_bit_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .private_value = (6<<8) | AK4114_REG_RCS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .name = "IEC958 DTS Bitstream",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .info = snd_ak4114_in_bit_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .get = snd_ak4114_in_bit_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .private_value = (3<<8) | AK4114_REG_RCS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .iface = SNDRV_CTL_ELEM_IFACE_PCM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .name = "IEC958 PPL Lock Status",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .info = snd_ak4114_in_bit_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .get = snd_ak4114_in_bit_get,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct snd_info_buffer *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct ak4114 *ak4114 = entry->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int reg, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* all ak4114 registers 0x00 - 0x1f */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) for (reg = 0; reg < 0x20; reg++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) val = reg_read(ak4114, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static void snd_ak4114_proc_init(struct ak4114 *ak4114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) snd_card_ro_proc_new(ak4114->card, "ak4114", ak4114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) snd_ak4114_proc_regs_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int snd_ak4114_build(struct ak4114 *ak4114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) struct snd_pcm_substream *ply_substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) struct snd_pcm_substream *cap_substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct snd_kcontrol *kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) unsigned int idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (snd_BUG_ON(!cap_substream))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ak4114->playback_substream = ply_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ak4114->capture_substream = cap_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) for (idx = 0; idx < AK4114_CONTROLS; idx++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (kctl == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (strstr(kctl->id.name, "Playback")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) if (ply_substream == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) snd_ctl_free_one(kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) ak4114->kctls[idx] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) kctl->id.device = ply_substream->pcm->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) kctl->id.subdevice = ply_substream->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) kctl->id.device = cap_substream->pcm->device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) kctl->id.subdevice = cap_substream->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) err = snd_ctl_add(ak4114->card, kctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) ak4114->kctls[idx] = kctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) snd_ak4114_proc_init(ak4114);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* trigger workq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) schedule_delayed_work(&ak4114->work, HZ / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) EXPORT_SYMBOL(snd_ak4114_build);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /* notify kcontrols if any parameters are changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static void ak4114_notify(struct ak4114 *ak4114,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) unsigned char rcs0, unsigned char rcs1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) unsigned char c0, unsigned char c1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (!ak4114->kctls[0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (rcs0 & AK4114_PAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) &ak4114->kctls[0]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (rcs0 & AK4114_V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) &ak4114->kctls[1]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) if (rcs1 & AK4114_CCRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) &ak4114->kctls[2]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (rcs1 & AK4114_QCRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) &ak4114->kctls[3]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) /* rate change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (c1 & 0xf0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) &ak4114->kctls[4]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) &ak4114->kctls[9]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (c0 & AK4114_QINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) &ak4114->kctls[10]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (c0 & AK4114_AUDION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) &ak4114->kctls[11]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (c0 & AK4114_AUTO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) &ak4114->kctls[12]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (c0 & AK4114_DTSCD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) &ak4114->kctls[13]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (c0 & AK4114_UNLCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) &ak4114->kctls[14]->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) int snd_ak4114_external_rate(struct ak4114 *ak4114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned char rcs1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return external_rate(rcs1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) EXPORT_SYMBOL(snd_ak4114_external_rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) unsigned long _flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) int res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) unsigned char rcs0, rcs1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) unsigned char c0, c1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (flags & AK4114_CHECK_NO_STAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) goto __rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) spin_lock_irqsave(&ak4114->lock, _flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (rcs0 & AK4114_PAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ak4114->errors[AK4114_PARITY_ERRORS]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) if (rcs1 & AK4114_V)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) ak4114->errors[AK4114_V_BIT_ERRORS]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (rcs1 & AK4114_CCRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) ak4114->errors[AK4114_CCRC_ERRORS]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (rcs1 & AK4114_QCRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) ak4114->errors[AK4114_QCRC_ERRORS]++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) ak4114->rcs1 = rcs1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) spin_unlock_irqrestore(&ak4114->lock, _flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (ak4114->change_callback && (c0 | c1) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) ak4114->change_callback(ak4114, c0, c1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) __rate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /* compare rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) res = external_rate(rcs1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (snd_pcm_running(ak4114->capture_substream)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) res = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static void ak4114_stats(struct work_struct *work)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct ak4114 *chip = container_of(work, struct ak4114, work.work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) if (atomic_inc_return(&chip->wq_processing) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) snd_ak4114_check_rate_and_errors(chip, chip->check_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (atomic_dec_and_test(&chip->wq_processing))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) schedule_delayed_work(&chip->work, HZ / 10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) void snd_ak4114_suspend(struct ak4114 *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) atomic_inc(&chip->wq_processing); /* don't schedule new work */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) cancel_delayed_work_sync(&chip->work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) EXPORT_SYMBOL(snd_ak4114_suspend);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) void snd_ak4114_resume(struct ak4114 *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) atomic_dec(&chip->wq_processing);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) snd_ak4114_reinit(chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) EXPORT_SYMBOL(snd_ak4114_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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