^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Regmap support for HD-audio verbs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * A virtual register is translated to one or more hda verbs for write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * vice versa for read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * A few limitations:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * - Provided for not all verbs but only subset standard non-volatile verbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * - For reading, only AC_VERB_GET_* variants can be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * - For writing, mapped to the *corresponding* AC_VERB_SET_* variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * so can't handle asymmetric verbs for read and write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pm_runtime.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <sound/hdaudio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <sound/hda_regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "local.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int codec_pm_lock(struct hdac_device *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) return snd_hdac_keep_power_up(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static void codec_pm_unlock(struct hdac_device *codec, int lock)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (lock == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) snd_hdac_power_down_pm(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define get_verb(reg) (((reg) >> 8) & 0xfff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static bool hda_volatile_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct hdac_device *codec = dev_to_hdac_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned int verb = get_verb(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) switch (verb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) case AC_VERB_GET_PROC_COEF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return !codec->cache_coef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) case AC_VERB_GET_COEF_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) case AC_VERB_GET_PROC_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) case AC_VERB_GET_POWER_STATE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) case AC_VERB_GET_PIN_SENSE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) case AC_VERB_GET_HDMI_DIP_SIZE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) case AC_VERB_GET_HDMI_ELDD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) case AC_VERB_GET_HDMI_DIP_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) case AC_VERB_GET_HDMI_DIP_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case AC_VERB_GET_HDMI_DIP_XMIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case AC_VERB_GET_HDMI_CP_CTRL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) case AC_VERB_GET_HDMI_CHAN_SLOT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) case AC_VERB_GET_DEVICE_SEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case AC_VERB_GET_DEVICE_LIST: /* read-only volatile */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static bool hda_writeable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct hdac_device *codec = dev_to_hdac_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int verb = get_verb(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) const unsigned int *v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) snd_array_for_each(&codec->vendor_verbs, i, v) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (verb == *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (codec->caps_overwriting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) switch (verb & 0xf00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case AC_VERB_GET_STREAM_FORMAT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) case AC_VERB_GET_AMP_GAIN_MUTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case AC_VERB_GET_PROC_COEF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) return codec->cache_coef;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) case 0xf00:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) switch (verb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) case AC_VERB_GET_CONNECT_SEL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) case AC_VERB_GET_SDI_SELECT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) case AC_VERB_GET_PIN_WIDGET_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case AC_VERB_GET_UNSOLICITED_RESPONSE: /* only as SET_UNSOLICITED_ENABLE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) case AC_VERB_GET_BEEP_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) case AC_VERB_GET_EAPD_BTLENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case AC_VERB_GET_DIGI_CONVERT_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) case AC_VERB_GET_DIGI_CONVERT_2: /* only for beep control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) case AC_VERB_GET_VOLUME_KNOB_CONTROL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case AC_VERB_GET_GPIO_MASK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) case AC_VERB_GET_GPIO_DIRECTION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) case AC_VERB_GET_GPIO_DATA: /* not for volatile read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) case AC_VERB_GET_GPIO_WAKE_MASK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) case AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) case AC_VERB_GET_GPIO_STICKY_MASK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static bool hda_readable_reg(struct device *dev, unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct hdac_device *codec = dev_to_hdac_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned int verb = get_verb(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (codec->caps_overwriting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) switch (verb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case AC_VERB_PARAMETERS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) case AC_VERB_GET_CONNECT_LIST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) case AC_VERB_GET_SUBSYSTEM_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* below are basically writable, but disabled for reducing unnecessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * writes at sync
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) case AC_VERB_GET_CONFIG_DEFAULT: /* usually just read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) case AC_VERB_GET_CONV: /* managed in PCM code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) case AC_VERB_GET_CVT_CHAN_COUNT: /* managed in HDMI CA code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return hda_writeable_reg(dev, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Stereo amp pseudo register:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * for making easier to handle the stereo volume control, we provide a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * fake register to deal both left and right channels by a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * (pseudo) register access. A verb consisting of SET_AMP_GAIN with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * *both* SET_LEFT and SET_RIGHT bits takes a 16bit value, the lower 8bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * for the left and the upper 8bit for the right channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static bool is_stereo_amp_verb(unsigned int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (((reg >> 8) & 0x700) != AC_VERB_SET_AMP_GAIN_MUTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) return (reg & (AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT)) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) (AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* read a pseudo stereo amp register (16bit left+right) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int hda_reg_read_stereo_amp(struct hdac_device *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) unsigned int reg, unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned int left, right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) reg &= ~(AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) err = snd_hdac_exec_verb(codec, reg | AC_AMP_GET_LEFT, 0, &left);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) err = snd_hdac_exec_verb(codec, reg | AC_AMP_GET_RIGHT, 0, &right);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) *val = left | (right << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* write a pseudo stereo amp register (16bit left+right) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int hda_reg_write_stereo_amp(struct hdac_device *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) unsigned int reg, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) unsigned int verb, left, right;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) verb = AC_VERB_SET_AMP_GAIN_MUTE << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (reg & AC_AMP_GET_OUTPUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) verb |= AC_AMP_SET_OUTPUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) verb |= AC_AMP_SET_INPUT | ((reg & 0xf) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) reg = (reg & ~0xfffff) | verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) left = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) right = (val >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (left == right) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) reg |= AC_AMP_SET_LEFT | AC_AMP_SET_RIGHT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return snd_hdac_exec_verb(codec, reg | left, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) err = snd_hdac_exec_verb(codec, reg | AC_AMP_SET_LEFT | left, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) err = snd_hdac_exec_verb(codec, reg | AC_AMP_SET_RIGHT | right, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* read a pseudo coef register (16bit) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) static int hda_reg_read_coef(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) unsigned int verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (!codec->cache_coef)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* LSB 8bit = coef index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) verb = (reg & ~0xfff00) | (AC_VERB_SET_COEF_INDEX << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) err = snd_hdac_exec_verb(codec, verb, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) verb = (reg & ~0xfffff) | (AC_VERB_GET_COEF_INDEX << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) return snd_hdac_exec_verb(codec, verb, 0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* write a pseudo coef register (16bit) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) static int hda_reg_write_coef(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) unsigned int verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (!codec->cache_coef)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* LSB 8bit = coef index */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) verb = (reg & ~0xfff00) | (AC_VERB_SET_COEF_INDEX << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) err = snd_hdac_exec_verb(codec, verb, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) verb = (reg & ~0xfffff) | (AC_VERB_GET_COEF_INDEX << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) (val & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return snd_hdac_exec_verb(codec, verb, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int hda_reg_read(void *context, unsigned int reg, unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct hdac_device *codec = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) int verb = get_verb(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) int pm_lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) if (verb != AC_VERB_GET_POWER_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) pm_lock = codec_pm_lock(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (pm_lock < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) reg |= (codec->addr << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (is_stereo_amp_verb(reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) err = hda_reg_read_stereo_amp(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (verb == AC_VERB_GET_PROC_COEF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) err = hda_reg_read_coef(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if ((verb & 0x700) == AC_VERB_SET_AMP_GAIN_MUTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) reg &= ~AC_AMP_FAKE_MUTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) err = snd_hdac_exec_verb(codec, reg, 0, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* special handling for asymmetric reads */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (verb == AC_VERB_GET_POWER_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (*val & AC_PWRST_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) *val = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) else /* take only the actual state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) *val = (*val >> 4) & 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) codec_pm_unlock(codec, pm_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static int hda_reg_write(void *context, unsigned int reg, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct hdac_device *codec = context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) unsigned int verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) int i, bytes, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) int pm_lock = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (codec->caps_overwriting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) reg &= ~0x00080000U; /* drop GET bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) reg |= (codec->addr << 28);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) verb = get_verb(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (verb != AC_VERB_SET_POWER_STATE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) pm_lock = codec_pm_lock(codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (pm_lock < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) return codec->lazy_cache ? 0 : -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (is_stereo_amp_verb(reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) err = hda_reg_write_stereo_amp(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (verb == AC_VERB_SET_PROC_COEF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) err = hda_reg_write_coef(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) switch (verb & 0xf00) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) case AC_VERB_SET_AMP_GAIN_MUTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if ((reg & AC_AMP_FAKE_MUTE) && (val & AC_AMP_MUTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) verb = AC_VERB_SET_AMP_GAIN_MUTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (reg & AC_AMP_GET_LEFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) verb |= AC_AMP_SET_LEFT >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) verb |= AC_AMP_SET_RIGHT >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (reg & AC_AMP_GET_OUTPUT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) verb |= AC_AMP_SET_OUTPUT >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) verb |= AC_AMP_SET_INPUT >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) verb |= reg & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) switch (verb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case AC_VERB_SET_DIGI_CONVERT_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) bytes = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) case AC_VERB_SET_CONFIG_DEFAULT_BYTES_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) bytes = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) bytes = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) for (i = 0; i < bytes; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) reg &= ~0xfffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) reg |= (verb + i) << 8 | ((val >> (8 * i)) & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) err = snd_hdac_exec_verb(codec, reg, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) codec_pm_unlock(codec, pm_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static const struct regmap_config hda_regmap_cfg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .name = "hdaudio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) .reg_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .val_bits = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .max_register = 0xfffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .writeable_reg = hda_writeable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .readable_reg = hda_readable_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) .volatile_reg = hda_volatile_reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .cache_type = REGCACHE_RBTREE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .reg_read = hda_reg_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .reg_write = hda_reg_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) .use_single_read = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) .use_single_write = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) .disable_locking = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * snd_hdac_regmap_init - Initialize regmap for HDA register accesses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * Returns zero for success or a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) int snd_hdac_regmap_init(struct hdac_device *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) struct regmap *regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) regmap = regmap_init(&codec->dev, NULL, codec, &hda_regmap_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (IS_ERR(regmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) return PTR_ERR(regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) codec->regmap = regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) snd_array_init(&codec->vendor_verbs, sizeof(unsigned int), 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) EXPORT_SYMBOL_GPL(snd_hdac_regmap_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * snd_hdac_regmap_init - Release the regmap from HDA codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) void snd_hdac_regmap_exit(struct hdac_device *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) if (codec->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) regmap_exit(codec->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) codec->regmap = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) snd_array_free(&codec->vendor_verbs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) EXPORT_SYMBOL_GPL(snd_hdac_regmap_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * snd_hdac_regmap_add_vendor_verb - add a vendor-specific verb to regmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * @verb: verb to allow accessing via regmap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * Returns zero for success or a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) int snd_hdac_regmap_add_vendor_verb(struct hdac_device *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) unsigned int verb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) unsigned int *p = snd_array_new(&codec->vendor_verbs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (!p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) *p = verb | 0x800; /* set GET bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) EXPORT_SYMBOL_GPL(snd_hdac_regmap_add_vendor_verb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * helper functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) /* write a pseudo-register value (w/o power sequence) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static int reg_raw_write(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) mutex_lock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!codec->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) err = hda_reg_write(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) err = regmap_write(codec->regmap, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) mutex_unlock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /* a helper macro to call @func_call; retry with power-up if failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) #define CALL_RAW_FUNC(codec, func_call) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int _err = func_call; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) if (_err == -EAGAIN) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) _err = snd_hdac_power_up_pm(codec); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (_err >= 0) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) _err = func_call; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) snd_hdac_power_down_pm(codec); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) _err;})
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) * snd_hdac_regmap_write_raw - write a pseudo register with power mgmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * @reg: pseudo register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * @val: value to write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * Returns zero if successful or a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) int snd_hdac_regmap_write_raw(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) return CALL_RAW_FUNC(codec, reg_raw_write(codec, reg, val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) EXPORT_SYMBOL_GPL(snd_hdac_regmap_write_raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static int reg_raw_read(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) unsigned int *val, bool uncached)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) mutex_lock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (uncached || !codec->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) err = hda_reg_read(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) err = regmap_read(codec->regmap, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) mutex_unlock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static int __snd_hdac_regmap_read_raw(struct hdac_device *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) unsigned int reg, unsigned int *val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) bool uncached)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return CALL_RAW_FUNC(codec, reg_raw_read(codec, reg, val, uncached));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * snd_hdac_regmap_read_raw - read a pseudo register with power mgmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) * @reg: pseudo register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) * @val: pointer to store the read value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * Returns zero if successful or a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) int snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) return __snd_hdac_regmap_read_raw(codec, reg, val, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) EXPORT_SYMBOL_GPL(snd_hdac_regmap_read_raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /* Works like snd_hdac_regmap_read_raw(), but this doesn't read from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * cache but always via hda verbs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) int snd_hdac_regmap_read_raw_uncached(struct hdac_device *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) unsigned int reg, unsigned int *val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) return __snd_hdac_regmap_read_raw(codec, reg, val, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static int reg_raw_update(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) unsigned int mask, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) unsigned int orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) bool change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) mutex_lock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (codec->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) err = regmap_update_bits_check(codec->regmap, reg, mask, val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) &change);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) err = change ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) err = hda_reg_read(codec, reg, &orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) if (!err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) val &= mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) val |= orig & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (val != orig) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) err = hda_reg_write(codec, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (!err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) err = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) mutex_unlock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * snd_hdac_regmap_update_raw - update a pseudo register with power mgmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * @reg: pseudo register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * @mask: bit mask to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * @val: value to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * Returns zero if successful or a negative error code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) int snd_hdac_regmap_update_raw(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) unsigned int mask, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return CALL_RAW_FUNC(codec, reg_raw_update(codec, reg, mask, val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) EXPORT_SYMBOL_GPL(snd_hdac_regmap_update_raw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) static int reg_raw_update_once(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) unsigned int mask, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) unsigned int orig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (!codec->regmap)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return reg_raw_update(codec, reg, mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) mutex_lock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) regcache_cache_only(codec->regmap, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) err = regmap_read(codec->regmap, reg, &orig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) regcache_cache_only(codec->regmap, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) err = regmap_update_bits(codec->regmap, reg, mask, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) mutex_unlock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * snd_hdac_regmap_update_raw_once - initialize the register value only once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * @reg: pseudo register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * @mask: bit mask to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) * @val: value to update
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) * Performs the update of the register bits only once when the register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * hasn't been initialized yet. Used in HD-audio legacy driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * Returns zero if successful or a negative error code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) int snd_hdac_regmap_update_raw_once(struct hdac_device *codec, unsigned int reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) unsigned int mask, unsigned int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return CALL_RAW_FUNC(codec, reg_raw_update_once(codec, reg, mask, val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) EXPORT_SYMBOL_GPL(snd_hdac_regmap_update_raw_once);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * snd_hdac_regmap_sync - sync out the cached values for PM resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * @codec: the codec object
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) void snd_hdac_regmap_sync(struct hdac_device *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (codec->regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) mutex_lock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) regcache_sync(codec->regmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) mutex_unlock(&codec->regmap_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) EXPORT_SYMBOL_GPL(snd_hdac_regmap_sync);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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