^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * amdtp-tascam.c - a part of driver for TASCAM FireWire series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015 Takashi Sakamoto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "tascam.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define AMDTP_FMT_TSCM_TX 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define AMDTP_FMT_TSCM_RX 0x3e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct amdtp_tscm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) unsigned int pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) int amdtp_tscm_set_parameters(struct amdtp_stream *s, unsigned int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct amdtp_tscm *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) unsigned int data_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) if (amdtp_stream_running(s))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) data_channels = p->pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Packets in in-stream have extra 2 data channels. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) if (s->direction == AMDTP_IN_STREAM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) data_channels += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) return amdtp_stream_set_parameters(s, rate, data_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static void write_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) __be32 *buffer, unsigned int frames,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int pcm_frames)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct amdtp_tscm *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned int channels = p->pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct snd_pcm_runtime *runtime = pcm->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) unsigned int pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int remaining_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) const u32 *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) int i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) pcm_buffer_pointer %= runtime->buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) src = (void *)runtime->dma_area +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) frames_to_bytes(runtime, pcm_buffer_pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) for (i = 0; i < frames; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for (c = 0; c < channels; ++c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) buffer[c] = cpu_to_be32(*src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (--remaining_frames == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) src = (void *)runtime->dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void read_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) __be32 *buffer, unsigned int frames,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned int pcm_frames)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct amdtp_tscm *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned int channels = p->pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct snd_pcm_runtime *runtime = pcm->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int remaining_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 *dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) pcm_buffer_pointer %= runtime->buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) dst = (void *)runtime->dma_area +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) frames_to_bytes(runtime, pcm_buffer_pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* The first data channel is for event counter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) buffer += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) for (i = 0; i < frames; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) for (c = 0; c < channels; ++c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *dst = be32_to_cpu(buffer[c]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) dst++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) if (--remaining_frames == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) dst = (void *)runtime->dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static void write_pcm_silence(struct amdtp_stream *s, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct amdtp_tscm *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int channels, i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) channels = p->pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) for (c = 0; c < channels; ++c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) buffer[c] = 0x00000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int amdtp_tscm_add_pcm_hw_constraints(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct snd_pcm_runtime *runtime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * Our implementation allows this protocol to deliver 24 bit sample in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * 32bit data channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return amdtp_stream_add_pcm_hw_constraints(s, runtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void read_status_messages(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) __be32 *buffer, unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct snd_tscm *tscm = container_of(s, struct snd_tscm, tx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) bool used = READ_ONCE(tscm->hwdep->used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) for (i = 0; i < data_blocks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) __be32 before;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) __be32 after;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) index = be32_to_cpu(buffer[0]) % SNDRV_FIREWIRE_TASCAM_STATE_COUNT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) before = tscm->state[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) after = buffer[s->data_block_quadlets - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (used && index > 4 && index < 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) __be32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (index == 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) mask = cpu_to_be32(~0x0000ffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) else if (index == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) mask = cpu_to_be32(~0x0000ffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) else if (index == 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) mask = cpu_to_be32(~0x000f0f00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) mask = cpu_to_be32(~0x00000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) if ((before ^ after) & mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct snd_firewire_tascam_change *entry =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) &tscm->queue[tscm->push_pos];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) unsigned long flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) spin_lock_irqsave(&tscm->lock, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) entry->index = index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) entry->before = before;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) entry->after = after;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (++tscm->push_pos >= SND_TSCM_QUEUE_COUNT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) tscm->push_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) spin_unlock_irqrestore(&tscm->lock, flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) wake_up(&tscm->hwdep_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) tscm->state[index] = after;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static unsigned int process_ir_ctx_payloads(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) const struct pkt_desc *descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) unsigned int packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct snd_pcm_substream *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) unsigned int pcm_frames = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) for (i = 0; i < packets; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) const struct pkt_desc *desc = descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) __be32 *buf = desc->ctx_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) unsigned int data_blocks = desc->data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) if (pcm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) read_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) pcm_frames += data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) read_status_messages(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) return pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) const struct pkt_desc *descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) unsigned int packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct snd_pcm_substream *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) unsigned int pcm_frames = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) for (i = 0; i < packets; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) const struct pkt_desc *desc = descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) __be32 *buf = desc->ctx_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned int data_blocks = desc->data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (pcm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) write_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) pcm_frames += data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) write_pcm_silence(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int amdtp_tscm_init(struct amdtp_stream *s, struct fw_unit *unit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) enum amdtp_stream_direction dir, unsigned int pcm_channels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) amdtp_stream_process_ctx_payloads_t process_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) struct amdtp_tscm *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned int fmt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) if (dir == AMDTP_IN_STREAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) fmt = AMDTP_FMT_TSCM_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) process_ctx_payloads = process_ir_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) fmt = AMDTP_FMT_TSCM_RX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) process_ctx_payloads = process_it_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) err = amdtp_stream_init(s, unit, dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) CIP_NONBLOCKING | CIP_SKIP_DBC_ZERO_CHECK, fmt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) process_ctx_payloads, sizeof(struct amdtp_tscm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (dir == AMDTP_OUT_STREAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) // Use fixed value for FDF field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) s->ctx_data.rx.fdf = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) // Not used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) s->ctx_data.rx.syt_override = 0x0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* This protocol uses fixed number of data channels for PCM samples. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) p->pcm_channels = pcm_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags