^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * amdtp-motu.c - a part of driver for MOTU FireWire series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015-2017 Takashi Sakamoto <o-takashi@sakamocchi.jp>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include "motu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define CREATE_TRACE_POINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "amdtp-motu-trace.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define CIP_FMT_MOTU 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define CIP_FMT_MOTU_TX_V3 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MOTU_FDF_AM824 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Nominally 3125 bytes/second, but the MIDI port's clock might be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * 1% too slow, and the bus clock 100 ppm too fast.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MIDI_BYTES_PER_SECOND 3093
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct amdtp_motu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* For timestamp processing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned int quotient_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int remainder_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned int next_ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned int next_accumulated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int next_cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) unsigned int next_seconds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) unsigned int pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned int pcm_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct snd_rawmidi_substream *midi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int midi_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned int midi_flag_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned int midi_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int midi_db_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned int midi_db_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) int amdtp_motu_set_parameters(struct amdtp_stream *s, unsigned int rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned int midi_ports,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct snd_motu_packet_format *formats)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned int quotient_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned int remainder_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) } params[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) [CIP_SFC_44100] = { 557, 123 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) [CIP_SFC_48000] = { 512, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) [CIP_SFC_88200] = { 278, 282 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) [CIP_SFC_96000] = { 256, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) [CIP_SFC_176400] = { 139, 141 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) [CIP_SFC_192000] = { 128, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned int pcm_chunks, data_chunks, data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (amdtp_stream_running(s))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) for (i = 0; i < ARRAY_SIZE(snd_motu_clock_rates); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) if (snd_motu_clock_rates[i] == rate) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) mode = i >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) if (i == ARRAY_SIZE(snd_motu_clock_rates))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) // Each data block includes SPH in its head. Data chunks follow with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) // 3 byte alignment. Padding follows with zero to conform to quadlet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) // alignment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) pcm_chunks = formats->pcm_chunks[mode];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) data_chunks = formats->msg_chunks + pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) data_block_quadlets = 1 + DIV_ROUND_UP(data_chunks * 3, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) err = amdtp_stream_set_parameters(s, rate, data_block_quadlets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) p->pcm_chunks = pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) p->pcm_byte_offset = formats->pcm_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) p->midi_ports = midi_ports;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) p->midi_flag_offset = formats->midi_flag_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) p->midi_byte_offset = formats->midi_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) p->midi_db_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) p->midi_db_interval = rate / MIDI_BYTES_PER_SECOND;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* IEEE 1394 bus requires. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) delay = 0x2e00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* For no-data or empty packets to adjust PCM sampling frequency. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) delay += 8000 * 3072 * s->syt_interval / rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) p->next_seconds = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) p->next_cycles = delay / 3072;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) p->quotient_ticks_per_event = params[s->sfc].quotient_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) p->remainder_ticks_per_event = params[s->sfc].remainder_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) p->next_ticks = delay % 3072;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) p->next_accumulated = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static void read_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) __be32 *buffer, unsigned int data_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned int pcm_frames)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int channels = p->pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct snd_pcm_runtime *runtime = pcm->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned int pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int remaining_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u8 *byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) u32 *dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pcm_buffer_pointer %= runtime->buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) dst = (void *)runtime->dma_area +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) frames_to_bytes(runtime, pcm_buffer_pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) byte = (u8 *)buffer + p->pcm_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) for (c = 0; c < channels; ++c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) *dst = (byte[0] << 24) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) (byte[1] << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) (byte[2] << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) byte += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) dst++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (--remaining_frames == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) dst = (void *)runtime->dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void write_pcm_s32(struct amdtp_stream *s, struct snd_pcm_substream *pcm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) __be32 *buffer, unsigned int data_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) unsigned int pcm_frames)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned int channels = p->pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct snd_pcm_runtime *runtime = pcm->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int remaining_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) u8 *byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) const u32 *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) pcm_buffer_pointer = s->pcm_buffer_pointer + pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pcm_buffer_pointer %= runtime->buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) src = (void *)runtime->dma_area +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) frames_to_bytes(runtime, pcm_buffer_pointer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) remaining_frames = runtime->buffer_size - pcm_buffer_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) byte = (u8 *)buffer + p->pcm_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) for (c = 0; c < channels; ++c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) byte[0] = (*src >> 24) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) byte[1] = (*src >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) byte[2] = (*src >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) byte += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (--remaining_frames == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) src = (void *)runtime->dma_area;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void write_pcm_silence(struct amdtp_stream *s, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) unsigned int channels, i, c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) u8 *byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) channels = p->pcm_chunks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) byte = (u8 *)buffer + p->pcm_byte_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) for (c = 0; c < channels; ++c) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) byte[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) byte[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) byte[2] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) byte += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int amdtp_motu_add_pcm_hw_constraints(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct snd_pcm_runtime *runtime)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /* TODO: how to set an constraint for exactly 24bit PCM sample? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) return amdtp_stream_add_pcm_hw_constraints(s, runtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void amdtp_motu_midi_trigger(struct amdtp_stream *s, unsigned int port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) struct snd_rawmidi_substream *midi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (port < p->midi_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) WRITE_ONCE(p->midi, midi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) static void write_midi_messages(struct amdtp_stream *s, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) struct snd_rawmidi_substream *midi = READ_ONCE(p->midi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) u8 *b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (i = 0; i < data_blocks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) b = (u8 *)buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (midi && p->midi_db_count == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) snd_rawmidi_transmit(midi, b + p->midi_byte_offset, 1) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) b[p->midi_flag_offset] = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) b[p->midi_byte_offset] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) b[p->midi_flag_offset] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (--p->midi_db_count < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) p->midi_db_count = p->midi_db_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static void read_midi_messages(struct amdtp_stream *s, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct snd_rawmidi_substream *midi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) u8 *b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) for (i = 0; i < data_blocks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) b = (u8 *)buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) midi = READ_ONCE(p->midi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (midi && (b[p->midi_flag_offset] & 0x01))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) snd_rawmidi_receive(midi, b + p->midi_byte_offset, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* For tracepoints. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static void __maybe_unused copy_sph(u32 *frames, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) unsigned int data_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) unsigned int data_block_quadlets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) *frames = be32_to_cpu(*buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) buffer += data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) frames++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* For tracepoints. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) static void __maybe_unused copy_message(u64 *frames, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) unsigned int data_blocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) unsigned int data_block_quadlets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) /* This is just for v2/v3 protocol. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) for (i = 0; i < data_blocks; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) *frames = (be32_to_cpu(buffer[1]) << 16) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) (be32_to_cpu(buffer[2]) >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) buffer += data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) frames++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static void probe_tracepoints_events(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) const struct pkt_desc *descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned int packets)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) for (i = 0; i < packets; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) const struct pkt_desc *desc = descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) __be32 *buf = desc->ctx_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) unsigned int data_blocks = desc->data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) trace_data_block_sph(s, data_blocks, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) trace_data_block_message(s, data_blocks, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) static unsigned int process_ir_ctx_payloads(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) const struct pkt_desc *descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) unsigned int packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) struct snd_pcm_substream *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) unsigned int pcm_frames = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) // For data block processing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) for (i = 0; i < packets; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) const struct pkt_desc *desc = descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) __be32 *buf = desc->ctx_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) unsigned int data_blocks = desc->data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (pcm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) read_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) pcm_frames += data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (p->midi_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) read_midi_messages(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) // For tracepoints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (trace_data_block_sph_enabled() ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) trace_data_block_message_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) probe_tracepoints_events(s, descs, packets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) static inline void compute_next_elapse_from_start(struct amdtp_motu *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) p->next_accumulated += p->remainder_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (p->next_accumulated >= 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) p->next_accumulated -= 441;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) p->next_ticks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) p->next_ticks += p->quotient_ticks_per_event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (p->next_ticks >= 3072) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) p->next_ticks -= 3072;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) p->next_cycles++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (p->next_cycles >= 8000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) p->next_cycles -= 8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) p->next_seconds++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (p->next_seconds >= 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) p->next_seconds -= 128;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) static void write_sph(struct amdtp_stream *s, __be32 *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) unsigned int data_blocks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) unsigned int next_cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) u32 sph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) for (i = 0; i < data_blocks; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) next_cycles = (s->start_cycle + p->next_cycles) % 8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) sph = ((next_cycles << 12) | p->next_ticks) & 0x01ffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) *buffer = cpu_to_be32(sph);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) compute_next_elapse_from_start(p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) buffer += s->data_block_quadlets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) static unsigned int process_it_ctx_payloads(struct amdtp_stream *s,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) const struct pkt_desc *descs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) unsigned int packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) struct snd_pcm_substream *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) struct amdtp_motu *p = s->protocol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) unsigned int pcm_frames = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) // For data block processing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) for (i = 0; i < packets; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) const struct pkt_desc *desc = descs + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) __be32 *buf = desc->ctx_payload;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) unsigned int data_blocks = desc->data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (pcm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) write_pcm_s32(s, pcm, buf, data_blocks, pcm_frames);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) pcm_frames += data_blocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) write_pcm_silence(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (p->midi_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) write_midi_messages(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) // TODO: how to interact control messages between userspace?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) write_sph(s, buf, data_blocks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) // For tracepoints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) if (trace_data_block_sph_enabled() ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) trace_data_block_message_enabled())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) probe_tracepoints_events(s, descs, packets);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) return pcm_frames;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int amdtp_motu_init(struct amdtp_stream *s, struct fw_unit *unit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) enum amdtp_stream_direction dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) const struct snd_motu_spec *spec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) amdtp_stream_process_ctx_payloads_t process_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) int fmt = CIP_FMT_MOTU;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int flags = CIP_BLOCKING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) if (dir == AMDTP_IN_STREAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) process_ctx_payloads = process_ir_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * Units of version 3 transmits packets with invalid CIP header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * against IEC 61883-1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (spec->protocol_version == SND_MOTU_PROTOCOL_V3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) flags |= CIP_WRONG_DBS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) CIP_SKIP_DBC_ZERO_CHECK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) CIP_HEADER_WITHOUT_EOH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) fmt = CIP_FMT_MOTU_TX_V3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if (spec == &snd_motu_spec_8pre ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) spec == &snd_motu_spec_ultralite) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) // 8pre has some quirks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) flags |= CIP_WRONG_DBS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) CIP_SKIP_DBC_ZERO_CHECK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) process_ctx_payloads = process_it_ctx_payloads;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) flags |= CIP_DBC_IS_END_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) err = amdtp_stream_init(s, unit, dir, flags, fmt, process_ctx_payloads,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) sizeof(struct amdtp_motu));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) s->sph = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (dir == AMDTP_OUT_STREAM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) // Use fixed value for FDF field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) s->ctx_data.rx.fdf = MOTU_FDF_AM824;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) // Not used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) s->ctx_data.rx.syt_override = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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