Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) // ff-protocol-latter - a part of driver for RME Fireface series
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) // Copyright (c) 2019 Takashi Sakamoto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) // Licensed under the terms of the GNU General Public License, version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include "ff.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define LATTER_STF		0xffff00000004ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define LATTER_ISOC_CHANNELS	0xffff00000008ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #define LATTER_ISOC_START	0xffff0000000cULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define LATTER_FETCH_MODE	0xffff00000010ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define LATTER_SYNC_STATUS	0x0000801c0000ULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) // The content of sync status register differs between models.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) // Fireface UCX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) //  0xf0000000: (unidentified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) //  0x0f000000: effective rate of sampling clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) //  0x00f00000: detected rate of word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) //  0x000f0000: detected rate of ADAT or S/PDIF on optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) //  0x0000f000: detected rate of S/PDIF on coaxial interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) //  0x00000e00: effective source of sampling clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) //    0x00000e00: Internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) //    0x00000800: (unidentified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) //    0x00000600: Word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) //    0x00000400: ADAT on optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) //    0x00000200: S/PDIF on coaxial or optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) //  0x00000100: Optical interface is used for ADAT signal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) //  0x00000080: (unidentified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) //  0x00000040: Synchronized to word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) //  0x00000020: Synchronized to ADAT or S/PDIF on optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) //  0x00000010: Synchronized to S/PDIF on coaxial interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) //  0x00000008: (unidentified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) //  0x00000004: Lock word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) //  0x00000002: Lock ADAT or S/PDIF on optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) //  0x00000001: Lock S/PDIF on coaxial interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) // Fireface 802 (and perhaps UFX):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) //   0xf0000000: effective rate of sampling clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) //   0x0f000000: detected rate of ADAT-B on 2nd optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) //   0x00f00000: detected rate of ADAT-A on 1st optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) //   0x000f0000: detected rate of AES/EBU on XLR or coaxial interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) //   0x0000f000: detected rate of word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) //   0x00000e00: effective source of sampling clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) //     0x00000e00: internal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) //     0x00000800: ADAT-B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) //     0x00000600: ADAT-A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) //     0x00000400: AES/EBU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) //     0x00000200: Word clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) //   0x00000080: Synchronized to ADAT-B on 2nd optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) //   0x00000040: Synchronized to ADAT-A on 1st optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) //   0x00000020: Synchronized to AES/EBU on XLR or 2nd optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) //   0x00000010: Synchronized to word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) //   0x00000008: Lock ADAT-B on 2nd optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) //   0x00000004: Lock ADAT-A on 1st optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) //   0x00000002: Lock AES/EBU on XLR or 2nd optical interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) //   0x00000001: Lock word clock on BNC interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) // The pattern for rate bits:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) //   0x00: 32.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) //   0x01: 44.1 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) //   0x02: 48.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) //   0x04: 64.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) //   0x05: 88.2 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) //   0x06: 96.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) //   0x08: 128.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) //   0x09: 176.4 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) //   0x0a: 192.0 kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int parse_clock_bits(u32 data, unsigned int *rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 			    enum snd_ff_clock_src *src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 			    enum snd_ff_unit_version unit_version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		u32 flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	} *rate_entry, rate_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		{ 32000,	0x00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		{ 44100,	0x01, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		{ 48000,	0x02, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		{ 64000,	0x04, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		{ 88200,	0x05, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		{ 96000,	0x06, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		{ 128000,	0x08, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		{ 176400,	0x09, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		{ 192000,	0x0a, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		enum snd_ff_clock_src src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		u32 flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	} *clk_entry, *clk_entries, ucx_clk_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		{ SND_FF_CLOCK_SRC_SPDIF,	0x00000200, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		{ SND_FF_CLOCK_SRC_ADAT1,	0x00000400, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		{ SND_FF_CLOCK_SRC_WORD,	0x00000600, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		{ SND_FF_CLOCK_SRC_INTERNAL,	0x00000e00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	}, ufx_ff802_clk_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		{ SND_FF_CLOCK_SRC_WORD,	0x00000200, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 		{ SND_FF_CLOCK_SRC_SPDIF,	0x00000400, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 		{ SND_FF_CLOCK_SRC_ADAT1,	0x00000600, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		{ SND_FF_CLOCK_SRC_ADAT2,	0x00000800, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		{ SND_FF_CLOCK_SRC_INTERNAL,	0x00000e00, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	u32 rate_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	unsigned int clk_entry_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (unit_version == SND_FF_UNIT_VERSION_UCX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		rate_bits = (data & 0x0f000000) >> 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		clk_entries = ucx_clk_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 		rate_bits = (data & 0xf0000000) >> 28;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 		clk_entries = ufx_ff802_clk_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 		clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	for (i = 0; i < ARRAY_SIZE(rate_entries); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		rate_entry = rate_entries + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		if (rate_bits == rate_entry->flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			*rate = rate_entry->rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	if (i == ARRAY_SIZE(rate_entries))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	for (i = 0; i < clk_entry_count; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		clk_entry = clk_entries + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		if ((data & 0x000e00) == clk_entry->flag) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			*src = clk_entry->src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	if (i == clk_entry_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int latter_get_clock(struct snd_ff *ff, unsigned int *rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			   enum snd_ff_clock_src *src)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 				 LATTER_SYNC_STATUS, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	data = le32_to_cpu(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	return parse_clock_bits(data, rate, src, ff->unit_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int latter_switch_fetching_mode(struct snd_ff *ff, bool enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	if (enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		data = 0x00000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		data = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	reg = cpu_to_le32(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 				  LATTER_FETCH_MODE, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int latter_allocate_resources(struct snd_ff *ff, unsigned int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	enum snd_ff_stream_mode mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	unsigned int code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	unsigned int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	// Set the number of data blocks transferred in a second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	if (rate % 48000 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		code = 0x04;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	else if (rate % 44100 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		code = 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	else if (rate % 32000 == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		code = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (rate >= 64000 && rate < 128000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		code |= 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	else if (rate >= 128000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		code |= 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	reg = cpu_to_le32(code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 				 LATTER_STF, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	// Confirm to shift transmission clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	while (count++ < 10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		unsigned int curr_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		enum snd_ff_clock_src src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		err = latter_get_clock(ff, &curr_rate, &src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		if (curr_rate == rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (count > 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		return -ETIMEDOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	for (i = 0; i < ARRAY_SIZE(amdtp_rate_table); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		if (rate == amdtp_rate_table[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	if (i == ARRAY_SIZE(amdtp_rate_table))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	err = snd_ff_stream_get_multiplier_mode(i, &mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	// Keep resources for in-stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	ff->tx_resources.channels_mask = 0x00000000000000ffuLL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	err = fw_iso_resources_allocate(&ff->tx_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			amdtp_stream_get_max_payload(&ff->tx_stream),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 			fw_parent_device(ff->unit)->max_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	// Keep resources for out-stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	ff->rx_resources.channels_mask = 0x00000000000000ffuLL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	err = fw_iso_resources_allocate(&ff->rx_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			amdtp_stream_get_max_payload(&ff->rx_stream),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			fw_parent_device(ff->unit)->max_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 		fw_iso_resources_free(&ff->tx_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static int latter_begin_session(struct snd_ff *ff, unsigned int rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	unsigned int generation = ff->rx_resources.generation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	unsigned int flag;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		// For Fireface UCX. Always use the maximum number of data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		// channels in data block of packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if (rate >= 32000 && rate <= 48000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			flag = 0x92;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 		else if (rate >= 64000 && rate <= 96000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 			flag = 0x8e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		else if (rate >= 128000 && rate <= 192000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 			flag = 0x8c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		// For Fireface UFX and 802. Due to bandwidth limitation on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		// IEEE 1394a (400 Mbps), Analog 1-12 and AES are available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		// without any ADAT at quadruple speed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		if (rate >= 32000 && rate <= 48000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 			flag = 0x9e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 		else if (rate >= 64000 && rate <= 96000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 			flag = 0x96;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		else if (rate >= 128000 && rate <= 192000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 			flag = 0x8e;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 			return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	if (generation != fw_parent_device(ff->unit)->card->generation) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		err = fw_iso_resources_update(&ff->tx_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 		err = fw_iso_resources_update(&ff->rx_resources);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	data = (ff->tx_resources.channel << 8) | ff->rx_resources.channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	reg = cpu_to_le32(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	err = snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 				 LATTER_ISOC_CHANNELS, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	reg = cpu_to_le32(flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	return snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 				  LATTER_ISOC_START, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static void latter_finish_session(struct snd_ff *ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	reg = cpu_to_le32(0x00000000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	snd_fw_transaction(ff->unit, TCODE_WRITE_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 			   LATTER_ISOC_START, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static void latter_dump_status(struct snd_ff *ff, struct snd_info_buffer *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		char *const label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 		u32 locked_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		u32 synced_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	} *clk_entry, *clk_entries, ucx_clk_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 		{ "S/PDIF",	0x00000001, 0x00000010, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 		{ "ADAT",	0x00000002, 0x00000020, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		{ "WDClk",	0x00000004, 0x00000040, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	}, ufx_ff802_clk_entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		{ "WDClk",	0x00000001, 0x00000010, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		{ "AES/EBU",	0x00000002, 0x00000020, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		{ "ADAT-A",	0x00000004, 0x00000040, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		{ "ADAT-B",	0x00000008, 0x00000080, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	__le32 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	enum snd_ff_clock_src src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	const char *label;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	unsigned int clk_entry_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	err = snd_fw_transaction(ff->unit, TCODE_READ_QUADLET_REQUEST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 				 LATTER_SYNC_STATUS, &reg, sizeof(reg), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	data = le32_to_cpu(reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	snd_iprintf(buffer, "External source detection:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	if (ff->unit_version == SND_FF_UNIT_VERSION_UCX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		clk_entries = ucx_clk_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 		clk_entry_count = ARRAY_SIZE(ucx_clk_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 		clk_entries = ufx_ff802_clk_entries;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 		clk_entry_count = ARRAY_SIZE(ufx_ff802_clk_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	for (i = 0; i < clk_entry_count; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 		clk_entry = clk_entries + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 		snd_iprintf(buffer, "%s: ", clk_entry->label);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 		if (data & clk_entry->locked_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 			if (data & clk_entry->synced_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 				snd_iprintf(buffer, "sync\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 			else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 				snd_iprintf(buffer, "lock\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 			snd_iprintf(buffer, "none\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	err = parse_clock_bits(data, &rate, &src, ff->unit_version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	label = snd_ff_proc_get_clk_label(src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	if (!label)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	snd_iprintf(buffer, "Referred clock: %s %d\n", label, rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) // NOTE: transactions are transferred within 0x00-0x7f in allocated range of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) // address. This seems to be for check of discontinuity in receiver side.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) // Like Fireface 400, drivers can select one of 4 options for lower 4 bytes of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) // destination address by bit flags in quadlet register (little endian) at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) // 0x'ffff'0000'0014:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) // bit flags: offset of destination address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) // - 0x00002000: 0x'....'....'0000'0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) // - 0x00004000: 0x'....'....'0000'0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) // - 0x00008000: 0x'....'....'0000'0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) // - 0x00010000: 0x'....'....'0000'0180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) // Drivers can suppress the device to transfer asynchronous transactions by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) // clear these bit flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) // Actually, the register is write-only and includes the other settings such as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) // input attenuation. This driver allocates for the first option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) // (0x'....'....'0000'0000) and expects userspace application to configure the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) // register for it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static void latter_handle_midi_msg(struct snd_ff *ff, unsigned int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 				   __le32 *buf, size_t length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	u32 data = le32_to_cpu(*buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	unsigned int index = (data & 0x000000f0) >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	u8 byte[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	struct snd_rawmidi_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 	unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	if (index >= ff->spec->midi_in_ports)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	switch (data & 0x0000000f) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	case 0x00000008:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	case 0x00000009:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	case 0x0000000a:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	case 0x0000000b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	case 0x0000000e:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 		len = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 	case 0x0000000c:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	case 0x0000000d:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 		len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 		len = data & 0x00000003;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 		if (len == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 			len = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	byte[0] = (data & 0x0000ff00) >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 	byte[1] = (data & 0x00ff0000) >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	byte[2] = (data & 0xff000000) >> 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	substream = READ_ONCE(ff->tx_midi_substreams[index]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	if (substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 		snd_rawmidi_receive(substream, byte, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)  * When return minus value, given argument is not MIDI status.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)  * When return 0, given argument is a beginning of system exclusive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)  * When return the others, given argument is MIDI data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) static inline int calculate_message_bytes(u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 	switch (status) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 	case 0xf6:	/* Tune request. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 	case 0xf8:	/* Timing clock. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) 	case 0xfa:	/* Start. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 	case 0xfb:	/* Continue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) 	case 0xfc:	/* Stop. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 	case 0xfe:	/* Active sensing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 	case 0xff:	/* System reset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) 	case 0xf1:	/* MIDI time code quarter frame. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 	case 0xf3:	/* Song select. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) 		return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 	case 0xf2:	/* Song position pointer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 		return 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) 	case 0xf0:	/* Exclusive. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 	case 0xf7:	/* End of exclusive. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 	case 0xf4:	/* Undefined. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 	case 0xf5:	/* Undefined. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 	case 0xf9:	/* Undefined. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) 	case 0xfd:	/* Undefined. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 		switch (status & 0xf0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 		case 0x80:	/* Note on. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) 		case 0x90:	/* Note off. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) 		case 0xa0:	/* Polyphonic key pressure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 		case 0xb0:	/* Control change and Mode change. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) 		case 0xe0:	/* Pitch bend change. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 			return 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) 		case 0xc0:	/* Program change. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) 		case 0xd0:	/* Channel pressure. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) 			return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 		default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) 	break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int latter_fill_midi_msg(struct snd_ff *ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) 				struct snd_rawmidi_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 				unsigned int port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 	u32 data = {0};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 	u8 *buf = (u8 *)&data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) 	int consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 	buf[0] = port << 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 	consumed = snd_rawmidi_transmit_peek(substream, buf + 1, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 	if (consumed <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 		return consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) 	if (!ff->on_sysex[port]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 		if (buf[1] != 0xf0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 			if (consumed < calculate_message_bytes(buf[1]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 				return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) 			// The beginning of exclusives.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) 			ff->on_sysex[port] = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) 		buf[0] |= consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) 		if (buf[1] != 0xf7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) 			if (buf[2] == 0xf7 || buf[3] == 0xf7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) 				// Transfer end code at next time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 				consumed -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) 			buf[0] |= consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) 			// The end of exclusives.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 			ff->on_sysex[port] = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) 			consumed = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 			buf[0] |= 0x0f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 	ff->msg_buf[port][0] = cpu_to_le32(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) 	ff->rx_bytes[port] = consumed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) const struct snd_ff_protocol snd_ff_protocol_latter = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) 	.handle_midi_msg	= latter_handle_midi_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 	.fill_midi_msg		= latter_fill_midi_msg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) 	.get_clock		= latter_get_clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) 	.switch_fetching_mode	= latter_switch_fetching_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) 	.allocate_resources	= latter_allocate_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 	.begin_session		= latter_begin_session,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) 	.finish_session		= latter_finish_session,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 	.dump_status		= latter_dump_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) };