Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * digi00x-pcm.c - a part of driver for Digidesign Digi 002/003 family
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2014-2015 Takashi Sakamoto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include "digi00x.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) static int hw_rule_rate(struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 			struct snd_pcm_hw_rule *rule)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	struct snd_interval *r =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 		hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	const struct snd_interval *c =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 		hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_CHANNELS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	struct snd_interval t = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 		.min = UINT_MAX, .max = 0, .integer = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	for (i = 0; i < SND_DG00X_RATE_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 		if (!snd_interval_test(c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 				       snd_dg00x_stream_pcm_channels[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 		t.min = min(t.min, snd_dg00x_stream_rates[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 		t.max = max(t.max, snd_dg00x_stream_rates[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	return snd_interval_refine(r, &t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static int hw_rule_channels(struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 			    struct snd_pcm_hw_rule *rule)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct snd_interval *c =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	const struct snd_interval *r =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		hw_param_interval_c(params, SNDRV_PCM_HW_PARAM_RATE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct snd_interval t = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		.min = UINT_MAX, .max = 0, .integer = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	unsigned int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	for (i = 0; i < SND_DG00X_RATE_COUNT; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		if (!snd_interval_test(r, snd_dg00x_stream_rates[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		t.min = min(t.min, snd_dg00x_stream_pcm_channels[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		t.max = max(t.max, snd_dg00x_stream_pcm_channels[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	return snd_interval_refine(c, &t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static int pcm_init_hw_params(struct snd_dg00x *dg00x,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 			      struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct snd_pcm_runtime *runtime = substream->runtime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	struct snd_pcm_hardware *hw = &runtime->hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	struct amdtp_stream *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		substream->runtime->hw.formats = SNDRV_PCM_FMTBIT_S32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		s = &dg00x->tx_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		substream->runtime->hw.formats = SNDRV_PCM_FMTBIT_S32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		s = &dg00x->rx_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	hw->channels_min = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	hw->channels_max = 18;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	hw->rates = SNDRV_PCM_RATE_44100 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		    SNDRV_PCM_RATE_48000 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		    SNDRV_PCM_RATE_88200 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		    SNDRV_PCM_RATE_96000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	snd_pcm_limit_hw_rates(runtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	err = snd_pcm_hw_rule_add(substream->runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				  SNDRV_PCM_HW_PARAM_CHANNELS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 				  hw_rule_channels, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 				  SNDRV_PCM_HW_PARAM_RATE, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	err = snd_pcm_hw_rule_add(substream->runtime, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 				  SNDRV_PCM_HW_PARAM_RATE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 				  hw_rule_rate, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 				  SNDRV_PCM_HW_PARAM_CHANNELS, -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return amdtp_dot_add_pcm_hw_constraints(s, substream->runtime);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static int pcm_open(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	struct amdtp_domain *d = &dg00x->domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	enum snd_dg00x_clock clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	bool detect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	err = snd_dg00x_stream_lock_try(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	err = pcm_init_hw_params(dg00x, substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 		goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	/* Check current clock source. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	err = snd_dg00x_stream_get_clock(dg00x, &clock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	if (clock != SND_DG00X_CLOCK_INTERNAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		err = snd_dg00x_stream_check_external_clock(dg00x, &detect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 			goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 		if (!detect) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 			err = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 			goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	mutex_lock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	// When source of clock is not internal or any stream is reserved for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	// transmission of PCM frames, the available sampling rate is limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	// at current one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if ((clock != SND_DG00X_CLOCK_INTERNAL) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	    (dg00x->substreams_counter > 0 && d->events_per_period > 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		unsigned int frames_per_period = d->events_per_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		unsigned int frames_per_buffer = d->events_per_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		err = snd_dg00x_stream_get_external_rate(dg00x, &rate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 			mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 			goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		substream->runtime->hw.rate_min = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		substream->runtime->hw.rate_max = rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		if (frames_per_period > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 			err = snd_pcm_hw_constraint_minmax(substream->runtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 					SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 					frames_per_period, frames_per_period);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 			if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 				mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 				goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			err = snd_pcm_hw_constraint_minmax(substream->runtime,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 					SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 					frames_per_buffer, frames_per_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 				mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 				goto err_locked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	snd_pcm_set_sync(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) err_locked:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	snd_dg00x_stream_lock_release(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static int pcm_close(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	snd_dg00x_stream_lock_release(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) static int pcm_hw_params(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 			 struct snd_pcm_hw_params *hw_params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 		unsigned int rate = params_rate(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 		unsigned int frames_per_period = params_period_size(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		unsigned int frames_per_buffer = params_buffer_size(hw_params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		mutex_lock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		err = snd_dg00x_stream_reserve_duplex(dg00x, rate,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 					frames_per_period, frames_per_buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		if (err >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			++dg00x->substreams_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static int pcm_hw_free(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	mutex_lock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	if (substream->runtime->status->state != SNDRV_PCM_STATE_OPEN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		--dg00x->substreams_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	snd_dg00x_stream_stop_duplex(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int pcm_capture_prepare(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	mutex_lock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	err = snd_dg00x_stream_start_duplex(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	if (err >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		amdtp_stream_pcm_prepare(&dg00x->tx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int pcm_playback_prepare(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	mutex_lock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	err = snd_dg00x_stream_start_duplex(dg00x);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	if (err >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 		amdtp_stream_pcm_prepare(&dg00x->rx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		amdtp_dot_reset(&dg00x->rx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	mutex_unlock(&dg00x->mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static int pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		amdtp_stream_pcm_trigger(&dg00x->tx_stream, substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		amdtp_stream_pcm_trigger(&dg00x->tx_stream, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static int pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	case SNDRV_PCM_TRIGGER_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		amdtp_stream_pcm_trigger(&dg00x->rx_stream, substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	case SNDRV_PCM_TRIGGER_STOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		amdtp_stream_pcm_trigger(&dg00x->rx_stream, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static snd_pcm_uframes_t pcm_capture_pointer(struct snd_pcm_substream *sbstrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	struct snd_dg00x *dg00x = sbstrm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	return amdtp_domain_stream_pcm_pointer(&dg00x->domain, &dg00x->tx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) static snd_pcm_uframes_t pcm_playback_pointer(struct snd_pcm_substream *sbstrm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	struct snd_dg00x *dg00x = sbstrm->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	return amdtp_domain_stream_pcm_pointer(&dg00x->domain, &dg00x->rx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) static int pcm_capture_ack(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	return amdtp_domain_stream_pcm_ack(&dg00x->domain, &dg00x->tx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static int pcm_playback_ack(struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	struct snd_dg00x *dg00x = substream->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	return amdtp_domain_stream_pcm_ack(&dg00x->domain, &dg00x->rx_stream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	static const struct snd_pcm_ops capture_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		.open		= pcm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		.close		= pcm_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		.hw_params	= pcm_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		.hw_free	= pcm_hw_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		.prepare	= pcm_capture_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		.trigger	= pcm_capture_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		.pointer	= pcm_capture_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		.ack		= pcm_capture_ack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	static const struct snd_pcm_ops playback_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 		.open		= pcm_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 		.close		= pcm_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 		.hw_params	= pcm_hw_params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 		.hw_free	= pcm_hw_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 		.prepare	= pcm_playback_prepare,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 		.trigger	= pcm_playback_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 		.pointer	= pcm_playback_pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 		.ack		= pcm_playback_ack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	err = snd_pcm_new(dg00x->card, dg00x->card->driver, 0, 1, 1, &pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	pcm->private_data = dg00x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	snprintf(pcm->name, sizeof(pcm->name),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 		 "%s PCM", dg00x->card->shortname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &playback_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &capture_ops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC, NULL, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }