^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // dice-presonus.c - a part of driver for DICE based devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Copyright (c) 2019 Takashi Sakamoto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Licensed under the terms of the GNU General Public License, version 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include "dice.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) struct dice_presonus_spec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) unsigned int tx_pcm_chs[MAX_STREAMS][SND_DICE_RATE_MODE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) unsigned int rx_pcm_chs[MAX_STREAMS][SND_DICE_RATE_MODE_COUNT];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) bool has_midi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) static const struct dice_presonus_spec dice_presonus_firesutio = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) .tx_pcm_chs = {{16, 16, 0}, {10, 2, 0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .rx_pcm_chs = {{16, 16, 0}, {10, 2, 0} },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) .has_midi = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int snd_dice_detect_presonus_formats(struct snd_dice *dice)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u32 model_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) const struct dice_presonus_spec *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) } *entry, entries[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {0x000008, &dice_presonus_firesutio},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct fw_csr_iterator it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int key, val, model_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) model_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) fw_csr_iterator_init(&it, dice->unit->directory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) while (fw_csr_iterator_next(&it, &key, &val)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (key == CSR_MODEL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) model_id = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) for (i = 0; i < ARRAY_SIZE(entries); ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) entry = entries + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (entry->model_id == model_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if (i == ARRAY_SIZE(entries))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) memcpy(dice->tx_pcm_chs, entry->spec->tx_pcm_chs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) MAX_STREAMS * SND_DICE_RATE_MODE_COUNT * sizeof(unsigned int));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) memcpy(dice->rx_pcm_chs, entry->spec->rx_pcm_chs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) MAX_STREAMS * SND_DICE_RATE_MODE_COUNT * sizeof(unsigned int));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (entry->spec->has_midi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) dice->tx_midi_ports[0] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) dice->rx_midi_ports[0] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }