^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Digigram VX soundcards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * DSP firmware management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/firmware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/hwdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <sound/vx_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) MODULE_FIRMWARE("vx/bx_1_vxp.b56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) MODULE_FIRMWARE("vx/bx_1_vp4.b56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MODULE_FIRMWARE("vx/x1_1_vx2.xlx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MODULE_FIRMWARE("vx/x1_2_v22.xlx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MODULE_FIRMWARE("vx/x1_1_vxp.xlx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MODULE_FIRMWARE("vx/x1_1_vp4.xlx");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) MODULE_FIRMWARE("vx/bd56002.boot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) MODULE_FIRMWARE("vx/bd563v2.boot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) MODULE_FIRMWARE("vx/bd563s3.boot");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) MODULE_FIRMWARE("vx/l_1_vx2.d56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) MODULE_FIRMWARE("vx/l_1_v22.d56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) MODULE_FIRMWARE("vx/l_1_vxp.d56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) MODULE_FIRMWARE("vx/l_1_vp4.d56");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) int snd_vx_setup_firmware(struct vx_core *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static const char * const fw_files[VX_TYPE_NUMS][4] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) [VX_TYPE_BOARD] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) NULL, "x1_1_vx2.xlx", "bd56002.boot", "l_1_vx2.d56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) [VX_TYPE_V2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) NULL, "x1_2_v22.xlx", "bd563v2.boot", "l_1_v22.d56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) [VX_TYPE_MIC] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) NULL, "x1_2_v22.xlx", "bd563v2.boot", "l_1_v22.d56",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [VX_TYPE_VXPOCKET] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "bx_1_vxp.b56", "x1_1_vxp.xlx", "bd563s3.boot", "l_1_vxp.d56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) [VX_TYPE_VXP440] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "bx_1_vp4.b56", "x1_1_vp4.xlx", "bd563s3.boot", "l_1_vp4.d56"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for (i = 0; i < 4; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) char path[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) if (! fw_files[chip->type][i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) sprintf(path, "vx/%s", fw_files[chip->type][i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (request_firmware(&fw, path, chip->dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) snd_printk(KERN_ERR "vx: can't load firmware %s\n", path);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) err = chip->ops->load_dsp(chip, i, fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (i == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) chip->chip_status |= VX_STAT_XILINX_LOADED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) chip->firmware[i] = fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) release_firmware(fw);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* ok, we reached to the last one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* create the devices if not built yet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if ((err = snd_vx_pcm_new(chip)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if ((err = snd_vx_mixer_new(chip)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (chip->ops->add_controls)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if ((err = chip->ops->add_controls(chip)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) chip->chip_status |= VX_STAT_DEVICE_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) chip->chip_status |= VX_STAT_CHIP_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) return snd_card_register(chip->card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* exported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) void snd_vx_free_firmware(struct vx_core *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) for (i = 0; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) release_firmware(chip->firmware[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) EXPORT_SYMBOL(snd_vx_setup_firmware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) EXPORT_SYMBOL(snd_vx_free_firmware);