^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * serial.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Isaku Yamahata <yamahata@private.email.ne.jp>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * George Hansper <ghansper@apana.org.au>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Hannu Savolainen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This code is based on the code from ALSA 0.5.9, but heavily rewritten.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Sat Mar 31 17:27:57 PST 2001 tim.mann@compaq.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Added support for the Midiator MS-124T and for the MS-124W in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Single Addressed (S/A) or Multiple Burst (M/B) mode, with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * power derived either parasitically from the serial port or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * from a separate power supply.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * More documentation can be found in serial-u16550.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <sound/core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <sound/rawmidi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <sound/initval.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/serial_reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) MODULE_DESCRIPTION("MIDI serial u16550");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) MODULE_SUPPORTED_DEVICE("{{ALSA, MIDI serial u16550}}");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SNDRV_SERIAL_SOUNDCANVAS 0 /* Roland Soundcanvas; F5 NN selects part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define SNDRV_SERIAL_MS124T 1 /* Midiator MS-124T */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define SNDRV_SERIAL_MS124W_SA 2 /* Midiator MS-124W in S/A mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define SNDRV_SERIAL_MS124W_MB 3 /* Midiator MS-124W in M/B mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define SNDRV_SERIAL_GENERIC 4 /* Generic Interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define SNDRV_SERIAL_MAX_ADAPTOR SNDRV_SERIAL_GENERIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static const char * const adaptor_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "Soundcanvas",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) "MS-124T",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) "MS-124W S/A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "MS-124W M/B",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) "Generic"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define SNDRV_SERIAL_NORMALBUFF 0 /* Normal blocking buffer operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SNDRV_SERIAL_DROPBUFF 1 /* Non-blocking discard operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE; /* Enable this card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static long port[SNDRV_CARDS] = SNDRV_DEFAULT_PORT; /* 0x3f8,0x2f8,0x3e8,0x2e8 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int irq[SNDRV_CARDS] = SNDRV_DEFAULT_IRQ; /* 3,4,5,7,9,10,11,14,15 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static int speed[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 38400}; /* 9600,19200,38400,57600,115200 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int base[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 115200}; /* baud base */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) static int outs[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1}; /* 1 to 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static int ins[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1}; /* 1 to 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int adaptor[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = SNDRV_SERIAL_SOUNDCANVAS};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static bool droponfull[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS -1)] = SNDRV_SERIAL_NORMALBUFF };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) module_param_array(index, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MODULE_PARM_DESC(index, "Index value for Serial MIDI.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) module_param_array(id, charp, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MODULE_PARM_DESC(id, "ID string for Serial MIDI.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) module_param_array(enable, bool, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) MODULE_PARM_DESC(enable, "Enable UART16550A chip.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) module_param_hw_array(port, long, ioport, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MODULE_PARM_DESC(port, "Port # for UART16550A chip.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) module_param_hw_array(irq, int, irq, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MODULE_PARM_DESC(irq, "IRQ # for UART16550A chip.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) module_param_array(speed, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MODULE_PARM_DESC(speed, "Speed in bauds.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) module_param_array(base, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MODULE_PARM_DESC(base, "Base for divisor in bauds.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) module_param_array(outs, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_PARM_DESC(outs, "Number of MIDI outputs.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) module_param_array(ins, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MODULE_PARM_DESC(ins, "Number of MIDI inputs.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) module_param_array(droponfull, bool, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MODULE_PARM_DESC(droponfull, "Flag to enable drop-on-full buffer mode");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) module_param_array(adaptor, int, NULL, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) MODULE_PARM_DESC(adaptor, "Type of adaptor.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*#define SNDRV_SERIAL_MS124W_MB_NOCOMBO 1*/ /* Address outs as 0-3 instead of bitmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define SNDRV_SERIAL_MAX_OUTS 16 /* max 64, min 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define SNDRV_SERIAL_MAX_INS 16 /* max 64, min 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define TX_BUFF_SIZE (1<<15) /* Must be 2^n */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define TX_BUFF_MASK (TX_BUFF_SIZE - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define SERIAL_MODE_NOT_OPENED (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define SERIAL_MODE_INPUT_OPEN (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define SERIAL_MODE_OUTPUT_OPEN (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define SERIAL_MODE_INPUT_TRIGGERED (1 << 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define SERIAL_MODE_OUTPUT_TRIGGERED (1 << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct snd_uart16550 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct snd_rawmidi *rmidi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) struct snd_rawmidi_substream *midi_output[SNDRV_SERIAL_MAX_OUTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct snd_rawmidi_substream *midi_input[SNDRV_SERIAL_MAX_INS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int filemode; /* open status of file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) spinlock_t open_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct resource *res_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned int speed_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) unsigned char divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned char old_divisor_lsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned char old_divisor_msb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned char old_line_ctrl_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* parameter for using of write loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) short int fifo_limit; /* used in uart16550 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) short int fifo_count; /* used in uart16550 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* type of adaptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) int adaptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int prev_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) unsigned char rstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) int prev_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) unsigned char prev_status[SNDRV_SERIAL_MAX_OUTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) /* write buffer and its writing/reading position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned char tx_buff[TX_BUFF_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) int buff_in_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) int buff_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) int buff_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) int drop_on_full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* wait timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) unsigned int timer_running:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct timer_list buffer_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct platform_device *devices[SNDRV_CARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static inline void snd_uart16550_add_timer(struct snd_uart16550 *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (!uart->timer_running) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* timer 38600bps * 10bit * 16byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mod_timer(&uart->buffer_timer, jiffies + (HZ + 255) / 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) uart->timer_running = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static inline void snd_uart16550_del_timer(struct snd_uart16550 *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (uart->timer_running) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) del_timer(&uart->buffer_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) uart->timer_running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* This macro is only used in snd_uart16550_io_loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static inline void snd_uart16550_buffer_output(struct snd_uart16550 *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) unsigned short buff_out = uart->buff_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (uart->buff_in_count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) outb(uart->tx_buff[buff_out], uart->base + UART_TX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) uart->fifo_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) buff_out++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) buff_out &= TX_BUFF_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) uart->buff_out = buff_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) uart->buff_in_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* This loop should be called with interrupts disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * We don't want to interrupt this,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * as we're already handling an interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static void snd_uart16550_io_loop(struct snd_uart16550 * uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned char c, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* recall previous stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) substream = uart->prev_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Read Loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) while ((status = inb(uart->base + UART_LSR)) & UART_LSR_DR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* while receive data ready */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) c = inb(uart->base + UART_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* keep track of last status byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (c & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) uart->rstatus = c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* handle stream switch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (uart->adaptor == SNDRV_SERIAL_GENERIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (uart->rstatus == 0xf5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (c <= SNDRV_SERIAL_MAX_INS && c > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) substream = c - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (c != 0xf5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) /* prevent future bytes from being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) interpreted as streams */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) uart->rstatus = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) } else if ((uart->filemode & SERIAL_MODE_INPUT_OPEN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) && uart->midi_input[substream])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) snd_rawmidi_receive(uart->midi_input[substream],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) &c, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) } else if ((uart->filemode & SERIAL_MODE_INPUT_OPEN) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) uart->midi_input[substream])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) snd_rawmidi_receive(uart->midi_input[substream], &c, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (status & UART_LSR_OE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) snd_printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) "%s: Overrun on device at 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) uart->rmidi->name, uart->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* remember the last stream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) uart->prev_in = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* no need of check SERIAL_MODE_OUTPUT_OPEN because if not,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) buffer is never filled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* Check write status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (status & UART_LSR_THRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) uart->fifo_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (uart->adaptor == SNDRV_SERIAL_MS124W_SA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) || uart->adaptor == SNDRV_SERIAL_GENERIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Can't use FIFO, must send only when CTS is true */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) status = inb(uart->base + UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) while (uart->fifo_count == 0 && (status & UART_MSR_CTS) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) uart->buff_in_count > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) snd_uart16550_buffer_output(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) status = inb(uart->base + UART_MSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* Write loop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) while (uart->fifo_count < uart->fifo_limit /* Can we write ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) && uart->buff_in_count > 0) /* Do we want to? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) snd_uart16550_buffer_output(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (uart->irq < 0 && uart->buff_in_count > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) snd_uart16550_add_timer(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* NOTES ON SERVICING INTERUPTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) * ---------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * After receiving a interrupt, it is important to indicate to the UART that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) * this has been done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) * For a Rx interrupt, this is done by reading the received byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * For a Tx interrupt this is done by either:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) * a) Writing a byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * b) Reading the IIR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * It is particularly important to read the IIR if a Tx interrupt is received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * when there is no data in tx_buff[], as in this case there no other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * indication that the interrupt has been serviced, and it remains outstanding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * indefinitely. This has the curious side effect that and no further interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * will be generated from this device AT ALL!!.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * It is also desirable to clear outstanding interrupts when the device is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * opened/closed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * Note that some devices need OUT2 to be set before they will generate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * interrupts at all. (Possibly tied to an internal pull-up on CTS?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static irqreturn_t snd_uart16550_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) struct snd_uart16550 *uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) uart = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) spin_lock(&uart->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (uart->filemode == SERIAL_MODE_NOT_OPENED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) spin_unlock(&uart->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* indicate to the UART that the interrupt has been serviced */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) inb(uart->base + UART_IIR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) snd_uart16550_io_loop(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) spin_unlock(&uart->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* When the polling mode, this function calls snd_uart16550_io_loop. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static void snd_uart16550_buffer_timer(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) struct snd_uart16550 *uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) uart = from_timer(uart, t, buffer_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) snd_uart16550_del_timer(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) snd_uart16550_io_loop(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * this method probes, if an uart sits on given port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * return 0 if found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * return negative error if not found
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static int snd_uart16550_detect(struct snd_uart16550 *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) unsigned long io_base = uart->base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) int ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) unsigned char c;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* Do some vague tests for the presence of the uart */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (io_base == 0 || io_base == SNDRV_AUTO_PORT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) return -ENODEV; /* Not configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) uart->res_base = request_region(io_base, 8, "Serial MIDI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (uart->res_base == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) snd_printk(KERN_ERR "u16550: can't grab port 0x%lx\n", io_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* uart detected unless one of the following tests should fail */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ok = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) /* 8 data-bits, 1 stop-bit, parity off, DLAB = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) outb(UART_LCR_WLEN8, io_base + UART_LCR); /* Line Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) c = inb(io_base + UART_IER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* The top four bits of the IER should always == 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if ((c & 0xf0) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ok = 0; /* failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) outb(0xaa, io_base + UART_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) /* Write arbitrary data into the scratch reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) c = inb(io_base + UART_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* If it comes back, it's OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) if (c != 0xaa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) ok = 0; /* failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) outb(0x55, io_base + UART_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) /* Write arbitrary data into the scratch reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) c = inb(io_base + UART_SCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* If it comes back, it's OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (c != 0x55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) ok = 0; /* failed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return ok;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static void snd_uart16550_do_open(struct snd_uart16550 * uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) char byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* Initialize basic variables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) uart->buff_in_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) uart->buff_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) uart->buff_out = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) uart->fifo_limit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) uart->fifo_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) uart->timer_running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) outb(UART_FCR_ENABLE_FIFO /* Enable FIFO's (if available) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) | UART_FCR_CLEAR_RCVR /* Clear receiver FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) | UART_FCR_CLEAR_XMIT /* Clear transmitter FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) | UART_FCR_TRIGGER_4 /* Set FIFO trigger at 4-bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) /* NOTE: interrupt generated after T=(time)4-bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * if less than UART_FCR_TRIGGER bytes received
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ,uart->base + UART_FCR); /* FIFO Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if ((inb(uart->base + UART_IIR) & 0xf0) == 0xc0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) uart->fifo_limit = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (uart->divisor != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) uart->old_line_ctrl_reg = inb(uart->base + UART_LCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) outb(UART_LCR_DLAB /* Divisor latch access bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ,uart->base + UART_LCR); /* Line Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) uart->old_divisor_lsb = inb(uart->base + UART_DLL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) uart->old_divisor_msb = inb(uart->base + UART_DLM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) outb(uart->divisor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ,uart->base + UART_DLL); /* Divisor Latch Low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) outb(0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) ,uart->base + UART_DLM); /* Divisor Latch High */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* DLAB is reset to 0 in next outb() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Set serial parameters (parity off, etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) outb(UART_LCR_WLEN8 /* 8 data-bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) | 0 /* 1 stop-bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) | 0 /* parity off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) | 0 /* DLAB = 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) ,uart->base + UART_LCR); /* Line Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) switch (uart->adaptor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) outb(UART_MCR_RTS /* Set Request-To-Send line active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) | UART_MCR_DTR /* Set Data-Terminal-Ready line active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) | UART_MCR_OUT2 /* Set OUT2 - not always required, but when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * it is, it is ESSENTIAL for enabling interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) ,uart->base + UART_MCR); /* Modem Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case SNDRV_SERIAL_MS124W_SA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) case SNDRV_SERIAL_MS124W_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) /* MS-124W can draw power from RTS and DTR if they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) are in opposite states. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) outb(UART_MCR_RTS | (0&UART_MCR_DTR) | UART_MCR_OUT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) case SNDRV_SERIAL_MS124T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) /* MS-124T can draw power from RTS and/or DTR (preferably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) both) if they are both asserted. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) outb(UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (uart->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) byte = (0 & UART_IER_RDI) /* Disable Receiver data interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) |(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) } else if (uart->adaptor == SNDRV_SERIAL_MS124W_SA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) byte = UART_IER_RDI /* Enable Receiver data interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) | UART_IER_MSI /* Enable Modem status interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) } else if (uart->adaptor == SNDRV_SERIAL_GENERIC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) byte = UART_IER_RDI /* Enable Receiver data interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) | UART_IER_MSI /* Enable Modem status interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) | UART_IER_THRI /* Enable Transmitter holding register empty interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) byte = UART_IER_RDI /* Enable Receiver data interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) | UART_IER_THRI /* Enable Transmitter holding register empty interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) outb(byte, uart->base + UART_IER); /* Interrupt enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) inb(uart->base + UART_LSR); /* Clear any pre-existing overrun indication */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) inb(uart->base + UART_IIR); /* Clear any pre-existing transmit interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) inb(uart->base + UART_RX); /* Clear any pre-existing receive interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) static void snd_uart16550_do_close(struct snd_uart16550 * uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (uart->irq < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) snd_uart16550_del_timer(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* NOTE: may need to disable interrupts before de-registering out handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) * For now, the consequences are harmless.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) outb((0 & UART_IER_RDI) /* Disable Receiver data interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) |(0 & UART_IER_THRI) /* Disable Transmitter holding register empty interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ,uart->base + UART_IER); /* Interrupt enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) switch (uart->adaptor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) outb((0 & UART_MCR_RTS) /* Deactivate Request-To-Send line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) |(0 & UART_MCR_DTR) /* Deactivate Data-Terminal-Ready line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) |(0 & UART_MCR_OUT2) /* Deactivate OUT2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) ,uart->base + UART_MCR); /* Modem Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case SNDRV_SERIAL_MS124W_SA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) case SNDRV_SERIAL_MS124W_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* MS-124W can draw power from RTS and DTR if they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) are in opposite states; leave it powered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) outb(UART_MCR_RTS | (0&UART_MCR_DTR) | (0&UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) case SNDRV_SERIAL_MS124T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /* MS-124T can draw power from RTS and/or DTR (preferably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) both) if they are both asserted; leave it powered. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) outb(UART_MCR_RTS | UART_MCR_DTR | (0&UART_MCR_OUT2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) inb(uart->base + UART_IIR); /* Clear any outstanding interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* Restore old divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (uart->divisor != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) outb(UART_LCR_DLAB /* Divisor latch access bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) ,uart->base + UART_LCR); /* Line Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) outb(uart->old_divisor_lsb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ,uart->base + UART_DLL); /* Divisor Latch Low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) outb(uart->old_divisor_msb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ,uart->base + UART_DLM); /* Divisor Latch High */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* Restore old LCR (data bits, stop bits, parity, DLAB) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) outb(uart->old_line_ctrl_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) ,uart->base + UART_LCR); /* Line Control Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) static int snd_uart16550_input_open(struct snd_rawmidi_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (uart->filemode == SERIAL_MODE_NOT_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) snd_uart16550_do_open(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) uart->filemode |= SERIAL_MODE_INPUT_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) uart->midi_input[substream->number] = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) static int snd_uart16550_input_close(struct snd_rawmidi_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) uart->filemode &= ~SERIAL_MODE_INPUT_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) uart->midi_input[substream->number] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (uart->filemode == SERIAL_MODE_NOT_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) snd_uart16550_do_close(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) static void snd_uart16550_input_trigger(struct snd_rawmidi_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) int up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) uart->filemode |= SERIAL_MODE_INPUT_TRIGGERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) uart->filemode &= ~SERIAL_MODE_INPUT_TRIGGERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) static int snd_uart16550_output_open(struct snd_rawmidi_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (uart->filemode == SERIAL_MODE_NOT_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) snd_uart16550_do_open(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) uart->filemode |= SERIAL_MODE_OUTPUT_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) uart->midi_output[substream->number] = substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static int snd_uart16550_output_close(struct snd_rawmidi_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) uart->filemode &= ~SERIAL_MODE_OUTPUT_OPEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) uart->midi_output[substream->number] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (uart->filemode == SERIAL_MODE_NOT_OPENED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) snd_uart16550_do_close(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) static inline int snd_uart16550_buffer_can_write(struct snd_uart16550 *uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) int Num)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (uart->buff_in_count + Num < TX_BUFF_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static inline int snd_uart16550_write_buffer(struct snd_uart16550 *uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) unsigned char byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) unsigned short buff_in = uart->buff_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (uart->buff_in_count < TX_BUFF_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) uart->tx_buff[buff_in] = byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) buff_in++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) buff_in &= TX_BUFF_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) uart->buff_in = buff_in;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) uart->buff_in_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (uart->irq < 0) /* polling mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) snd_uart16550_add_timer(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static int snd_uart16550_output_byte(struct snd_uart16550 *uart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) struct snd_rawmidi_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) unsigned char midi_byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (uart->buff_in_count == 0 /* Buffer empty? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) && ((uart->adaptor != SNDRV_SERIAL_MS124W_SA &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) uart->adaptor != SNDRV_SERIAL_GENERIC) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) (uart->fifo_count == 0 /* FIFO empty? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) && (inb(uart->base + UART_MSR) & UART_MSR_CTS)))) { /* CTS? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* Tx Buffer Empty - try to write immediately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if ((inb(uart->base + UART_LSR) & UART_LSR_THRE) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* Transmitter holding register (and Tx FIFO) empty */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) uart->fifo_count = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) outb(midi_byte, uart->base + UART_TX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (uart->fifo_count < uart->fifo_limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) uart->fifo_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) outb(midi_byte, uart->base + UART_TX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* Cannot write (buffer empty) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) * put char in buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) snd_uart16550_write_buffer(uart, midi_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (!snd_uart16550_write_buffer(uart, midi_byte)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) snd_printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) "%s: Buffer overrun on device at 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) uart->rmidi->name, uart->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) static void snd_uart16550_output_write(struct snd_rawmidi_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) unsigned char midi_byte, addr_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) char first;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) static unsigned long lasttime = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) /* Interrupts are disabled during the updating of the tx_buff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) * since it is 'bad' to have two processes updating the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) * variables (ie buff_in & buff_out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (uart->irq < 0) /* polling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) snd_uart16550_io_loop(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (uart->adaptor == SNDRV_SERIAL_MS124W_MB) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) while (1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) /* buffer full? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /* in this mode we need two bytes of space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (uart->buff_in_count > TX_BUFF_SIZE - 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (snd_rawmidi_transmit(substream, &midi_byte, 1) != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) #ifdef SNDRV_SERIAL_MS124W_MB_NOCOMBO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) /* select exactly one of the four ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) addr_byte = (1 << (substream->number + 4)) | 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* select any combination of the four ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) addr_byte = (substream->number << 4) | 0x08;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /* ...except none */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (addr_byte == 0x08)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) addr_byte = 0xf8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) snd_uart16550_output_byte(uart, substream, addr_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) /* send midi byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) snd_uart16550_output_byte(uart, substream, midi_byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) first = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) while (snd_rawmidi_transmit_peek(substream, &midi_byte, 1) == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /* Also send F5 after 3 seconds with no data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * to handle device disconnect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (first == 0 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) (uart->adaptor == SNDRV_SERIAL_SOUNDCANVAS ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) uart->adaptor == SNDRV_SERIAL_GENERIC) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) (uart->prev_out != substream->number ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) time_after(jiffies, lasttime + 3*HZ))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) if (snd_uart16550_buffer_can_write(uart, 3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) /* Roland Soundcanvas part selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) /* If this substream of the data is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) * different previous substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * in this uart, send the change part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * event
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) uart->prev_out = substream->number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /* change part */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) snd_uart16550_output_byte(uart, substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) 0xf5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /* data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) snd_uart16550_output_byte(uart, substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) uart->prev_out + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) /* If midi_byte is a data byte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * send the previous status byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if (midi_byte < 0x80 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) uart->adaptor == SNDRV_SERIAL_SOUNDCANVAS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) snd_uart16550_output_byte(uart, substream, uart->prev_status[uart->prev_out]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) } else if (!uart->drop_on_full)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /* send midi byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) if (!snd_uart16550_output_byte(uart, substream, midi_byte) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) !uart->drop_on_full )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (midi_byte >= 0x80 && midi_byte < 0xf0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) uart->prev_status[uart->prev_out] = midi_byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) first = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) snd_rawmidi_transmit_ack( substream, 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) lasttime = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static void snd_uart16550_output_trigger(struct snd_rawmidi_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) int up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) struct snd_uart16550 *uart = substream->rmidi->private_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) spin_lock_irqsave(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) if (up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) uart->filemode |= SERIAL_MODE_OUTPUT_TRIGGERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) uart->filemode &= ~SERIAL_MODE_OUTPUT_TRIGGERED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) spin_unlock_irqrestore(&uart->open_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) if (up)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) snd_uart16550_output_write(substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static const struct snd_rawmidi_ops snd_uart16550_output =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .open = snd_uart16550_output_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .close = snd_uart16550_output_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .trigger = snd_uart16550_output_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) static const struct snd_rawmidi_ops snd_uart16550_input =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) .open = snd_uart16550_input_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) .close = snd_uart16550_input_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) .trigger = snd_uart16550_input_trigger,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) static int snd_uart16550_free(struct snd_uart16550 *uart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) if (uart->irq >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) free_irq(uart->irq, uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) release_and_free_resource(uart->res_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) kfree(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) static int snd_uart16550_dev_free(struct snd_device *device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) struct snd_uart16550 *uart = device->device_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) return snd_uart16550_free(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) static int snd_uart16550_create(struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) unsigned long iobase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) unsigned int speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) unsigned int base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) int adaptor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) int droponfull,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) struct snd_uart16550 **ruart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static const struct snd_device_ops ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .dev_free = snd_uart16550_dev_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) struct snd_uart16550 *uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if ((uart = kzalloc(sizeof(*uart), GFP_KERNEL)) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) uart->adaptor = adaptor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) uart->card = card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) spin_lock_init(&uart->open_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) uart->irq = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) uart->base = iobase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) uart->drop_on_full = droponfull;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if ((err = snd_uart16550_detect(uart)) <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) printk(KERN_ERR "no UART detected at 0x%lx\n", iobase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) snd_uart16550_free(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (irq >= 0 && irq != SNDRV_AUTO_IRQ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) if (request_irq(irq, snd_uart16550_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) 0, "Serial MIDI", uart)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) snd_printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) "irq %d busy. Using Polling.\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) uart->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) uart->divisor = base / speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) uart->speed = base / (unsigned int)uart->divisor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) uart->speed_base = base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) uart->prev_out = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) uart->prev_in = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) uart->rstatus = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) memset(uart->prev_status, 0x80, sizeof(unsigned char) * SNDRV_SERIAL_MAX_OUTS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) timer_setup(&uart->buffer_timer, snd_uart16550_buffer_timer, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) uart->timer_running = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /* Register device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, uart, &ops)) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) snd_uart16550_free(uart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) switch (uart->adaptor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) case SNDRV_SERIAL_MS124W_SA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) case SNDRV_SERIAL_MS124W_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* MS-124W can draw power from RTS and DTR if they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) are in opposite states. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) outb(UART_MCR_RTS | (0&UART_MCR_DTR), uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) case SNDRV_SERIAL_MS124T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /* MS-124T can draw power from RTS and/or DTR (preferably
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) both) if they are asserted. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) outb(UART_MCR_RTS | UART_MCR_DTR, uart->base + UART_MCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) if (ruart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) *ruart = uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static void snd_uart16550_substreams(struct snd_rawmidi_str *stream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) struct snd_rawmidi_substream *substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) list_for_each_entry(substream, &stream->substreams, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) sprintf(substream->name, "Serial MIDI %d", substream->number + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) static int snd_uart16550_rmidi(struct snd_uart16550 *uart, int device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) int outs, int ins,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) struct snd_rawmidi **rmidi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) struct snd_rawmidi *rrawmidi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) err = snd_rawmidi_new(uart->card, "UART Serial MIDI", device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) outs, ins, &rrawmidi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) snd_rawmidi_set_ops(rrawmidi, SNDRV_RAWMIDI_STREAM_INPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) &snd_uart16550_input);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) snd_rawmidi_set_ops(rrawmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) &snd_uart16550_output);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) strcpy(rrawmidi->name, "Serial MIDI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) snd_uart16550_substreams(&rrawmidi->streams[SNDRV_RAWMIDI_STREAM_OUTPUT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) snd_uart16550_substreams(&rrawmidi->streams[SNDRV_RAWMIDI_STREAM_INPUT]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) rrawmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) SNDRV_RAWMIDI_INFO_INPUT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) SNDRV_RAWMIDI_INFO_DUPLEX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) rrawmidi->private_data = uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) if (rmidi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) *rmidi = rrawmidi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) static int snd_serial_probe(struct platform_device *devptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) struct snd_uart16550 *uart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) int dev = devptr->id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) switch (adaptor[dev]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) case SNDRV_SERIAL_SOUNDCANVAS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) ins[dev] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) case SNDRV_SERIAL_MS124T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) case SNDRV_SERIAL_MS124W_SA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) outs[dev] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) ins[dev] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) case SNDRV_SERIAL_MS124W_MB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) outs[dev] = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) ins[dev] = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) case SNDRV_SERIAL_GENERIC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) snd_printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) "Adaptor type is out of range 0-%d (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) SNDRV_SERIAL_MAX_ADAPTOR, adaptor[dev]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) if (outs[dev] < 1 || outs[dev] > SNDRV_SERIAL_MAX_OUTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) snd_printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) "Count of outputs is out of range 1-%d (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) SNDRV_SERIAL_MAX_OUTS, outs[dev]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) if (ins[dev] < 1 || ins[dev] > SNDRV_SERIAL_MAX_INS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) snd_printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) "Count of inputs is out of range 1-%d (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) SNDRV_SERIAL_MAX_INS, ins[dev]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) err = snd_card_new(&devptr->dev, index[dev], id[dev], THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) 0, &card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) strcpy(card->driver, "Serial");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) strcpy(card->shortname, "Serial MIDI (UART16550A)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) if ((err = snd_uart16550_create(card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) port[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) irq[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) speed[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) base[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) adaptor[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) droponfull[dev],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) &uart)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) goto _err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) err = snd_uart16550_rmidi(uart, 0, outs[dev], ins[dev], &uart->rmidi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) goto _err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) sprintf(card->longname, "%s [%s] at %#lx, irq %d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) card->shortname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) adaptor_names[uart->adaptor],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) uart->base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) uart->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) if ((err = snd_card_register(card)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) goto _err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) platform_set_drvdata(devptr, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) _err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) snd_card_free(card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static int snd_serial_remove(struct platform_device *devptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) snd_card_free(platform_get_drvdata(devptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) #define SND_SERIAL_DRIVER "snd_serial_u16550"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) static struct platform_driver snd_serial_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) .probe = snd_serial_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) .remove = snd_serial_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) .name = SND_SERIAL_DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) static void snd_serial_unregister_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) for (i = 0; i < ARRAY_SIZE(devices); ++i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) platform_device_unregister(devices[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) platform_driver_unregister(&snd_serial_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) static int __init alsa_card_serial_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) int i, cards, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) if ((err = platform_driver_register(&snd_serial_driver)) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) cards = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) for (i = 0; i < SNDRV_CARDS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) struct platform_device *device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) if (! enable[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) device = platform_device_register_simple(SND_SERIAL_DRIVER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) i, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) if (IS_ERR(device))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) if (!platform_get_drvdata(device)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) platform_device_unregister(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) devices[i] = device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) cards++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) if (! cards) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) #ifdef MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) printk(KERN_ERR "serial midi soundcard not found or device busy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) snd_serial_unregister_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) static void __exit alsa_card_serial_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) snd_serial_unregister_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) module_init(alsa_card_serial_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) module_exit(alsa_card_serial_exit)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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