Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * Local definitions for the OPL4 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (c) 2003 by Clemens Ladisch <clemens@ladisch.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *    notice, this list of conditions, and the following disclaimer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *    without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * 2. The name of the author may not be used to endorse or promote products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *    derived from this software without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * Alternatively, this software may be distributed and/or modified under the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * terms of the GNU General Public License as published by the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * Foundation; either version 2 of the License, or (at your option) any later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #ifndef __OPL4_LOCAL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define __OPL4_LOCAL_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <sound/opl4.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * Register numbers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define OPL4_REG_TEST0			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define OPL4_REG_TEST1			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define OPL4_REG_MEMORY_CONFIGURATION	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define   OPL4_MODE_BIT			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define   OPL4_MTYPE_BIT		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define   OPL4_TONE_HEADER_MASK		0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define   OPL4_DEVICE_ID_MASK		0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define OPL4_REG_MEMORY_ADDRESS_HIGH	0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define OPL4_REG_MEMORY_ADDRESS_MID	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define OPL4_REG_MEMORY_ADDRESS_LOW	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define OPL4_REG_MEMORY_DATA		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * Offsets to the register banks for voices. To get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * register number just add the voice number to the bank offset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * Wave Table Number low bits (0x08 to 0x1F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define OPL4_REG_TONE_NUMBER		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) /* Wave Table Number high bit, F-Number low bits (0x20 to 0x37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define OPL4_REG_F_NUMBER		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define   OPL4_TONE_NUMBER_BIT8		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define   OPL4_F_NUMBER_LOW_MASK	0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) /* F-Number high bits, Octave, Pseudo-Reverb (0x38 to 0x4F) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define OPL4_REG_OCTAVE			0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define   OPL4_F_NUMBER_HIGH_MASK	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define   OPL4_BLOCK_MASK		0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define   OPL4_PSEUDO_REVERB_BIT	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) /* Total Level, Level Direct (0x50 to 0x67) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define OPL4_REG_LEVEL			0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define   OPL4_TOTAL_LEVEL_MASK		0xfe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define   OPL4_LEVEL_DIRECT_BIT		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) /* Key On, Damp, LFO RST, CH, Panpot (0x68 to 0x7F) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define OPL4_REG_MISC			0x68
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define   OPL4_KEY_ON_BIT		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define   OPL4_DAMP_BIT			0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define   OPL4_LFO_RESET_BIT		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define   OPL4_OUTPUT_CHANNEL_BIT	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define   OPL4_PAN_POT_MASK		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) /* LFO, VIB (0x80 to 0x97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define OPL4_REG_LFO_VIBRATO		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define   OPL4_LFO_FREQUENCY_MASK	0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define   OPL4_VIBRATO_DEPTH_MASK	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define   OPL4_CHORUS_SEND_MASK		0xc0 /* ML only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) /* Attack / Decay 1 rate (0x98 to 0xAF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define OPL4_REG_ATTACK_DECAY1		0x98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define   OPL4_ATTACK_RATE_MASK		0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define   OPL4_DECAY1_RATE_MASK		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* Decay level / 2 rate (0xB0 to 0xC7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define OPL4_REG_LEVEL_DECAY2		0xb0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define   OPL4_DECAY_LEVEL_MASK		0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define   OPL4_DECAY2_RATE_MASK		0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* Release rate / Rate correction (0xC8 to 0xDF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define OPL4_REG_RELEASE_CORRECTION	0xc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define   OPL4_RELEASE_RATE_MASK	0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define   OPL4_RATE_INTERPOLATION_MASK	0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* AM (0xE0 to 0xF7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define OPL4_REG_TREMOLO		0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define   OPL4_TREMOLO_DEPTH_MASK	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define   OPL4_REVERB_SEND_MASK		0xe0 /* ML only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* Mixer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define OPL4_REG_MIX_CONTROL_FM		0xf8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define OPL4_REG_MIX_CONTROL_PCM	0xf9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define   OPL4_MIX_LEFT_MASK		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define   OPL4_MIX_RIGHT_MASK		0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define OPL4_REG_ATC			0xfa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define   OPL4_ATC_BIT			0x01 /* ???, ML only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* bits in the OPL3 Status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define OPL4_STATUS_BUSY		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define OPL4_STATUS_LOAD		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define OPL4_MAX_VOICES 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define SNDRV_SEQ_DEV_ID_OPL4 "opl4-synth"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct opl4_sound {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u16 tone;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	s16 pitch_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	u8 key_scaling;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	s8 panpot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	u8 vibrato;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u8 tone_attenuate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	u8 volume_factor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	u8 reg_lfo_vibrato;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	u8 reg_attack_decay1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 reg_level_decay2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u8 reg_release_correction;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u8 reg_tremolo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct opl4_region {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u8 key_min, key_max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	struct opl4_sound sound;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct opl4_region_ptr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	const struct opl4_region *regions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct opl4_voice {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	int number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct snd_midi_channel *chan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	int note;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	int velocity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	const struct opl4_sound *sound;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	u8 level_direct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	u8 reg_f_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	u8 reg_misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	u8 reg_lfo_vibrato;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct snd_opl4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	unsigned long fm_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	unsigned long pcm_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct resource *res_fm_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct resource *res_pcm_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	unsigned short hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	spinlock_t reg_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #ifdef CONFIG_SND_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	struct snd_info_entry *proc_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	int memory_access;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	struct mutex access_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #if IS_ENABLED(CONFIG_SND_SEQUENCER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	int used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	int seq_dev_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	int seq_client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	struct snd_seq_device *seq_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	struct snd_midi_channel_set *chset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	struct opl4_voice voices[OPL4_MAX_VOICES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	struct list_head off_voices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	struct list_head on_voices;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* opl4_lib.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) void snd_opl4_write(struct snd_opl4 *opl4, u8 reg, u8 value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) u8 snd_opl4_read(struct snd_opl4 *opl4, u8 reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) void snd_opl4_read_memory(struct snd_opl4 *opl4, char *buf, int offset, int size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) void snd_opl4_write_memory(struct snd_opl4 *opl4, const char *buf, int offset, int size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* opl4_mixer.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int snd_opl4_create_mixer(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #ifdef CONFIG_SND_PROC_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* opl4_proc.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int snd_opl4_create_proc(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) void snd_opl4_free_proc(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static inline int snd_opl4_create_proc(struct snd_opl4 *opl4) { return 0; }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static inline void snd_opl4_free_proc(struct snd_opl4 *opl4) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /* opl4_seq.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) extern int volume_boost;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) /* opl4_synth.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) void snd_opl4_synth_reset(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) void snd_opl4_synth_shutdown(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) void snd_opl4_note_on(void *p, int note, int vel, struct snd_midi_channel *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) void snd_opl4_note_off(void *p, int note, int vel, struct snd_midi_channel *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) void snd_opl4_terminate_note(void *p, int note, struct snd_midi_channel *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) void snd_opl4_control(void *p, int type, struct snd_midi_channel *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) void snd_opl4_sysex(void *p, unsigned char *buf, int len, int parsed, struct snd_midi_channel_set *chset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) /* yrw801.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) int snd_yrw801_detect(struct snd_opl4 *opl4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) extern const struct opl4_region_ptr snd_yrw801_regions[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #endif /* __OPL4_LOCAL_H */