Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Apple Onboard Audio driver for tas codec (header)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #ifndef __SND_AOA_CODECTASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define __SND_AOA_CODECTASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define TAS_REG_MCS	0x01	/* main control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #	define TAS_MCS_FASTLOAD		(1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #	define TAS_MCS_SCLK64		(1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #	define TAS_MCS_SPORT_MODE_MASK	(3<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #	define TAS_MCS_SPORT_MODE_I2S	(2<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #	define TAS_MCS_SPORT_MODE_RJ	(1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #	define TAS_MCS_SPORT_MODE_LJ	(0<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #	define TAS_MCS_SPORT_WL_MASK	(3<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #	define TAS_MCS_SPORT_WL_16BIT	(0<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #	define TAS_MCS_SPORT_WL_18BIT	(1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #	define TAS_MCS_SPORT_WL_20BIT	(2<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #	define TAS_MCS_SPORT_WL_24BIT	(3<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define TAS_REG_DRC	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define TAS_REG_VOL	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define TAS_REG_TREBLE	0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define TAS_REG_BASS	0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TAS_REG_LMIX	0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define TAS_REG_RMIX	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TAS_REG_ACR	0x40	/* analog control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #	define TAS_ACR_B_MONAUREAL	(1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #	define TAS_ACR_B_MON_SEL_RIGHT	(1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #	define TAS_ACR_DEEMPH_MASK	(3<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #	define TAS_ACR_DEEMPH_OFF	(0<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #	define TAS_ACR_DEEMPH_48KHz	(1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #	define TAS_ACR_DEEMPH_44KHz	(2<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #	define TAS_ACR_INPUT_B		(1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #	define TAS_ACR_ANALOG_PDOWN	(1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TAS_REG_MCS2	0x43	/* main control 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #	define TAS_MCS2_ALLPASS		(1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TAS_REG_LEFT_BIQUAD6	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define TAS_REG_RIGHT_BIQUAD6	0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TAS_REG_LEFT_LOUDNESS		0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TAS_REG_RIGHT_LOUDNESS		0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define TAS_REG_LEFT_LOUDNESS_GAIN	0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define TAS_REG_RIGHT_LOUDNESS_GAIN	0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define TAS3001_DRC_MAX		0x5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define TAS3004_DRC_MAX		0xef
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #endif /* __SND_AOA_CODECTASH */