^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Mediated virtual PCI display host device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * See mdpy-defs.h for device specs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (c) Gerd Hoffmann <kraxel@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * based on mtty driver which is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Author: Neo Jia <cjia@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Kirti Wankhede <kwankhede@nvidia.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * This program is free software; you can redistribute it and/or modify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * it under the terms of the GNU General Public License version 2 as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/cdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/vfio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/iommu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/sysfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mdev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <drm/drm_fourcc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "mdpy-defs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MDPY_NAME "mdpy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MDPY_CLASS_NAME "mdpy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MDPY_CONFIG_SPACE_SIZE 0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MDPY_MEMORY_BAR_OFFSET PAGE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define MDPY_DISPLAY_REGION 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define STORE_LE16(addr, val) (*(u16 *)addr = val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define STORE_LE32(addr, val) (*(u32 *)addr = val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) MODULE_LICENSE("GPL v2");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int max_devices = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) module_param_named(count, max_devices, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) MODULE_PARM_DESC(count, "number of " MDPY_NAME " devices");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MDPY_TYPE_1 "vga"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MDPY_TYPE_2 "xga"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MDPY_TYPE_3 "hd"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct mdpy_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u32 format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u32 bytepp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) } mdpy_types[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .name = MDPY_CLASS_NAME "-" MDPY_TYPE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .format = DRM_FORMAT_XRGB8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .bytepp = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .width = 640,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .height = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .name = MDPY_CLASS_NAME "-" MDPY_TYPE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .format = DRM_FORMAT_XRGB8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .bytepp = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .width = 1024,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .height = 768,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .name = MDPY_CLASS_NAME "-" MDPY_TYPE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .format = DRM_FORMAT_XRGB8888,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .bytepp = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .width = 1920,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .height = 1080,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static dev_t mdpy_devt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static struct class *mdpy_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static struct cdev mdpy_cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static struct device mdpy_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static u32 mdpy_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* State of each mdev device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct mdev_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) u8 *vconfig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) u32 bar_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct mutex ops_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct mdev_device *mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct vfio_device_info dev_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) const struct mdpy_type *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 memsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) void *memblk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static const struct mdpy_type *mdpy_find_type(struct kobject *kobj)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) for (i = 0; i < ARRAY_SIZE(mdpy_types); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (strcmp(mdpy_types[i].name, kobj->name) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return mdpy_types + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void mdpy_create_config_space(struct mdev_state *mdev_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_VENDOR_ID],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MDPY_PCI_VENDOR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_DEVICE_ID],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) MDPY_PCI_DEVICE_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_VENDOR_ID],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) MDPY_PCI_SUBVENDOR_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_SUBSYSTEM_ID],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) MDPY_PCI_SUBDEVICE_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_COMMAND],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_STATUS],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) PCI_STATUS_CAP_LIST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) STORE_LE16((u16 *) &mdev_state->vconfig[PCI_CLASS_DEVICE],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) PCI_CLASS_DISPLAY_OTHER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) mdev_state->vconfig[PCI_CLASS_REVISION] = 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) STORE_LE32((u32 *) &mdev_state->vconfig[PCI_BASE_ADDRESS_0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) PCI_BASE_ADDRESS_SPACE_MEMORY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) PCI_BASE_ADDRESS_MEM_TYPE_32 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) PCI_BASE_ADDRESS_MEM_PREFETCH);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mdev_state->bar_mask = ~(mdev_state->memsize) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* vendor specific capability for the config registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) mdev_state->vconfig[PCI_CAPABILITY_LIST] = MDPY_VENDORCAP_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 0] = 0x09; /* vendor cap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 1] = 0x00; /* next ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) mdev_state->vconfig[MDPY_VENDORCAP_OFFSET + 2] = MDPY_VENDORCAP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_FORMAT_OFFSET],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) mdev_state->type->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_WIDTH_OFFSET],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) mdev_state->type->width);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) STORE_LE32((u32 *) &mdev_state->vconfig[MDPY_HEIGHT_OFFSET],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) mdev_state->type->height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) char *buf, u32 count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct device *dev = mdev_dev(mdev_state->mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u32 cfg_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) switch (offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) case PCI_BASE_ADDRESS_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) cfg_addr = *(u32 *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (cfg_addr == 0xffffffff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) cfg_addr = (cfg_addr & mdev_state->bar_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) cfg_addr &= PCI_BASE_ADDRESS_MEM_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (cfg_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) dev_info(dev, "BAR0 @ 0x%x\n", cfg_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cfg_addr |= (mdev_state->vconfig[offset] &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ~PCI_BASE_ADDRESS_MEM_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static ssize_t mdev_access(struct mdev_device *mdev, char *buf, size_t count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) loff_t pos, bool is_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct device *dev = mdev_dev(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) mutex_lock(&mdev_state->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (pos < MDPY_CONFIG_SPACE_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (is_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) handle_pci_cfg_write(mdev_state, pos, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) memcpy(buf, (mdev_state->vconfig + pos), count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) } else if ((pos >= MDPY_MEMORY_BAR_OFFSET) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) (pos + count <=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) MDPY_MEMORY_BAR_OFFSET + mdev_state->memsize)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) pos -= MDPY_MEMORY_BAR_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (is_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) memcpy(mdev_state->memblk, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) memcpy(buf, mdev_state->memblk, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) dev_info(dev, "%s: %s @0x%llx (unhandled)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) __func__, is_write ? "WR" : "RD", pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ret = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) goto accessfailed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ret = count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) accessfailed:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) mutex_unlock(&mdev_state->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int mdpy_reset(struct mdev_device *mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) u32 stride, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* initialize with gray gradient */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) stride = mdev_state->type->width * mdev_state->type->bytepp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) for (i = 0; i < mdev_state->type->height; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) memset(mdev_state->memblk + i * stride,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) i * 255 / mdev_state->type->height,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) static int mdpy_create(struct kobject *kobj, struct mdev_device *mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) const struct mdpy_type *type = mdpy_find_type(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) struct device *dev = mdev_dev(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) struct mdev_state *mdev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u32 fbsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (mdpy_count >= max_devices)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) mdev_state = kzalloc(sizeof(struct mdev_state), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (mdev_state == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) mdev_state->vconfig = kzalloc(MDPY_CONFIG_SPACE_SIZE, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (mdev_state->vconfig == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) kfree(mdev_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (!type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) type = &mdpy_types[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) fbsize = roundup_pow_of_two(type->width * type->height * type->bytepp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) mdev_state->memblk = vmalloc_user(fbsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) if (!mdev_state->memblk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) kfree(mdev_state->vconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) kfree(mdev_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) dev_info(dev, "%s: %s (%dx%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) __func__, kobj->name, type->width, type->height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) mutex_init(&mdev_state->ops_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) mdev_state->mdev = mdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) mdev_set_drvdata(mdev, mdev_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) mdev_state->type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) mdev_state->memsize = fbsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) mdpy_create_config_space(mdev_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) mdpy_reset(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) mdpy_count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) static int mdpy_remove(struct mdev_device *mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct device *dev = mdev_dev(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev_info(dev, "%s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) mdev_set_drvdata(mdev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) vfree(mdev_state->memblk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) kfree(mdev_state->vconfig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) kfree(mdev_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) mdpy_count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static ssize_t mdpy_read(struct mdev_device *mdev, char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) unsigned int done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) size_t filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (count >= 4 && !(*ppos % 4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) *ppos, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (copy_to_user(buf, &val, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) filled = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) } else if (count >= 2 && !(*ppos % 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) *ppos, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (copy_to_user(buf, &val, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) filled = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) *ppos, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (copy_to_user(buf, &val, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) goto read_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) filled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) count -= filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) done += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) *ppos += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) buf += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) read_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) static ssize_t mdpy_write(struct mdev_device *mdev, const char __user *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) size_t count, loff_t *ppos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) unsigned int done = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) while (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) size_t filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (count >= 4 && !(*ppos % 4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (copy_from_user(&val, buf, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) *ppos, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) filled = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) } else if (count >= 2 && !(*ppos % 2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) u16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (copy_from_user(&val, buf, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) *ppos, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) filled = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) u8 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (copy_from_user(&val, buf, sizeof(val)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ret = mdev_access(mdev, (char *)&val, sizeof(val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) *ppos, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (ret <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) goto write_err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) filled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) count -= filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) done += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) *ppos += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) buf += filled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) return done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) write_err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) static int mdpy_mmap(struct mdev_device *mdev, struct vm_area_struct *vma)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (vma->vm_pgoff != MDPY_MEMORY_BAR_OFFSET >> PAGE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (vma->vm_end < vma->vm_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (vma->vm_end - vma->vm_start > mdev_state->memsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if ((vma->vm_flags & VM_SHARED) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return remap_vmalloc_range_partial(vma, vma->vm_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mdev_state->memblk, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) vma->vm_end - vma->vm_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) static int mdpy_get_region_info(struct mdev_device *mdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) struct vfio_region_info *region_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) u16 *cap_type_id, void **cap_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct mdev_state *mdev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (!mdev_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (region_info->index >= VFIO_PCI_NUM_REGIONS &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) region_info->index != MDPY_DISPLAY_REGION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) switch (region_info->index) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) case VFIO_PCI_CONFIG_REGION_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) region_info->offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) region_info->size = MDPY_CONFIG_SPACE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) VFIO_REGION_INFO_FLAG_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) case VFIO_PCI_BAR0_REGION_INDEX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) case MDPY_DISPLAY_REGION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) region_info->offset = MDPY_MEMORY_BAR_OFFSET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) region_info->size = mdev_state->memsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) region_info->flags = (VFIO_REGION_INFO_FLAG_READ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) VFIO_REGION_INFO_FLAG_WRITE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) VFIO_REGION_INFO_FLAG_MMAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) region_info->size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) region_info->offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) region_info->flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static int mdpy_get_irq_info(struct mdev_device *mdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) struct vfio_irq_info *irq_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) irq_info->count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) static int mdpy_get_device_info(struct mdev_device *mdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) struct vfio_device_info *dev_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) dev_info->num_regions = VFIO_PCI_NUM_REGIONS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static int mdpy_query_gfx_plane(struct mdev_device *mdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct vfio_device_gfx_plane_info *plane)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) if (plane->flags & VFIO_GFX_PLANE_TYPE_PROBE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) if (plane->flags == (VFIO_GFX_PLANE_TYPE_PROBE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) VFIO_GFX_PLANE_TYPE_REGION))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (plane->flags != VFIO_GFX_PLANE_TYPE_REGION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) plane->drm_format = mdev_state->type->format;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) plane->width = mdev_state->type->width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) plane->height = mdev_state->type->height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) plane->stride = (mdev_state->type->width *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) mdev_state->type->bytepp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) plane->size = mdev_state->memsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) plane->region_index = MDPY_DISPLAY_REGION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) /* unused */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) plane->drm_format_mod = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) plane->x_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) plane->y_pos = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) plane->x_hot = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) plane->y_hot = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) static long mdpy_ioctl(struct mdev_device *mdev, unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) unsigned long arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) unsigned long minsz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) struct mdev_state *mdev_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) case VFIO_DEVICE_GET_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct vfio_device_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) minsz = offsetofend(struct vfio_device_info, num_irqs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (copy_from_user(&info, (void __user *)arg, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (info.argsz < minsz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) ret = mdpy_get_device_info(mdev, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) memcpy(&mdev_state->dev_info, &info, sizeof(info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (copy_to_user((void __user *)arg, &info, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) case VFIO_DEVICE_GET_REGION_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) struct vfio_region_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) u16 cap_type_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) void *cap_type = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) minsz = offsetofend(struct vfio_region_info, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if (copy_from_user(&info, (void __user *)arg, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) if (info.argsz < minsz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) ret = mdpy_get_region_info(mdev, &info, &cap_type_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) &cap_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (copy_to_user((void __user *)arg, &info, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) case VFIO_DEVICE_GET_IRQ_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct vfio_irq_info info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) minsz = offsetofend(struct vfio_irq_info, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (copy_from_user(&info, (void __user *)arg, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) if ((info.argsz < minsz) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) (info.index >= mdev_state->dev_info.num_irqs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) ret = mdpy_get_irq_info(mdev, &info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (copy_to_user((void __user *)arg, &info, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) case VFIO_DEVICE_QUERY_GFX_PLANE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct vfio_device_gfx_plane_info plane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) minsz = offsetofend(struct vfio_device_gfx_plane_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) region_index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (copy_from_user(&plane, (void __user *)arg, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (plane.argsz < minsz)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) ret = mdpy_query_gfx_plane(mdev, &plane);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) if (copy_to_user((void __user *)arg, &plane, minsz))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) case VFIO_DEVICE_SET_IRQS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) case VFIO_DEVICE_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) return mdpy_reset(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return -ENOTTY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) static int mdpy_open(struct mdev_device *mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (!try_module_get(THIS_MODULE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static void mdpy_close(struct mdev_device *mdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) module_put(THIS_MODULE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) resolution_show(struct device *dev, struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) struct mdev_device *mdev = mdev_from_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) return sprintf(buf, "%dx%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) mdev_state->type->width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) mdev_state->type->height);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static DEVICE_ATTR_RO(resolution);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static struct attribute *mdev_dev_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) &dev_attr_resolution.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) static const struct attribute_group mdev_dev_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .name = "vendor",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .attrs = mdev_dev_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) const struct attribute_group *mdev_dev_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) &mdev_dev_group,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) name_show(struct kobject *kobj, struct device *dev, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return sprintf(buf, "%s\n", kobj->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) MDEV_TYPE_ATTR_RO(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) description_show(struct kobject *kobj, struct device *dev, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) const struct mdpy_type *type = mdpy_find_type(kobj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return sprintf(buf, "virtual display, %dx%d framebuffer\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) type ? type->width : 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) type ? type->height : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) MDEV_TYPE_ATTR_RO(description);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static ssize_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) available_instances_show(struct kobject *kobj, struct device *dev, char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) return sprintf(buf, "%d\n", max_devices - mdpy_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) MDEV_TYPE_ATTR_RO(available_instances);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static ssize_t device_api_show(struct kobject *kobj, struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) MDEV_TYPE_ATTR_RO(device_api);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) static struct attribute *mdev_types_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) &mdev_type_attr_name.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) &mdev_type_attr_description.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) &mdev_type_attr_device_api.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) &mdev_type_attr_available_instances.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static struct attribute_group mdev_type_group1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) .name = MDPY_TYPE_1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .attrs = mdev_types_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static struct attribute_group mdev_type_group2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .name = MDPY_TYPE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .attrs = mdev_types_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) static struct attribute_group mdev_type_group3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) .name = MDPY_TYPE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .attrs = mdev_types_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static struct attribute_group *mdev_type_groups[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) &mdev_type_group1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) &mdev_type_group2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) &mdev_type_group3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static const struct mdev_parent_ops mdev_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .mdev_attr_groups = mdev_dev_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .supported_type_groups = mdev_type_groups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .create = mdpy_create,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) .remove = mdpy_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .open = mdpy_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) .release = mdpy_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) .read = mdpy_read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .write = mdpy_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .ioctl = mdpy_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .mmap = mdpy_mmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) static const struct file_operations vd_fops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static void mdpy_device_release(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) static int __init mdpy_dev_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) ret = alloc_chrdev_region(&mdpy_devt, 0, MINORMASK + 1, MDPY_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) pr_err("Error: failed to register mdpy_dev, err: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) cdev_init(&mdpy_cdev, &vd_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) cdev_add(&mdpy_cdev, mdpy_devt, MINORMASK + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) pr_info("%s: major %d\n", __func__, MAJOR(mdpy_devt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) mdpy_class = class_create(THIS_MODULE, MDPY_CLASS_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (IS_ERR(mdpy_class)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) pr_err("Error: failed to register mdpy_dev class\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) ret = PTR_ERR(mdpy_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) goto failed1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) mdpy_dev.class = mdpy_class;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) mdpy_dev.release = mdpy_device_release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) dev_set_name(&mdpy_dev, "%s", MDPY_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ret = device_register(&mdpy_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) goto failed2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) ret = mdev_register_device(&mdpy_dev, &mdev_fops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) goto failed3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) failed3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) device_unregister(&mdpy_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) failed2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) class_destroy(mdpy_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) failed1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) cdev_del(&mdpy_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) unregister_chrdev_region(mdpy_devt, MINORMASK + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void __exit mdpy_dev_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) mdpy_dev.bus = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) mdev_unregister_device(&mdpy_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) device_unregister(&mdpy_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) cdev_del(&mdpy_cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) unregister_chrdev_region(mdpy_devt, MINORMASK + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) class_destroy(mdpy_class);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) mdpy_class = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) module_init(mdpy_dev_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) module_exit(mdpy_dev_exit)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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