Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2013  Intel Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #define pr_fmt(fmt) "nci_spi: %s: " fmt, __func__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/spi/spi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/crc-ccitt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <net/nfc/nci_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #define NCI_SPI_ACK_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #define NCI_SPI_MSB_PAYLOAD_MASK	0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #define NCI_SPI_SEND_TIMEOUT	(NCI_CMD_TIMEOUT > NCI_DATA_TIMEOUT ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 					NCI_CMD_TIMEOUT : NCI_DATA_TIMEOUT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define NCI_SPI_DIRECT_WRITE	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define NCI_SPI_DIRECT_READ	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define ACKNOWLEDGE_NONE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ACKNOWLEDGE_ACK		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ACKNOWLEDGE_NACK	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define CRC_INIT		0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) static int __nci_spi_send(struct nci_spi *nspi, struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 			  int cs_change)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	struct spi_transfer t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	memset(&t, 0, sizeof(struct spi_transfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* a NULL skb means we just want the SPI chip select line to raise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	if (skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		t.tx_buf = skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		t.len = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		/* still set tx_buf non NULL to make the driver happy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		t.tx_buf = &t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		t.len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	t.cs_change = cs_change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	t.delay.value = nspi->xfer_udelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	t.delay.unit = SPI_DELAY_UNIT_USECS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	t.speed_hz = nspi->xfer_speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	spi_message_add_tail(&t, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	return spi_sync(nspi->spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) int nci_spi_send(struct nci_spi *nspi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		 struct completion *write_handshake_completion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 		 struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	unsigned int payload_len = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	unsigned char *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	long completion_rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	/* add the NCI SPI header to the start of the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	hdr = skb_push(skb, NCI_SPI_HDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	hdr[0] = NCI_SPI_DIRECT_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	hdr[1] = nspi->acknowledge_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	hdr[2] = payload_len >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	hdr[3] = payload_len & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	if (nspi->acknowledge_mode == NCI_SPI_CRC_ENABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 		u16 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		crc = crc_ccitt(CRC_INIT, skb->data, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		skb_put_u8(skb, crc >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		skb_put_u8(skb, crc & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (write_handshake_completion)	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		/* Trick SPI driver to raise chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		ret = __nci_spi_send(nspi, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 			goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		/* wait for NFC chip hardware handshake to complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		if (wait_for_completion_timeout(write_handshake_completion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 						msecs_to_jiffies(1000)) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 			ret = -ETIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 			goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	ret = __nci_spi_send(nspi, skb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	if (ret != 0 || nspi->acknowledge_mode == NCI_SPI_CRC_DISABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	reinit_completion(&nspi->req_completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	completion_rc =	wait_for_completion_interruptible_timeout(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 							&nspi->req_completion,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 							NCI_SPI_SEND_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	if (completion_rc <= 0 || nspi->req_result == ACKNOWLEDGE_NACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) EXPORT_SYMBOL_GPL(nci_spi_send);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* ---- Interface to NCI SPI drivers ---- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)  * nci_spi_allocate_spi - allocate a new nci spi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)  * @spi: SPI device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)  * @acknowledge_mode: Acknowledge mode used by the NFC device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)  * @delay: delay between transactions in us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)  * @ndev: nci dev to send incoming nci frames to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct nci_spi *nci_spi_allocate_spi(struct spi_device *spi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 				     u8 acknowledge_mode, unsigned int delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 				     struct nci_dev *ndev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	struct nci_spi *nspi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	nspi = devm_kzalloc(&spi->dev, sizeof(struct nci_spi), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	if (!nspi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	nspi->acknowledge_mode = acknowledge_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	nspi->xfer_udelay = delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	/* Use controller max SPI speed by default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	nspi->xfer_speed_hz = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	nspi->spi = spi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	nspi->ndev = ndev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	init_completion(&nspi->req_completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	return nspi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) EXPORT_SYMBOL_GPL(nci_spi_allocate_spi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static int send_acknowledge(struct nci_spi *nspi, u8 acknowledge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	unsigned char *hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	u16 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	skb = nci_skb_alloc(nspi->ndev, 0, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	/* add the NCI SPI header to the start of the buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	hdr = skb_push(skb, NCI_SPI_HDR_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	hdr[0] = NCI_SPI_DIRECT_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	hdr[1] = NCI_SPI_CRC_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	hdr[2] = acknowledge << NCI_SPI_ACK_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	hdr[3] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	crc = crc_ccitt(CRC_INIT, skb->data, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	skb_put_u8(skb, crc >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	skb_put_u8(skb, crc & 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	ret = __nci_spi_send(nspi, skb, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static struct sk_buff *__nci_spi_read(struct nci_spi *nspi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct spi_message m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	unsigned char req[2], resp_hdr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	struct spi_transfer tx, rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	unsigned short rx_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	memset(&tx, 0, sizeof(struct spi_transfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	req[0] = NCI_SPI_DIRECT_READ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	req[1] = nspi->acknowledge_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	tx.tx_buf = req;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	tx.len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	tx.cs_change = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	tx.speed_hz = nspi->xfer_speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	spi_message_add_tail(&tx, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	memset(&rx, 0, sizeof(struct spi_transfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	rx.rx_buf = resp_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	rx.len = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	rx.cs_change = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	rx.speed_hz = nspi->xfer_speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	spi_message_add_tail(&rx, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	ret = spi_sync(nspi->spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	if (nspi->acknowledge_mode == NCI_SPI_CRC_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		rx_len = ((resp_hdr[0] & NCI_SPI_MSB_PAYLOAD_MASK) << 8) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 				resp_hdr[1] + NCI_SPI_CRC_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 		rx_len = (resp_hdr[0] << 8) | resp_hdr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	skb = nci_skb_alloc(nspi->ndev, rx_len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	spi_message_init(&m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	memset(&rx, 0, sizeof(struct spi_transfer));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	rx.rx_buf = skb_put(skb, rx_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	rx.len = rx_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	rx.cs_change = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	rx.delay.value = nspi->xfer_udelay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	rx.delay.unit = SPI_DELAY_UNIT_USECS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	rx.speed_hz = nspi->xfer_speed_hz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	spi_message_add_tail(&rx, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	ret = spi_sync(nspi->spi, &m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		goto receive_error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	if (nspi->acknowledge_mode == NCI_SPI_CRC_ENABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		*(u8 *)skb_push(skb, 1) = resp_hdr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 		*(u8 *)skb_push(skb, 1) = resp_hdr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) receive_error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static int nci_spi_check_crc(struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	u16 crc_data = (skb->data[skb->len - 2] << 8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			skb->data[skb->len - 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	ret = (crc_ccitt(CRC_INIT, skb->data, skb->len - NCI_SPI_CRC_LEN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			== crc_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	skb_trim(skb, skb->len - NCI_SPI_CRC_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static u8 nci_spi_get_ack(struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	u8 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	ret = skb->data[0] >> NCI_SPI_ACK_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	/* Remove NFCC part of the header: ACK, NACK and MSB payload len */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	skb_pull(skb, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)  * nci_spi_read - read frame from NCI SPI drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)  * @nspi: The nci spi
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)  * Context: can sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)  * This call may only be used from a context that may sleep.  The sleep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)  * is non-interruptible, and has no timeout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)  * It returns an allocated skb containing the frame on success, or NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct sk_buff *nci_spi_read(struct nci_spi *nspi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	/* Retrieve frame from SPI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	skb = __nci_spi_read(nspi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	if (nspi->acknowledge_mode == NCI_SPI_CRC_ENABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		if (!nci_spi_check_crc(skb)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			send_acknowledge(nspi, ACKNOWLEDGE_NACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		/* In case of acknowledged mode: if ACK or NACK received,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		 * unblock completion of latest frame sent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		nspi->req_result = nci_spi_get_ack(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		if (nspi->req_result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			complete(&nspi->req_completion);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	/* If there is no payload (ACK/NACK only frame),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	 * free the socket buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	if (!skb->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 		kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 		goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	if (nspi->acknowledge_mode == NCI_SPI_CRC_ENABLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 		send_acknowledge(nspi, ACKNOWLEDGE_ACK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) EXPORT_SYMBOL_GPL(nci_spi_read);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) MODULE_LICENSE("GPL");