^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Implement the default iomap interfaces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) Copyright 2004 Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * pci_iomap_range - create a virtual mapping cookie for a PCI BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * @dev: PCI device that owns the BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * @bar: BAR number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * @offset: map memory at the given offset in BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * @maxlen: max length of the memory to map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Using this function you will get a __iomem address to your device BAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * You can access it using ioread*() and iowrite*(). These functions hide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * the details if this is a MMIO or PIO address space and will just do what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * you expect from them in the correct way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * @maxlen specifies the maximum length to map. If you want to get access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * the complete BAR from offset to the end, pass %0 here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) void __iomem *pci_iomap_range(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned long offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) resource_size_t start = pci_resource_start(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) resource_size_t len = pci_resource_len(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) unsigned long flags = pci_resource_flags(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (len <= offset || !start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) len -= offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) start += offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (maxlen && len > maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) len = maxlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) return __pci_ioport_map(dev, start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (flags & IORESOURCE_MEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return ioremap(start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /* What? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) EXPORT_SYMBOL(pci_iomap_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * @dev: PCI device that owns the BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * @bar: BAR number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @offset: map memory at the given offset in BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @maxlen: max length of the memory to map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Using this function you will get a __iomem address to your device BAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * You can access it using ioread*() and iowrite*(). These functions hide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * the details if this is a MMIO or PIO address space and will just do what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * you expect from them in the correct way. When possible write combining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * @maxlen specifies the maximum length to map. If you want to get access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * the complete BAR from offset to the end, pass %0 here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int bar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned long offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) resource_size_t start = pci_resource_start(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) resource_size_t len = pci_resource_len(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned long flags = pci_resource_flags(dev, bar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (flags & IORESOURCE_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (len <= offset || !start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) len -= offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) start += offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (maxlen && len > maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) len = maxlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (flags & IORESOURCE_MEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return ioremap_wc(start, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* What? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * pci_iomap - create a virtual mapping cookie for a PCI BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * @dev: PCI device that owns the BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * @bar: BAR number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * @maxlen: length of the memory to map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * Using this function you will get a __iomem address to your device BAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * You can access it using ioread*() and iowrite*(). These functions hide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * the details if this is a MMIO or PIO address space and will just do what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * you expect from them in the correct way.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * @maxlen specifies the maximum length to map. If you want to get access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * the complete BAR without checking for its length first, pass %0 here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return pci_iomap_range(dev, bar, 0, maxlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) EXPORT_SYMBOL(pci_iomap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * @dev: PCI device that owns the BAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * @bar: BAR number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @maxlen: length of the memory to map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Using this function you will get a __iomem address to your device BAR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * You can access it using ioread*() and iowrite*(). These functions hide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * the details if this is a MMIO or PIO address space and will just do what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * you expect from them in the correct way. When possible write combining
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @maxlen specifies the maximum length to map. If you want to get access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * the complete BAR without checking for its length first, pass %0 here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return pci_iomap_wc_range(dev, bar, 0, maxlen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) EXPORT_SYMBOL_GPL(pci_iomap_wc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif /* CONFIG_PCI */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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