Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6)  * This file contains the core interrupt handling code, for irq-chip based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7)  * architectures. Detailed information is available in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8)  * Documentation/core-api/genericirq.rst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12) #include <linux/msi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16) #include <linux/irqdomain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17) #include <linux/wakeup_reason.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19) #include <trace/events/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21) #include "internals.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23) static irqreturn_t bad_chained_irq(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25) 	WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26) 	return IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30)  * Chained handlers should never call action on their IRQ. This default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31)  * action will emit warning if such thing happens.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33) struct irqaction chained_action = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34) 	.handler = bad_chained_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38)  *	irq_set_chip - set the irq chip for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39)  *	@irq:	irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40)  *	@chip:	pointer to irq chip description structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42) int irq_set_chip(unsigned int irq, struct irq_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45) 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50) 	if (!chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51) 		chip = &no_irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53) 	desc->irq_data.chip = chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54) 	irq_put_desc_unlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56) 	 * For !CONFIG_SPARSE_IRQ make the irq show up in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57) 	 * allocated_irqs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59) 	irq_mark_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62) EXPORT_SYMBOL(irq_set_chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65)  *	irq_set_type - set the irq trigger type for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66)  *	@irq:	irq number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67)  *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69) int irq_set_irq_type(unsigned int irq, unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72) 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78) 	ret = __irq_set_trigger(desc, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79) 	irq_put_desc_busunlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82) EXPORT_SYMBOL(irq_set_irq_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85)  *	irq_set_handler_data - set irq handler data for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86)  *	@irq:	Interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87)  *	@data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89)  *	Set the hardware irq controller data for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) int irq_set_handler_data(unsigned int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94) 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) 	desc->irq_common_data.handler_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) 	irq_put_desc_unlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) EXPORT_SYMBOL(irq_set_handler_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105)  *	irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106)  *	@irq_base:	Interrupt number base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107)  *	@irq_offset:	Interrupt number offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108)  *	@entry:		Pointer to MSI descriptor data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110)  *	Set the MSI descriptor entry for an irq at offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) 			 struct msi_desc *entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) 	struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120) 	desc->irq_common_data.msi_desc = entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121) 	if (entry && !irq_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122) 		entry->irq = irq_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) 	irq_put_desc_unlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128)  *	irq_set_msi_desc - set MSI descriptor data for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129)  *	@irq:	Interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130)  *	@entry:	Pointer to MSI descriptor data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132)  *	Set the MSI descriptor entry for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136) 	return irq_set_msi_desc_off(irq, 0, entry);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140)  *	irq_set_chip_data - set irq chip data for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141)  *	@irq:	Interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142)  *	@data:	Pointer to chip specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144)  *	Set the hardware irq chip data for an irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) int irq_set_chip_data(unsigned int irq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149) 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) 	desc->irq_data.chip_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) 	irq_put_desc_unlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) EXPORT_SYMBOL(irq_set_chip_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) struct irq_data *irq_get_irq_data(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) 	struct irq_desc *desc = irq_to_desc(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) 	return desc ? &desc->irq_data : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) EXPORT_SYMBOL_GPL(irq_get_irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) static void irq_state_clr_disabled(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) 	irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) static void irq_state_clr_masked(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) 	irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) static void irq_state_clr_started(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) 	irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) static void irq_state_set_started(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) 	irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) 	IRQ_STARTUP_NORMAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) 	IRQ_STARTUP_MANAGED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) 	IRQ_STARTUP_ABORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) 	struct irq_data *d = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) 	if (!irqd_affinity_is_managed(d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) 		return IRQ_STARTUP_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) 	irqd_clr_managed_shutdown(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) 	if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) 		 * Catch code which fiddles with enable_irq() on a managed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) 		 * and potentially shutdown IRQ. Chained interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) 		 * installment or irq auto probing should not happen on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) 		 * managed irqs either.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) 		if (WARN_ON_ONCE(force))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) 			return IRQ_STARTUP_ABORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) 		 * The interrupt was requested, but there is no online CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) 		 * in it's affinity mask. Put it into managed shutdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) 		 * state and let the cpu hotplug mechanism start it up once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) 		 * a CPU in the mask becomes available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219) 		return IRQ_STARTUP_ABORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222) 	 * Managed interrupts have reserved resources, so this should not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223) 	 * happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225) 	if (WARN_ON(irq_domain_activate_irq(d, false)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) 		return IRQ_STARTUP_ABORT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) 	return IRQ_STARTUP_MANAGED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) static __always_inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) __irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) 	return IRQ_STARTUP_NORMAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) static int __irq_startup(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) 	struct irq_data *d = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242) 	/* Warn if this interrupt is not activated but try nevertheless */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243) 	WARN_ON_ONCE(!irqd_is_activated(d));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) 	if (d->chip->irq_startup) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) 		ret = d->chip->irq_startup(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) 		irq_state_clr_disabled(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) 		irq_state_clr_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 		irq_enable(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 	irq_state_set_started(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) int irq_startup(struct irq_desc *desc, bool resend, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) 	struct irq_data *d = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 	struct cpumask *aff = irq_data_get_affinity_mask(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) 	int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 	desc->depth = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 	if (irqd_is_started(d)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 		irq_enable(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) 		switch (__irq_startup_managed(desc, aff, force)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 		case IRQ_STARTUP_NORMAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 			if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) 				irq_setup_affinity(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 			ret = __irq_startup(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) 			if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273) 				irq_setup_affinity(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275) 		case IRQ_STARTUP_MANAGED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276) 			irq_do_set_affinity(d, aff, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 			ret = __irq_startup(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 		case IRQ_STARTUP_ABORT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280) 			irqd_set_managed_shutdown(d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281) 			return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) 	if (resend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285) 		check_irq_resend(desc, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) int irq_activate(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 	struct irq_data *d = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 	if (!irqd_affinity_is_managed(d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) 		return irq_domain_activate_irq(d, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299) int irq_activate_and_startup(struct irq_desc *desc, bool resend)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301) 	if (WARN_ON(irq_activate(desc)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 	return irq_startup(desc, resend, IRQ_START_FORCE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) static void __irq_disable(struct irq_desc *desc, bool mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) void irq_shutdown(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 	if (irqd_is_started(&desc->irq_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 		desc->depth = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) 		if (desc->irq_data.chip->irq_shutdown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 			desc->irq_data.chip->irq_shutdown(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) 			irq_state_set_disabled(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 			irq_state_set_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 			__irq_disable(desc, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) 		irq_state_clr_started(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) void irq_shutdown_and_deactivate(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 	irq_shutdown(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 	 * This must be called even if the interrupt was never started up,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) 	 * because the activation can happen before the interrupt is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 	 * available for request/startup. It has it's own state tracking so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) 	 * it's safe to call it unconditionally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 	irq_domain_deactivate_irq(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) void irq_enable(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 	if (!irqd_irq_disabled(&desc->irq_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) 		unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 		irq_state_clr_disabled(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) 		if (desc->irq_data.chip->irq_enable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) 			desc->irq_data.chip->irq_enable(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) 			irq_state_clr_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) 			unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) static void __irq_disable(struct irq_desc *desc, bool mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 	if (irqd_irq_disabled(&desc->irq_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) 		if (mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) 			mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 		irq_state_set_disabled(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) 		if (desc->irq_data.chip->irq_disable) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 			desc->irq_data.chip->irq_disable(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) 			irq_state_set_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 		} else if (mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) 			mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368)  * irq_disable - Mark interrupt disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369)  * @desc:	irq descriptor which should be disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371)  * If the chip does not implement the irq_disable callback, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372)  * use a lazy disable approach. That means we mark the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373)  * disabled, but leave the hardware unmasked. That's an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374)  * optimization because we avoid the hardware access for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375)  * common case where no interrupt happens after we marked it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376)  * disabled. If an interrupt happens, then the interrupt flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377)  * handler masks the line at the hardware level and marks it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378)  * pending.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380)  * If the interrupt chip does not implement the irq_disable callback,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381)  * a driver can disable the lazy approach for a particular irq line by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382)  * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383)  * be used for devices which cannot disable the interrupt at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384)  * device level under certain circumstances and have to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385)  * disable_irq[_nosync] instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) void irq_disable(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 	__irq_disable(desc, irq_settings_disable_unlazy(desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) 	if (desc->irq_data.chip->irq_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) 		desc->irq_data.chip->irq_enable(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) 	cpumask_set_cpu(cpu, desc->percpu_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) 	if (desc->irq_data.chip->irq_disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) 		desc->irq_data.chip->irq_disable(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) 		desc->irq_data.chip->irq_mask(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) 	cpumask_clear_cpu(cpu, desc->percpu_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) static inline void mask_ack_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) 	if (desc->irq_data.chip->irq_mask_ack) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 		desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) 		irq_state_set_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 		if (desc->irq_data.chip->irq_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) 			desc->irq_data.chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) void mask_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) 	if (irqd_irq_masked(&desc->irq_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427) 	if (desc->irq_data.chip->irq_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428) 		desc->irq_data.chip->irq_mask(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429) 		irq_state_set_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) void unmask_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 	if (!irqd_irq_masked(&desc->irq_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) 	if (desc->irq_data.chip->irq_unmask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) 		irq_state_clr_masked(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) void unmask_threaded_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) 	struct irq_chip *chip = desc->irq_data.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) 	if (chip->flags & IRQCHIP_EOI_THREADED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 	unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455)  *	handle_nested_irq - Handle a nested irq from a irq thread
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456)  *	@irq:	the interrupt number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458)  *	Handle interrupts which are nested into a threaded interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459)  *	handler. The handler function is called inside the calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460)  *	threads context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) void handle_nested_irq(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) 	struct irq_desc *desc = irq_to_desc(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 	struct irqaction *action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) 	irqreturn_t action_ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) 	might_sleep();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470) 	raw_spin_lock_irq(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) 	action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) 	if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) 	irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) 	raw_spin_unlock_irq(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) 	action_ret = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) 	for_each_action_of_desc(desc, action)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) 		action_ret |= action->thread_fn(action->irq, action->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) 	if (!noirqdebug)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) 		note_interrupt(desc, action_ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 	raw_spin_lock_irq(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) 	irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) 	raw_spin_unlock_irq(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) EXPORT_SYMBOL_GPL(handle_nested_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) static bool irq_check_poll(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) 	if (!(desc->istate & IRQS_POLL_INPROGRESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) 	return irq_wait_for_poll(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506) static bool irq_may_run(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508) 	unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 	 * If the interrupt is not in progress and is not an armed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) 	 * wakeup interrupt, proceed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) 	if (!irqd_has_set(&desc->irq_data, mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) 		if (unlikely(desc->no_suspend_depth &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) 			     irqd_is_wakeup_set(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) 			unsigned int irq = irq_desc_get_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) 			const char *name = "(unnamed)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) 			if (desc->action && desc->action->name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) 				name = desc->action->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) 			log_abnormal_wakeup_reason("misconfigured IRQ %u %s",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) 						   irq, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) 		return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) 	 * If the interrupt is an armed wakeup source, mark it pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) 	 * and suspended, disable it and notify the pm core about the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) 	 * event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) 	if (irq_pm_check_wakeup(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) 		return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) 	 * Handle a potential concurrent poll on a different core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542) 	return irq_check_poll(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546)  *	handle_simple_irq - Simple and software-decoded IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549)  *	Simple interrupts are either sent from a demultiplexing interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550)  *	handler or come from hardware, where no interrupt hardware control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551)  *	is necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553)  *	Note: The caller is expected to handle the ack, clear, mask and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554)  *	unmask issues if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) void handle_simple_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 	handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) EXPORT_SYMBOL_GPL(handle_simple_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579)  *	handle_untracked_irq - Simple and software-decoded IRQs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582)  *	Untracked interrupts are sent from a demultiplexing interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583)  *	handler when the demultiplexer does not know which device it its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584)  *	multiplexed irq domain generated the interrupt. IRQ's handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585)  *	through here are not subjected to stats tracking, randomness, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586)  *	spurious interrupt detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588)  *	Note: Like handle_simple_irq, the caller is expected to handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589)  *	the ack, clear, mask and unmask issues if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) void handle_untracked_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) 	unsigned int flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) 	desc->istate &= ~IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) 	irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) 	__handle_irq_event_percpu(desc, &flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) 	irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) EXPORT_SYMBOL_GPL(handle_untracked_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622)  * Called unconditionally from handle_level_irq() and only for oneshot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623)  * interrupts from handle_fasteoi_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) static void cond_unmask_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) 	 * We need to unmask in the following cases:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) 	 * - Standard level irq (IRQF_ONESHOT is not set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) 	 * - Oneshot irq which did not wake the thread (caused by a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 	 *   spurious interrupt or a primary handler handling it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) 	 *   completely).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) 	if (!irqd_irq_disabled(&desc->irq_data) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) 		unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640)  *	handle_level_irq - Level type irq handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643)  *	Level type interrupts are active as long as the hardware line has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644)  *	the active level. This may require to mask the interrupt and unmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645)  *	it after the associated handler has acknowledged the device, so the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646)  *	interrupt line is back to inactive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) void handle_level_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 	mask_ack_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 	 * If its disabled or no action available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) 	 * keep it masked and get out of here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) 	handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) 	cond_unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) EXPORT_SYMBOL_GPL(handle_level_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 	if (!(desc->istate & IRQS_ONESHOT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) 	 * We need to unmask in the following cases:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 	 * - Oneshot irq which did not wake the thread (caused by a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) 	 *   spurious interrupt or a primary handler handling it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) 	 *   completely).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 	if (!irqd_irq_disabled(&desc->irq_data) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) 		unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) 	} else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699)  *	handle_fasteoi_irq - irq handler for transparent controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702)  *	Only a single callback will be issued to the chip: an ->eoi()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703)  *	call when the interrupt has been serviced. This enables support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704)  *	for modern forms of interrupt handlers, which handle the flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705)  *	details in hardware, transparently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) void handle_fasteoi_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 	struct irq_chip *chip = desc->irq_data.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) 	 * If its disabled or no action available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) 	 * then mask it and get out of here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729) 	if (desc->istate & IRQS_ONESHOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732) 	handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734) 	cond_unmask_eoi_irq(desc, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746)  *	handle_fasteoi_nmi - irq handler for NMI interrupt lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749)  *	A simple NMI-safe handler, considering the restrictions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750)  *	from request_nmi.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752)  *	Only a single callback will be issued to the chip: an ->eoi()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753)  *	call when the interrupt has been serviced. This enables support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754)  *	for modern forms of interrupt handlers, which handle the flow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755)  *	details in hardware, transparently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) void handle_fasteoi_nmi(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760) 	struct irqaction *action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) 	unsigned int irq = irq_desc_get_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) 	irqreturn_t res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) 	__kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) 	trace_irq_handler_entry(irq, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) 	 * NMIs cannot be shared, there is only one action.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) 	res = action->handler(irq, action->dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 	trace_irq_handler_exit(irq, action, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) 	if (chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779)  *	handle_edge_irq - edge type IRQ handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782)  *	Interrupt occures on the falling and/or rising edge of a hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783)  *	signal. The occurrence is latched into the irq controller hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784)  *	and must be acked in order to be reenabled. After the ack another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785)  *	interrupt can happen on the same source even before the first one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786)  *	is handled by the associated event handler. If this happens it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787)  *	might be necessary to disable (mask) the interrupt depending on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788)  *	controller hardware. This requires to reenable the interrupt inside
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789)  *	of the loop which handles the interrupts which have arrived while
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790)  *	the handler was running. If all pending interrupts are handled, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791)  *	loop is left.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) void handle_edge_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 	if (!irq_may_run(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 		mask_ack_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) 	 * If its disabled or no action available then mask it and get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) 	 * out of here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) 	if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) 		mask_ack_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812) 		goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817) 	/* Start handling the irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) 	desc->irq_data.chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) 		if (unlikely(!desc->action)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) 			mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) 			goto out_unlock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) 		 * When another irq arrived while we were handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) 		 * one, we could have masked the irq.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) 		 * Renable it, if it was not disabled in meantime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) 		if (unlikely(desc->istate & IRQS_PENDING)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) 			if (!irqd_irq_disabled(&desc->irq_data) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 			    irqd_irq_masked(&desc->irq_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) 				unmask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) 		handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) 	} while ((desc->istate & IRQS_PENDING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) 		 !irqd_irq_disabled(&desc->irq_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842) out_unlock:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845) EXPORT_SYMBOL(handle_edge_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) #ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849)  *	handle_edge_eoi_irq - edge eoi type IRQ handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852)  * Similar as the above handle_edge_irq, but using eoi and w/o the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853)  * mask/unmask logic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) void handle_edge_eoi_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) 	if (!irq_may_run(desc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) 		goto out_eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 	 * If its disabled or no action available then mask it and get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 	 * out of here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 	if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 		goto out_eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) 	do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) 		if (unlikely(!desc->action))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 			goto out_eoi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 		handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) 	} while ((desc->istate & IRQS_PENDING) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) 		 !irqd_irq_disabled(&desc->irq_data));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) out_eoi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 	chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895)  *	handle_percpu_irq - Per CPU local irq handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898)  *	Per CPU interrupts on SMP machines without locking requirements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) void handle_percpu_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) 	 * PER CPU interrupts are not serialized. Do not touch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 	 * desc->tot_count.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 	__kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 	if (chip->irq_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) 		chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 	handle_irq_event_percpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 	if (chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920)  * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921)  * @desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923)  * Per CPU interrupts on SMP machines without locking requirements. Same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924)  * handle_percpu_irq() above but with the following extras:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926)  * action->percpu_dev_id is a pointer to percpu variables which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927)  * contain the real device id for the cpu on which this handler is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928)  * called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) void handle_percpu_devid_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) 	struct irqaction *action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 	unsigned int irq = irq_desc_get_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) 	irqreturn_t res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938) 	 * PER CPU interrupts are not serialized. Do not touch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939) 	 * desc->tot_count.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) 	__kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 	if (chip->irq_ack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 		chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 	if (likely(action)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 		trace_irq_handler_entry(irq, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 		res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 		trace_irq_handler_exit(irq, action, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 		unsigned int cpu = smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 		bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 		if (enabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 			irq_percpu_disable(desc, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 		pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 			    enabled ? " and unmasked" : "", irq, cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 	if (chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966)  * handle_percpu_devid_fasteoi_ipi - Per CPU local IPI handler with per cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967)  *				     dev ids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968)  * @desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970)  * The biggest difference with the IRQ version is that the interrupt is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971)  * EOIed early, as the IPI could result in a context switch, and we need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972)  * make sure the IPI can fire again. We also assume that the arch code has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973)  * registered an action. If not, we are positively doomed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) void handle_percpu_devid_fasteoi_ipi(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) 	struct irqaction *action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) 	unsigned int irq = irq_desc_get_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) 	irqreturn_t res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) 	__kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 	if (chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) 	trace_irq_handler_entry(irq, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 	res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) 	trace_irq_handler_exit(irq, action, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993)  * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994)  *				     dev ids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995)  * @desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997)  * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998)  * as a percpu pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) 	struct irq_chip *chip = irq_desc_get_chip(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) 	struct irqaction *action = desc->action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) 	unsigned int irq = irq_desc_get_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) 	irqreturn_t res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) 	__kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) 	trace_irq_handler_entry(irq, action);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) 	res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) 	trace_irq_handler_exit(irq, action, res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) 	if (chip->irq_eoi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) 		     int is_chained, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) 	if (!handle) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) 		handle = handle_bad_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 		struct irq_data *irq_data = &desc->irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) 		 * With hierarchical domains we might run into a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 		 * situation where the outermost chip is not yet set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 		 * up, but the inner chips are there.  Instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) 		 * bailing we install the handler, but obviously we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 		 * cannot enable/startup the interrupt at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 		while (irq_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 			if (irq_data->chip != &no_irq_chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 				break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 			 * Bail out if the outer chip is not set up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 			 * and the interrupt supposed to be started
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 			 * right away.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 			if (WARN_ON(is_chained))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 				return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 			/* Try the parent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) 			irq_data = irq_data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 		if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 			return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 	/* Uninstall? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 	if (handle == handle_bad_irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 		if (desc->irq_data.chip != &no_irq_chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) 			mask_ack_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 		irq_state_set_disabled(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 		if (is_chained)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) 			desc->action = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) 		desc->depth = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) 	desc->handle_irq = handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) 	desc->name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) 	if (handle != handle_bad_irq && is_chained) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) 		unsigned int type = irqd_get_trigger_type(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) 		 * We're about to start this interrupt immediately,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 		 * hence the need to set the trigger configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) 		 * But the .set_type callback may have overridden the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 		 * flow handler, ignoring that we're dealing with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 		 * chained interrupt. Reset it immediately because we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 		 * do know better.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 		if (type != IRQ_TYPE_NONE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) 			__irq_set_trigger(desc, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) 			desc->handle_irq = handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) 		irq_settings_set_noprobe(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) 		irq_settings_set_norequest(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) 		irq_settings_set_nothread(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) 		desc->action = &chained_action;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) 		irq_activate_and_startup(desc, IRQ_RESEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 		  const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 	__irq_do_set_handler(desc, handle, is_chained, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) 	irq_put_desc_busunlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) EXPORT_SYMBOL_GPL(__irq_set_handler);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) 				 void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 	desc->irq_common_data.handler_data = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) 	__irq_do_set_handler(desc, handle, 1, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 	irq_put_desc_busunlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 			      irq_flow_handler_t handle, const char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) 	irq_set_chip(irq, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) 	__irq_set_handler(irq, handle, 0, name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) void __irq_modify_status(unsigned int irq, unsigned long clr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) 			 unsigned long set, unsigned long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) 	unsigned long flags, trigger, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 	if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) 	 * Warn when a driver sets the no autoenable flag on an already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) 	 * active interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) 	WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) 	/* Warn when trying to clear or set a bit disallowed by the mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) 	WARN_ON((clr | set) & ~mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) 	__irq_settings_clr_and_set(desc, clr, set, mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) 	trigger = irqd_get_trigger_type(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) 	irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) 		   IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) 	if (irq_settings_has_no_balance_set(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) 		irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) 	if (irq_settings_is_per_cpu(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) 		irqd_set(&desc->irq_data, IRQD_PER_CPU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) 	if (irq_settings_can_move_pcntxt(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) 		irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) 	if (irq_settings_is_level(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) 		irqd_set(&desc->irq_data, IRQD_LEVEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) 	tmp = irq_settings_get_trigger_mask(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) 	if (tmp != IRQ_TYPE_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) 		trigger = tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) 	irqd_set(&desc->irq_data, trigger);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) 	irq_put_desc_unlock(desc, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) 	__irq_modify_status(irq, clr, set, _IRQF_MODIFY_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) EXPORT_SYMBOL_GPL(irq_modify_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)  *	irq_cpu_online - Invoke all irq_cpu_online functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178)  *	Iterate through all irqs and invoke the chip.irq_cpu_online()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)  *	for each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) void irq_cpu_online(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) 	struct irq_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) 	struct irq_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) 	unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) 	for_each_active_irq(irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) 		desc = irq_to_desc(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) 		if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) 		raw_spin_lock_irqsave(&desc->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) 		chip = irq_data_get_irq_chip(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) 		if (chip && chip->irq_cpu_online &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) 		     !irqd_irq_disabled(&desc->irq_data)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) 			chip->irq_cpu_online(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) 		raw_spin_unlock_irqrestore(&desc->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)  *	irq_cpu_offline - Invoke all irq_cpu_offline functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)  *	Iterate through all irqs and invoke the chip.irq_cpu_offline()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)  *	for each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) void irq_cpu_offline(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) 	struct irq_desc *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) 	struct irq_chip *chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) 	unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) 	for_each_active_irq(irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) 		desc = irq_to_desc(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) 		if (!desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) 		raw_spin_lock_irqsave(&desc->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) 		chip = irq_data_get_irq_chip(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) 		if (chip && chip->irq_cpu_offline &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 		     !irqd_irq_disabled(&desc->irq_data)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) 			chip->irq_cpu_offline(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) 		raw_spin_unlock_irqrestore(&desc->lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) #ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)  *	handle_fasteoi_ack_irq - irq handler for edge hierarchy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240)  *	stacked on transparent controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244)  *	Like handle_fasteoi_irq(), but for use with hierarchy where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)  *	the irq_chip also needs to have its ->irq_ack() function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246)  *	called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) void handle_fasteoi_ack_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) 	struct irq_chip *chip = desc->irq_data.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) 	 * If its disabled or no action available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) 	 * then mask it and get out of here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) 	if (desc->istate & IRQS_ONESHOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) 	/* Start handling the irq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) 	desc->irq_data.chip->irq_ack(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) 	handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) 	cond_unmask_eoi_irq(desc, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290)  *	handle_fasteoi_mask_irq - irq handler for level hierarchy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291)  *	stacked on transparent controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293)  *	@desc:	the interrupt description structure for this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)  *	Like handle_fasteoi_irq(), but for use with hierarchy where
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)  *	the irq_chip also needs to have its ->irq_mask_ack() function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297)  *	called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) void handle_fasteoi_mask_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) 	struct irq_chip *chip = desc->irq_data.chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) 	raw_spin_lock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) 	mask_ack_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) 	if (!irq_may_run(desc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) 	 * If its disabled or no action available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) 	 * then mask it and get out of here:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) 		desc->istate |= IRQS_PENDING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) 	kstat_incr_irqs_this_cpu(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) 	if (desc->istate & IRQS_ONESHOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) 		mask_irq(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) 	handle_irq_event(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) 	cond_unmask_eoi_irq(desc, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) 	return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) 		chip->irq_eoi(&desc->irq_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) 	raw_spin_unlock(&desc->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341)  * irq_chip_set_parent_state - set the state of a parent interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)  * @data: Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344)  * @which: State to be restored (one of IRQCHIP_STATE_*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345)  * @val: Value corresponding to @which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347)  * Conditional success, if the underlying irqchip does not implement it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) int irq_chip_set_parent_state(struct irq_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) 			      enum irqchip_irq_state which,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 			      bool val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) 	if (!data || !data->chip->irq_set_irqchip_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) 	return data->chip->irq_set_irqchip_state(data, which, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)  * irq_chip_get_parent_state - get the state of a parent interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)  * @data: Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)  * @which: one of IRQCHIP_STATE_* the caller wants to know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367)  * @state: a pointer to a boolean where the state is to be stored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369)  * Conditional success, if the underlying irqchip does not implement it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) int irq_chip_get_parent_state(struct irq_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) 			      enum irqchip_irq_state which,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 			      bool *state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) 	if (!data || !data->chip->irq_get_irqchip_state)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) 	return data->chip->irq_get_irqchip_state(data, which, state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385)  * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)  * NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) void irq_chip_enable_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) 	if (data->chip->irq_enable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) 		data->chip->irq_enable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) 		data->chip->irq_unmask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400)  * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401)  * NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) void irq_chip_disable_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) 	if (data->chip->irq_disable)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) 		data->chip->irq_disable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) 		data->chip->irq_mask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415)  * irq_chip_ack_parent - Acknowledge the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) void irq_chip_ack_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) 	data->chip->irq_ack(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)  * irq_chip_mask_parent - Mask the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) void irq_chip_mask_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) 	data->chip->irq_mask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)  * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) void irq_chip_mask_ack_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) 	data->chip->irq_mask_ack(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448)  * irq_chip_unmask_parent - Unmask the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) void irq_chip_unmask_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) 	data->chip->irq_unmask(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459)  * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) void irq_chip_eoi_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) 	data->chip->irq_eoi(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470)  * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472)  * @dest:	The affinity mask to set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473)  * @force:	Flag to enforce setting (disable online checks)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)  * Conditinal, as the underlying parent chip might not implement it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) int irq_chip_set_affinity_parent(struct irq_data *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) 				 const struct cpumask *dest, bool force)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) 	if (data->chip->irq_set_affinity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) 		return data->chip->irq_set_affinity(data, dest, force);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489)  * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491)  * @type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493)  * Conditional, as the underlying parent chip might not implement it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) 	if (data->chip->irq_set_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500) 		return data->chip->irq_set_type(data, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)  * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)  * Iterate through the domain hierarchy of the interrupt and check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511)  * whether a hw retrigger function exists. If yes, invoke it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) int irq_chip_retrigger_hierarchy(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) 	for (data = data->parent_data; data; data = data->parent_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) 		if (data->chip && data->chip->irq_retrigger)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) 			return data->chip->irq_retrigger(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524)  * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526)  * @vcpu_info:	The vcpu affinity information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) 	if (data->chip->irq_set_vcpu_affinity)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) 		return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)  * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540)  * @on:		Whether to set or reset the wake-up capability of this irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542)  * Conditional, as the underlying parent chip might not implement it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) 	if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) 	if (data->chip->irq_set_wake)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) 		return data->chip->irq_set_wake(data, on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559)  * irq_chip_request_resources_parent - Request resources on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) int irq_chip_request_resources_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) 	if (data->chip->irq_request_resources)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) 		return data->chip->irq_request_resources(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) 	return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574)  * irq_chip_release_resources_parent - Release resources on the parent interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) void irq_chip_release_resources_parent(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) 	data = data->parent_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) 	if (data->chip->irq_release_resources)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) 		data->chip->irq_release_resources(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)  * irq_chip_compose_msi_msg - Componse msi message for a irq chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589)  * @msg:	Pointer to the MSI message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591)  * For hierarchical domains we find the first chip in the hierarchy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592)  * which implements the irq_compose_msi_msg callback. For non
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593)  * hierarchical we use the top level chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) 	struct irq_data *pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) 	for (pos = NULL; !pos && data; data = irqd_get_parent_data(data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) 		if (data->chip && data->chip->irq_compose_msi_msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) 			pos = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) 	if (!pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) 		return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) 	pos->chip->irq_compose_msi_msg(pos, msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612)  * irq_chip_pm_get - Enable power for an IRQ chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)  * Enable the power to the IRQ chip referenced by the interrupt data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616)  * structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) int irq_chip_pm_get(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) 	int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) 	if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623) 		retval = pm_runtime_get_sync(data->chip->parent_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) 		if (retval < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625) 			pm_runtime_put_noidle(data->chip->parent_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) 			return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634)  * irq_chip_pm_put - Disable power for an IRQ chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)  * @data:	Pointer to interrupt specific data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637)  * Disable the power to the IRQ chip referenced by the interrupt data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638)  * structure, belongs. Note that power will only be disabled, once this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639)  * function has been called for all IRQs that have called irq_chip_pm_get().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) int irq_chip_pm_put(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) 	int retval = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) 	if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) 		retval = pm_runtime_put(data->chip->parent_device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) 	return (retval < 0) ? retval : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) }