Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * PCI Backend/Frontend Common Data Structures & Macros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Permission is hereby granted, free of charge, to any person obtaining a copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * of this software and associated documentation files (the "Software"), to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * deal in the Software without restriction, including without limitation the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * sell copies of the Software, and to permit persons to whom the Software is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * DEALINGS IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #ifndef __XEN_PCI_COMMON_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define __XEN_PCI_COMMON_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) /* Be sure to bump this number if you change this file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #define XEN_PCI_MAGIC "7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) /* xen_pci_sharedinfo flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define	_XEN_PCIF_active		(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define	XEN_PCIF_active			(1<<_XEN_PCIF_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define	_XEN_PCIB_AERHANDLER		(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define	XEN_PCIB_AERHANDLER		(1<<_XEN_PCIB_AERHANDLER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define	_XEN_PCIB_active		(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define	XEN_PCIB_active			(1<<_XEN_PCIB_active)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) /* xen_pci_op commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define	XEN_PCI_OP_conf_read		(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define	XEN_PCI_OP_conf_write		(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define	XEN_PCI_OP_enable_msi		(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define	XEN_PCI_OP_disable_msi		(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define	XEN_PCI_OP_enable_msix		(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define	XEN_PCI_OP_disable_msix		(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define	XEN_PCI_OP_aer_detected		(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define	XEN_PCI_OP_aer_resume		(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define	XEN_PCI_OP_aer_mmio		(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define	XEN_PCI_OP_aer_slotreset	(9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) /* xen_pci_op error numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define	XEN_PCI_ERR_success		(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define	XEN_PCI_ERR_dev_not_found	(-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define	XEN_PCI_ERR_invalid_offset	(-2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define	XEN_PCI_ERR_access_denied	(-3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define	XEN_PCI_ERR_not_implemented	(-4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /* XEN_PCI_ERR_op_failed - backend failed to complete the operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define XEN_PCI_ERR_op_failed		(-5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * it should be PAGE_SIZE-sizeof(struct xen_pci_op))/sizeof(struct msix_entry))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * Should not exceed 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define SH_INFO_MAX_VEC			128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) struct xen_msix_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	uint16_t vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	uint16_t entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) struct xen_pci_op {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	/* IN: what action to perform: XEN_PCI_OP_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	uint32_t cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	/* OUT: will contain an error number (if any) from errno.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	int32_t err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	/* IN: which device to touch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	uint32_t domain; /* PCI Domain/Segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	uint32_t bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	uint32_t devfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* IN: which configuration registers to touch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	int32_t offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	int32_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* IN/OUT: Contains the result after a READ or the value to WRITE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	uint32_t value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* IN: Contains extra infor for this operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	uint32_t info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/*IN:  param for msi-x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	struct xen_msix_entry msix_entries[SH_INFO_MAX_VEC];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) /*used for pcie aer handling*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) struct xen_pcie_aer_op {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	/* IN: what action to perform: XEN_PCI_OP_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	uint32_t cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/*IN/OUT: return aer_op result or carry error_detected state as input*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	int32_t err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	/* IN: which device to touch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	uint32_t domain; /* PCI Domain/Segment*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	uint32_t bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	uint32_t devfn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct xen_pci_sharedinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	/* flags - XEN_PCIF_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	uint32_t flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	struct xen_pci_op op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct xen_pcie_aer_op aer_op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif /* __XEN_PCI_COMMON_H__ */