^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _UVESAFB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _UVESAFB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <uapi/video/uvesafb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /* VBE CRTC Info Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) struct vbe_crtc_ib {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) u16 horiz_total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) u16 horiz_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) u16 horiz_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) u16 vert_total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) u16 vert_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) u16 vert_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u8 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u32 pixel_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u16 refresh_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u8 reserved[40];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define VBE_MODE_VGACOMPAT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define VBE_MODE_COLOR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define VBE_MODE_SUPPORTEDHW 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define VBE_MODE_GRAPHICS 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define VBE_MODE_LFB 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define VBE_MODE_MASK (VBE_MODE_COLOR | VBE_MODE_SUPPORTEDHW | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) VBE_MODE_GRAPHICS | VBE_MODE_LFB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* VBE Mode Info Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct vbe_mode_ib {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* for all VBE revisions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u16 mode_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u8 winA_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 winB_attr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u16 win_granularity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u16 win_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u16 winA_seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u16 winB_seg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) u32 win_func_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 bytes_per_scan_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /* for VBE 1.2+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u16 x_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u16 y_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u8 x_char_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u8 y_char_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u8 planes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u8 bits_per_pixel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u8 banks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 memory_model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u8 bank_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u8 image_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Direct color fields for direct/6 and YUV/7 memory models. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* Offsets are bit positions of lsb in the mask. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u8 red_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u8 red_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u8 green_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u8 green_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u8 blue_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u8 blue_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u8 rsvd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u8 rsvd_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u8 direct_color_info; /* direct color mode attributes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* for VBE 2.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 phys_base_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u8 reserved2[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* for VBE 3.0+ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u16 lin_bytes_per_scan_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 bnk_image_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u8 lin_image_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u8 lin_red_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) u8 lin_red_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) u8 lin_green_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u8 lin_green_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) u8 lin_blue_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) u8 lin_blue_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u8 lin_rsvd_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u8 lin_rsvd_off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u32 max_pixel_clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) u16 mode_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u8 depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define UVESAFB_DEFAULT_MODE "640x480-16"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* How long to wait for a reply from userspace [ms] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define UVESAFB_TIMEOUT 5000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* Max number of concurrent tasks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define UVESAFB_TASKS_MAX 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define dac_reg (0x3c8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define dac_val (0x3c9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct uvesafb_pal_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) u_char blue, green, red, pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) } __attribute__ ((packed));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct uvesafb_ktask {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct uvesafb_task t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) void *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct completion *done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) u32 ack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static int uvesafb_exec(struct uvesafb_ktask *tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define UVESAFB_EXACT_RES 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define UVESAFB_EXACT_DEPTH 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct uvesafb_par {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct vbe_ib vbe_ib; /* VBE Info Block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) struct vbe_mode_ib *vbe_modes; /* list of supported VBE modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) int vbe_modes_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u8 nocrtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) u8 ypan; /* 0 - nothing, 1 - ypan, 2 - ywrap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) u8 pmi_setpal; /* PMI for palette changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u16 *pmi_base; /* protected mode interface location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) void *pmi_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) void *pmi_pal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) u8 *vbe_state_orig; /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * original hardware state, before the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * driver was loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) u8 *vbe_state_saved; /* state saved by fb_save_state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) int vbe_state_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) atomic_t ref_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int mode_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct vbe_crtc_ib crtc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) int mtrr_handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif /* _UVESAFB_H */