Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  *	linux/include/video/pmag-ba-fb.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *	TURBOchannel PMAG-BA Color Frame Buffer (CFB) card support,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *	Copyright (C) 1999, 2000, 2001 by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *	Michael Engel <engel@unix-ag.org>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *	Karsten Merker <merker@linuxtag.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *	Copyright (c) 2005  Maciej W. Rozycki
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *	This file is subject to the terms and conditions of the GNU General
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *	Public License.  See the file COPYING in the main directory of this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *	archive for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* IOmem resource offsets.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PMAG_BA_FBMEM		0x000000	/* frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PMAG_BA_BT459		0x200000	/* Bt459 RAMDAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PMAG_BA_IRQ		0x300000	/* IRQ acknowledge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PMAG_BA_ROM		0x380000	/* REX option ROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PMAG_BA_BT438		0x380000	/* Bt438 clock chip reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PMAG_BA_SIZE		0x400000	/* address space size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* Bt459 register offsets, byte-wide registers.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define BT459_ADDR_LO		0x0		/* address low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define BT459_ADDR_HI		0x4		/* address high */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define BT459_DATA		0x8		/* data window register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define BT459_CMAP		0xc		/* color map window register */