^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Permedia2 framebuffer driver definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * --------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * $Id: pm2fb.h,v 1.26 2000/09/19 00:11:53 illo Exp $
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * --------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * License. See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef PM2FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define PM2FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define PM2_REFERENCE_CLOCK 14318 /* in KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PM2_MAX_PIXCLOCK 230000 /* in KHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PM2_REGS_SIZE 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PM2TAG(r) (u32 )(((r)-0x8000)>>3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Permedia2 registers used in the framebuffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PM2R_RESET_STATUS 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PM2R_IN_FIFO_SPACE 0x0018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define PM2R_OUT_FIFO_WORDS 0x0020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define PM2R_APERTURE_ONE 0x0050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PM2R_APERTURE_TWO 0x0058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define PM2R_FIFO_DISCON 0x0068
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define PM2R_CHIP_CONFIG 0x0070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define PM2R_REBOOT 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PM2R_MEM_CONTROL 0x1040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define PM2R_BOOT_ADDRESS 0x1080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define PM2R_MEM_CONFIG 0x10c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define PM2R_BYPASS_WRITE_MASK 0x1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PM2R_FRAMEBUFFER_WRITE_MASK 0x1140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PM2R_OUT_FIFO 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PM2R_SCREEN_BASE 0x3000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PM2R_SCREEN_STRIDE 0x3008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PM2R_H_TOTAL 0x3010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PM2R_HG_END 0x3018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define PM2R_HB_END 0x3020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define PM2R_HS_START 0x3028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define PM2R_HS_END 0x3030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define PM2R_V_TOTAL 0x3038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define PM2R_VB_END 0x3040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define PM2R_VS_START 0x3048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define PM2R_VS_END 0x3050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define PM2R_VIDEO_CONTROL 0x3058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define PM2R_LINE_COUNT 0x3070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define PM2R_FIFO_CONTROL 0x3078
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define PM2R_RD_PALETTE_WRITE_ADDRESS 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define PM2R_RD_PALETTE_DATA 0x4008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define PM2R_RD_PIXEL_MASK 0x4010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define PM2R_RD_PALETTE_READ_ADDRESS 0x4018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define PM2R_RD_CURSOR_COLOR_ADDRESS 0x4020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define PM2R_RD_CURSOR_COLOR_DATA 0x4028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define PM2R_RD_INDEXED_DATA 0x4050
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define PM2R_RD_CURSOR_DATA 0x4058
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define PM2R_RD_CURSOR_X_LSB 0x4060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define PM2R_RD_CURSOR_X_MSB 0x4068
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define PM2R_RD_CURSOR_Y_LSB 0x4070
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define PM2R_RD_CURSOR_Y_MSB 0x4078
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define PM2R_START_X_DOM 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define PM2R_D_X_DOM 0x8008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define PM2R_START_X_SUB 0x8010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define PM2R_D_X_SUB 0x8018
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define PM2R_START_Y 0x8020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define PM2R_D_Y 0x8028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define PM2R_COUNT 0x8030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define PM2R_RENDER 0x8038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define PM2R_BIT_MASK_PATTERN 0x8068
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define PM2R_RASTERIZER_MODE 0x80a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define PM2R_RECTANGLE_ORIGIN 0x80d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define PM2R_RECTANGLE_SIZE 0x80d8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define PM2R_PACKED_DATA_LIMITS 0x8150
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define PM2R_SCISSOR_MODE 0x8180
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define PM2R_SCISSOR_MIN_XY 0x8188
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define PM2R_SCISSOR_MAX_XY 0x8190
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define PM2R_SCREEN_SIZE 0x8198
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define PM2R_AREA_STIPPLE_MODE 0x81a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define PM2R_WINDOW_ORIGIN 0x81c8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define PM2R_TEXTURE_ADDRESS_MODE 0x8380
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define PM2R_TEXTURE_MAP_FORMAT 0x8588
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define PM2R_TEXTURE_DATA_FORMAT 0x8590
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define PM2R_TEXTURE_READ_MODE 0x8670
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define PM2R_TEXEL_LUT_MODE 0x8678
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define PM2R_TEXTURE_COLOR_MODE 0x8680
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define PM2R_FOG_MODE 0x8690
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define PM2R_TEXEL0 0x8760
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define PM2R_COLOR_DDA_MODE 0x87e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PM2R_CONSTANT_COLOR 0x87e8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PM2R_ALPHA_BLEND_MODE 0x8810
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define PM2R_DITHER_MODE 0x8818
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define PM2R_FB_SOFT_WRITE_MASK 0x8820
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define PM2R_LOGICAL_OP_MODE 0x8828
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define PM2R_LB_READ_MODE 0x8880
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PM2R_LB_READ_FORMAT 0x8888
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define PM2R_LB_SOURCE_OFFSET 0x8890
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define PM2R_LB_WINDOW_BASE 0x88b8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define PM2R_LB_WRITE_FORMAT 0x88c8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define PM2R_STENCIL_MODE 0x8988
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define PM2R_DEPTH_MODE 0x89a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define PM2R_FB_READ_MODE 0x8a80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define PM2R_FB_SOURCE_OFFSET 0x8a88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define PM2R_FB_PIXEL_OFFSET 0x8a90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define PM2R_FB_WINDOW_BASE 0x8ab0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define PM2R_FB_WRITE_MODE 0x8ab8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define PM2R_FB_HARD_WRITE_MASK 0x8ac0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define PM2R_FB_BLOCK_COLOR 0x8ac8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define PM2R_FB_READ_PIXEL 0x8ad0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define PM2R_FILTER_MODE 0x8c00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define PM2R_SYNC 0x8c40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define PM2R_YUV_MODE 0x8f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define PM2R_STATISTICS_MODE 0x8c08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define PM2R_FB_SOURCE_DELTA 0x8d88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define PM2R_CONFIG 0x8d90
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define PM2R_DELTA_MODE 0x9300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* Permedia2v */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define PM2VR_RD_INDEX_LOW 0x4020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define PM2VR_RD_INDEX_HIGH 0x4028
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define PM2VR_RD_INDEXED_DATA 0x4030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Permedia2 RAMDAC indexed registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define PM2I_RD_CURSOR_CONTROL 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define PM2I_RD_COLOR_MODE 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define PM2I_RD_MODE_CONTROL 0x19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define PM2I_RD_MISC_CONTROL 0x1e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) #define PM2I_RD_PIXEL_CLOCK_A1 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #define PM2I_RD_PIXEL_CLOCK_A2 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #define PM2I_RD_PIXEL_CLOCK_A3 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) #define PM2I_RD_PIXEL_CLOCK_STATUS 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define PM2I_RD_MEMORY_CLOCK_1 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define PM2I_RD_MEMORY_CLOCK_2 0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define PM2I_RD_MEMORY_CLOCK_3 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define PM2I_RD_MEMORY_CLOCK_STATUS 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define PM2I_RD_COLOR_KEY_CONTROL 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define PM2I_RD_OVERLAY_KEY 0x41
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define PM2I_RD_RED_KEY 0x42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define PM2I_RD_GREEN_KEY 0x43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define PM2I_RD_BLUE_KEY 0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* Permedia2v extensions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define PM2VI_RD_MISC_CONTROL 0x000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define PM2VI_RD_SYNC_CONTROL 0x001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define PM2VI_RD_DAC_CONTROL 0x002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define PM2VI_RD_PIXEL_SIZE 0x003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define PM2VI_RD_COLOR_FORMAT 0x004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define PM2VI_RD_CURSOR_MODE 0x005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define PM2VI_RD_CURSOR_X_LOW 0x007
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define PM2VI_RD_CURSOR_X_HIGH 0x008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define PM2VI_RD_CURSOR_Y_LOW 0x009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define PM2VI_RD_CURSOR_Y_HIGH 0x00A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define PM2VI_RD_CURSOR_X_HOT 0x00B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define PM2VI_RD_CURSOR_Y_HOT 0x00C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define PM2VI_RD_OVERLAY_KEY 0x00D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define PM2VI_RD_CLK0_PRESCALE 0x201
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define PM2VI_RD_CLK0_FEEDBACK 0x202
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define PM2VI_RD_CLK0_POSTSCALE 0x203
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define PM2VI_RD_CLK1_PRESCALE 0x204
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define PM2VI_RD_CLK1_FEEDBACK 0x205
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define PM2VI_RD_CLK1_POSTSCALE 0x206
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define PM2VI_RD_MCLK_CONTROL 0x20D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define PM2VI_RD_MCLK_PRESCALE 0x20E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define PM2VI_RD_MCLK_FEEDBACK 0x20F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define PM2VI_RD_MCLK_POSTSCALE 0x210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define PM2VI_RD_CURSOR_PALETTE 0x303
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define PM2VI_RD_CURSOR_PATTERN 0x400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* Fields and flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define PM2F_RENDER_AREASTIPPLE (1L<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define PM2F_RENDER_FASTFILL (1L<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define PM2F_RENDER_PRIMITIVE_MASK (3L<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define PM2F_RENDER_LINE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define PM2F_RENDER_TRAPEZOID (1L<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #define PM2F_RENDER_POINT (2L<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define PM2F_RENDER_RECTANGLE (3L<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define PM2F_RENDER_SYNC_ON_BIT_MASK (1L<<11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define PM2F_RENDER_TEXTURE_ENABLE (1L<<13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define PM2F_SYNCHRONIZATION (1L<<10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define PM2F_PLL_LOCKED 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define PM2F_BEING_RESET (1L<<31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #define PM2F_DATATYPE_COLOR 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) #define PM2F_VGA_ENABLE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define PM2F_VGA_FIXED 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) #define PM2F_FB_WRITE_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define PM2F_FB_READ_SOURCE_ENABLE 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define PM2F_RD_PALETTE_WIDTH_8 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define PM2F_PART_PROD_MASK 0x01ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define PM2F_SCREEN_SCISSOR_ENABLE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define PM2F_DATA_64_ENABLE 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) #define PM2F_BLANK_LOW 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #define PM2F_HSYNC_MASK 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define PM2F_VSYNC_MASK 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) #define PM2F_HSYNC_ACT_HIGH 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define PM2F_HSYNC_FORCED_LOW 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define PM2F_HSYNC_ACT_LOW 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define PM2F_VSYNC_ACT_HIGH 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define PM2F_VSYNC_FORCED_LOW 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define PM2F_VSYNC_ACT_LOW 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define PM2F_LINE_DOUBLE 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define PM2F_VIDEO_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #define PM2F_RD_PIXELFORMAT_SVGA 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define PM2F_RD_PIXELFORMAT_RGB232OFFSET 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define PM2F_RD_PIXELFORMAT_RGBA2321 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) #define PM2F_RD_PIXELFORMAT_RGBA5551 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define PM2F_RD_PIXELFORMAT_RGBA4444 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define PM2F_RD_PIXELFORMAT_RGB565 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define PM2F_RD_PIXELFORMAT_RGBA8888 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define PM2F_RD_PIXELFORMAT_RGB888 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define PM2F_RD_GUI_ACTIVE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define PM2F_RD_COLOR_MODE_RGB 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #define PM2F_DELTA_ORDER_RGB (1L<<18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #define PM2F_RD_TRUECOLOR 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #define PM2F_NO_ALPHA_BUFFER 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define PM2F_TEXTEL_SIZE_16 0x00080000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define PM2F_TEXTEL_SIZE_32 0x00100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define PM2F_TEXTEL_SIZE_4 0x00180000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) #define PM2F_TEXTEL_SIZE_24 0x00200000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) #define PM2F_INCREASE_X (1L<<21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) #define PM2F_INCREASE_Y (1L<<22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #define PM2F_CONFIG_FB_WRITE_ENABLE (1L<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define PM2F_CONFIG_FB_PACKED_DATA (1L<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define PM2F_CONFIG_FB_READ_DEST_ENABLE (1L<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define PM2F_CONFIG_FB_READ_SOURCE_ENABLE (1L<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #define PM2F_COLOR_KEY_TEST_OFF (1L<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #define PM2F_MEM_CONFIG_RAM_MASK (3L<<29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) #define PM2F_MEM_BANKS_1 0L
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) #define PM2F_MEM_BANKS_2 (1L<<29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define PM2F_MEM_BANKS_3 (2L<<29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) #define PM2F_MEM_BANKS_4 (3L<<29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #define PM2F_APERTURE_STANDARD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) #define PM2F_APERTURE_BYTESWAP 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) #define PM2F_APERTURE_HALFWORDSWAP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define PM2F_CURSORMODE_CURSOR_ENABLE (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define PM2F_CURSORMODE_TYPE_X (1 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) PM2_TYPE_PERMEDIA2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) PM2_TYPE_PERMEDIA2V
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) } pm2type_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) #endif /* PM2FB_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * That's all folks!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) *****************************************************************************/
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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