^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Header file for TI DA8XX LCD controller platform data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2008-2009 MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2008-2009 Texas Instruments Inc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * version 2. This program is licensed "as is" without any warranty of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef DA8XX_FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define DA8XX_FB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) enum panel_shade {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MONOCHROME = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) COLOR_ACTIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) COLOR_PASSIVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum raster_load_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) LOAD_DATA = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) LOAD_PALETTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum da8xx_frame_complete {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) DA8XX_FRAME_WAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) DA8XX_FRAME_NOWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct da8xx_lcdc_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) const char manu_name[10];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void *controller_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) const char type[25];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct lcd_ctrl_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) enum panel_shade panel_shade;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* AC Bias Pin Frequency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int ac_bias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /* AC Bias Pin Transitions per Interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int ac_bias_intrpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* DMA burst size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int dma_burst_sz;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Bits per pixel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* FIFO DMA Request Delay */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int fdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* TFT Alternative Signal Mapping (Only for active) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned char tft_alt_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* 12 Bit Per Pixel (5-6-5) Mode (Only for passive) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned char stn_565_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Mono 8-bit Mode: 1=D0-D7 or 0=D0-D3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned char mono_8bit_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* Horizontal and Vertical Sync Edge: 0=rising 1=falling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned char sync_edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Raster Data Order Select: 1=Most-to-least 0=Least-to-most */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned char raster_order;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* DMA FIFO threshold */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int fifo_th;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct lcd_sync_arg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int back_porch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int front_porch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int pulse_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* ioctls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define FBIOGET_CONTRAST _IOR('F', 1, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define FBIOPUT_CONTRAST _IOW('F', 2, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define FBIGET_BRIGHTNESS _IOR('F', 3, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define FBIPUT_BRIGHTNESS _IOW('F', 3, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define FBIGET_COLOR _IOR('F', 5, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define FBIPUT_COLOR _IOW('F', 6, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define FBIPUT_HSYNC _IOW('F', 9, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define FBIPUT_VSYNC _IOW('F', 10, int)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Proprietary FB_SYNC_ flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define FB_SYNC_CLK_INVERT 0x40000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #endif /* ifndef DA8XX_FB_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)