^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2008 Red Hat Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2007-2008 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Permission is hereby granted, free of charge, to any person obtaining a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * copy of this software and associated documentation files (the "Software"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * to deal in the Software without restriction, including without limitation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * the rights to use, copy, modify, merge, publish, distribute, sublicense,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * and/or sell copies of the Software, and to permit persons to whom the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Software is furnished to do so, subject to the following conditions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * The above copyright notice and this permission notice shall be included in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * all copies or substantial portions of the Software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * IN THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifndef _DRM_MODE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define _DRM_MODE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "drm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #if defined(__cplusplus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extern "C" {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * DOC: overview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * DRM exposes many UAPI and structure definition to have a consistent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * and standardized interface with user.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Userspace can refer to these structure definitions and UAPI formats
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * to communicate to driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define DRM_CONNECTOR_NAME_LEN 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define DRM_DISPLAY_MODE_LEN 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define DRM_PROP_NAME_LEN 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define DRM_MODE_TYPE_BUILTIN (1<<0) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define DRM_MODE_TYPE_PREFERRED (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define DRM_MODE_TYPE_DEFAULT (1<<4) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define DRM_MODE_TYPE_USERDEF (1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define DRM_MODE_TYPE_DRIVER (1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) DRM_MODE_TYPE_USERDEF | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) DRM_MODE_TYPE_DRIVER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Video mode flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* bit compatible with the xrandr RR_ definitions (bits 0-13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * ABI warning: Existing userspace really expects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * the mode flags to match the xrandr definitions. Any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * changes that don't match the xrandr definitions will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * likely need a new client cap or some other mechanism
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * to avoid breaking existing userspace. This includes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * allocating new flags in the previously unused bits!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define DRM_MODE_FLAG_PHSYNC (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define DRM_MODE_FLAG_NHSYNC (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define DRM_MODE_FLAG_PVSYNC (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define DRM_MODE_FLAG_NVSYNC (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define DRM_MODE_FLAG_INTERLACE (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define DRM_MODE_FLAG_DBLSCAN (1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define DRM_MODE_FLAG_CSYNC (1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define DRM_MODE_FLAG_PCSYNC (1<<7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define DRM_MODE_FLAG_NCSYNC (1<<8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define DRM_MODE_FLAG_BCAST (1<<10) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define DRM_MODE_FLAG_PIXMUX (1<<11) /* deprecated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define DRM_MODE_FLAG_DBLCLK (1<<12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * (define not exposed to user space).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define DRM_MODE_FLAG_3D_NONE (0<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* Picture aspect ratio options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define DRM_MODE_PICTURE_ASPECT_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define DRM_MODE_PICTURE_ASPECT_4_3 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define DRM_MODE_PICTURE_ASPECT_16_9 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define DRM_MODE_PICTURE_ASPECT_64_27 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define DRM_MODE_PICTURE_ASPECT_256_135 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* Content type options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define DRM_MODE_CONTENT_TYPE_NO_DATA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define DRM_MODE_CONTENT_TYPE_PHOTO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define DRM_MODE_CONTENT_TYPE_CINEMA 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define DRM_MODE_CONTENT_TYPE_GAME 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Aspect ratio flag bitmask (4 bits 22:19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define DRM_MODE_FLAG_PIC_AR_NONE \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) (DRM_MODE_PICTURE_ASPECT_NONE<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define DRM_MODE_FLAG_PIC_AR_4_3 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) (DRM_MODE_PICTURE_ASPECT_4_3<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define DRM_MODE_FLAG_PIC_AR_16_9 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) (DRM_MODE_PICTURE_ASPECT_16_9<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define DRM_MODE_FLAG_PIC_AR_64_27 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) (DRM_MODE_PICTURE_ASPECT_64_27<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define DRM_MODE_FLAG_PIC_AR_256_135 \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) (DRM_MODE_PICTURE_ASPECT_256_135<<19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) DRM_MODE_FLAG_NHSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) DRM_MODE_FLAG_PVSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) DRM_MODE_FLAG_NVSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) DRM_MODE_FLAG_INTERLACE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) DRM_MODE_FLAG_DBLSCAN | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) DRM_MODE_FLAG_CSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) DRM_MODE_FLAG_PCSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) DRM_MODE_FLAG_NCSYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) DRM_MODE_FLAG_HSKEW | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) DRM_MODE_FLAG_DBLCLK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) DRM_MODE_FLAG_CLKDIV2 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) DRM_MODE_FLAG_3D_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* DPMS flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* bit compatible with the xorg definitions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define DRM_MODE_DPMS_ON 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define DRM_MODE_DPMS_STANDBY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define DRM_MODE_DPMS_SUSPEND 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define DRM_MODE_DPMS_OFF 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* Scaling mode options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) software can still scale) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Dithering mode options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define DRM_MODE_DITHERING_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #define DRM_MODE_DITHERING_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define DRM_MODE_DITHERING_AUTO 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Dirty info options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define DRM_MODE_DIRTY_OFF 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define DRM_MODE_DIRTY_ON 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define DRM_MODE_DIRTY_ANNOTATE 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* Link Status options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define DRM_MODE_LINK_STATUS_GOOD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define DRM_MODE_LINK_STATUS_BAD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * DRM_MODE_ROTATE_<degrees>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * Signals that a drm plane is been rotated <degrees> degrees in counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * clockwise direction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * This define is provided as a convenience, looking up the property id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * using the name->prop id lookup is the preferred method.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define DRM_MODE_ROTATE_0 (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define DRM_MODE_ROTATE_90 (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define DRM_MODE_ROTATE_180 (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define DRM_MODE_ROTATE_270 (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * DRM_MODE_ROTATE_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * Bitmask used to look for drm plane rotations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define DRM_MODE_ROTATE_MASK (\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) DRM_MODE_ROTATE_0 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) DRM_MODE_ROTATE_90 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) DRM_MODE_ROTATE_180 | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) DRM_MODE_ROTATE_270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * DRM_MODE_REFLECT_<axis>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * Signals that the contents of a drm plane is reflected along the <axis> axis,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * in the same way as mirroring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * See kerneldoc chapter "Plane Composition Properties" for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * This define is provided as a convenience, looking up the property id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * using the name->prop id lookup is the preferred method.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define DRM_MODE_REFLECT_X (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define DRM_MODE_REFLECT_Y (1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * DRM_MODE_REFLECT_MASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * Bitmask used to look for drm plane reflections.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #define DRM_MODE_REFLECT_MASK (\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) DRM_MODE_REFLECT_X | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DRM_MODE_REFLECT_Y)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Content Protection Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct drm_mode_modeinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) __u32 clock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) __u16 hdisplay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) __u16 hsync_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) __u16 hsync_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) __u16 htotal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) __u16 hskew;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) __u16 vdisplay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) __u16 vsync_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) __u16 vsync_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) __u16 vtotal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) __u16 vscan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) __u32 vrefresh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) __u32 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) char name[DRM_DISPLAY_MODE_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) struct drm_mode_card_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) __u64 fb_id_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) __u64 crtc_id_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) __u64 connector_id_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) __u64 encoder_id_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) __u32 count_fbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) __u32 count_crtcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) __u32 count_connectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) __u32 count_encoders;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) __u32 min_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) __u32 max_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) __u32 min_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) __u32 max_height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) struct drm_mode_crtc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) __u64 set_connectors_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) __u32 count_connectors;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) __u32 crtc_id; /**< Id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) __u32 fb_id; /**< Id of framebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) __u32 x; /**< x Position on the framebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) __u32 y; /**< y Position on the framebuffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) __u32 gamma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) __u32 mode_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct drm_mode_modeinfo mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) #define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Planes blend with or override other bits on the CRTC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct drm_mode_set_plane {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) __u32 plane_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) __u32 fb_id; /* fb object contains surface format type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) __u32 flags; /* see above flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* Signed dest location allows it to be partially off screen */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) __s32 crtc_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) __s32 crtc_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) __u32 crtc_w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) __u32 crtc_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) /* Source values are 16.16 fixed point */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) __u32 src_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) __u32 src_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) __u32 src_h;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) __u32 src_w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct drm_mode_get_plane {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) __u32 plane_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) __u32 possible_crtcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) __u32 gamma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) __u32 count_format_types;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) __u64 format_type_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct drm_mode_get_plane_res {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) __u64 plane_id_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) __u32 count_planes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define DRM_MODE_ENCODER_NONE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) #define DRM_MODE_ENCODER_DAC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #define DRM_MODE_ENCODER_TMDS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define DRM_MODE_ENCODER_LVDS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #define DRM_MODE_ENCODER_TVDAC 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #define DRM_MODE_ENCODER_VIRTUAL 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #define DRM_MODE_ENCODER_DSI 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) #define DRM_MODE_ENCODER_DPMST 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #define DRM_MODE_ENCODER_DPI 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct drm_mode_get_encoder {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) __u32 encoder_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) __u32 encoder_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) __u32 crtc_id; /**< Id of crtc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) __u32 possible_crtcs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) __u32 possible_clones;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* This is for connectors with multiple signal types. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) enum drm_mode_subconnector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) DRM_MODE_SUBCONNECTOR_Automatic = 0, /* DVI-I, TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) DRM_MODE_SUBCONNECTOR_Unknown = 0, /* DVI-I, TV, DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) DRM_MODE_SUBCONNECTOR_VGA = 1, /* DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) DRM_MODE_SUBCONNECTOR_DVID = 3, /* DVI-I DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) DRM_MODE_SUBCONNECTOR_DVIA = 4, /* DVI-I */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) DRM_MODE_SUBCONNECTOR_Composite = 5, /* TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) DRM_MODE_SUBCONNECTOR_SVIDEO = 6, /* TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) DRM_MODE_SUBCONNECTOR_Component = 8, /* TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) DRM_MODE_SUBCONNECTOR_SCART = 9, /* TV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) DRM_MODE_SUBCONNECTOR_DisplayPort = 10, /* DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) DRM_MODE_SUBCONNECTOR_HDMIA = 11, /* DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) DRM_MODE_SUBCONNECTOR_Native = 15, /* DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) DRM_MODE_SUBCONNECTOR_Wireless = 18, /* DP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) #define DRM_MODE_CONNECTOR_Unknown 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) #define DRM_MODE_CONNECTOR_VGA 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #define DRM_MODE_CONNECTOR_DVII 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) #define DRM_MODE_CONNECTOR_DVID 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) #define DRM_MODE_CONNECTOR_DVIA 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #define DRM_MODE_CONNECTOR_Composite 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) #define DRM_MODE_CONNECTOR_SVIDEO 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) #define DRM_MODE_CONNECTOR_LVDS 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #define DRM_MODE_CONNECTOR_Component 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #define DRM_MODE_CONNECTOR_9PinDIN 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) #define DRM_MODE_CONNECTOR_DisplayPort 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #define DRM_MODE_CONNECTOR_HDMIA 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) #define DRM_MODE_CONNECTOR_HDMIB 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) #define DRM_MODE_CONNECTOR_TV 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) #define DRM_MODE_CONNECTOR_eDP 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #define DRM_MODE_CONNECTOR_VIRTUAL 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #define DRM_MODE_CONNECTOR_DSI 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #define DRM_MODE_CONNECTOR_DPI 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define DRM_MODE_CONNECTOR_WRITEBACK 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #define DRM_MODE_CONNECTOR_SPI 19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct drm_mode_get_connector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) __u64 encoders_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) __u64 modes_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) __u64 props_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) __u64 prop_values_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) __u32 count_modes;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) __u32 count_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) __u32 count_encoders;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) __u32 encoder_id; /**< Current Encoder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) __u32 connector_id; /**< Id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) __u32 connector_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) __u32 connector_type_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) __u32 connection;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) __u32 mm_width; /**< width in millimeters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) __u32 mm_height; /**< height in millimeters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) __u32 subpixel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) __u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #define DRM_MODE_PROP_PENDING (1<<0) /* deprecated, do not use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) #define DRM_MODE_PROP_RANGE (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) #define DRM_MODE_PROP_IMMUTABLE (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define DRM_MODE_PROP_BLOB (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* non-extended types: legacy bitmask, one bit per type: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define DRM_MODE_PROP_LEGACY_TYPE ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) DRM_MODE_PROP_RANGE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) DRM_MODE_PROP_ENUM | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) DRM_MODE_PROP_BLOB | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) DRM_MODE_PROP_BITMASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* extended-types: rather than continue to consume a bit per type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * grab a chunk of the bits to use as integer type id.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) #define DRM_MODE_PROP_TYPE(n) ((n) << 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) /* the PROP_ATOMIC flag is used to hide properties from userspace that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * is not aware of atomic properties. This is mostly to work around
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * older userspace (DDX drivers) that read/write each prop they find,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * witout being aware that this could be triggering a lengthy modeset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #define DRM_MODE_PROP_ATOMIC 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) struct drm_mode_property_enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) __u64 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) char name[DRM_PROP_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct drm_mode_get_property {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) __u64 values_ptr; /* values and blob lengths */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) __u64 enum_blob_ptr; /* enum and blob id ptrs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) __u32 prop_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) char name[DRM_PROP_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) __u32 count_values;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* This is only used to count enum values, not blobs. The _blobs is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * simply because of a historical reason, i.e. backwards compat. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) __u32 count_enum_blobs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) struct drm_mode_connector_set_property {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) __u64 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) __u32 prop_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) __u32 connector_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) #define DRM_MODE_OBJECT_CRTC 0xcccccccc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define DRM_MODE_OBJECT_MODE 0xdededede
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define DRM_MODE_OBJECT_FB 0xfbfbfbfb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #define DRM_MODE_OBJECT_ANY 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) struct drm_mode_obj_get_properties {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) __u64 props_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) __u64 prop_values_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) __u32 count_props;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) __u32 obj_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) __u32 obj_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) struct drm_mode_obj_set_property {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) __u64 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) __u32 prop_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) __u32 obj_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) __u32 obj_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct drm_mode_get_blob {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) __u32 blob_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) __u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) __u64 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct drm_mode_fb_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) __u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) __u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) __u32 pitch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) __u32 bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) __u32 depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) /* driver specific handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct drm_mode_fb_cmd2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) __u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) __u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) __u32 pixel_format; /* fourcc code from drm_fourcc.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) __u32 flags; /* see above flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) * In case of planar formats, this ioctl allows up to 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) * buffer objects with offsets and pitches per plane.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * The pitch and offset order is dictated by the fourcc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * e.g. NV12 (https://fourcc.org/yuv.php#NV12) is described as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * YUV 4:2:0 image with a plane of 8 bit Y samples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * followed by an interleaved U/V plane containing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * 8 bit 2x2 subsampled colour difference samples.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * So it would consist of Y as offsets[0] and UV as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * offsets[1]. Note that offsets[0] will generally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * be 0 (but this is not required).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) * To accommodate tiled, compressed, etc formats, a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * modifier can be specified. The default value of zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) * indicates "native" format as specified by the fourcc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) * Vendor specific modifier token. Note that even though
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) * it looks like we have a modifier per-plane, we in fact
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * do not. The modifier for each plane must be identical.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * Thus all combinations of different data layouts for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * multi plane formats must be enumerated as separate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * modifiers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) __u32 handles[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) __u32 pitches[4]; /* pitch for each plane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) __u32 offsets[4]; /* offset of each plane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) __u64 modifier[4]; /* ie, tiling, compress */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #define DRM_MODE_FB_DIRTY_FLAGS 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) * Mark a region of a framebuffer as dirty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * Some hardware does not automatically update display contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * as a hardware or software draw to a framebuffer. This ioctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) * allows userspace to tell the kernel and the hardware what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) * regions of the framebuffer have changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * The kernel or hardware is free to update more then just the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * region specified by the clip rects. The kernel or hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * may also delay and/or coalesce several calls to dirty into a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) * single update.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * Userspace may annotate the updates, the annotates are a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) * promise made by the caller that the change is either a copy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * of pixels or a fill of a single color in the region specified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) * the number of updated regions are half of num_clips given,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) * where the clip rects are paired in src and dst. The width and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) * height of each one of the pairs must match.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) * promises that the region specified of the clip rects is filled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) * completely with a single color as given in the color argument.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) struct drm_mode_fb_dirty_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) __u32 color;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) __u32 num_clips;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) __u64 clips_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) struct drm_mode_mode_cmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) __u32 connector_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) struct drm_mode_modeinfo mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) #define DRM_MODE_CURSOR_BO 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) #define DRM_MODE_CURSOR_MOVE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) #define DRM_MODE_CURSOR_FLAGS 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) * depending on the value in flags different members are used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) * CURSOR_BO uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) * crtc_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) * width
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) * height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) * handle - if 0 turns the cursor off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * CURSOR_MOVE uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * crtc_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct drm_mode_cursor {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) __s32 x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) __s32 y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) __u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) __u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) /* driver specific handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) struct drm_mode_cursor2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) __s32 x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) __s32 y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) __u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) __u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* driver specific handle */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) __s32 hot_x;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) __s32 hot_y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct drm_mode_crtc_lut {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) __u32 gamma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) /* pointers to arrays */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) __u64 red;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) __u64 green;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) __u64 blue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) struct drm_color_ctm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * Conversion matrix in S31.32 sign-magnitude
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) * (not two's complement!) format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) __u64 matrix[9];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) struct drm_color_lut {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * 0xffff == 1.0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) __u16 red;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) __u16 green;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) __u16 blue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) __u16 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) * struct hdr_metadata_infoframe - HDR Metadata Infoframe Data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * HDR Metadata Infoframe as per CTA 861.G spec. This is expected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * to match exactly with the spec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * Userspace is expected to pass the metadata information as per
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * the format described in this structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) struct hdr_metadata_infoframe {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * @eotf: Electro-Optical Transfer Function (EOTF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) * used in the stream.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) __u8 eotf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * @metadata_type: Static_Metadata_Descriptor_ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) __u8 metadata_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) * @display_primaries: Color Primaries of the Data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) * These are coded as unsigned 16-bit values in units of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * 0.00002, where 0x0000 represents zero and 0xC350
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * represents 1.0000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) * @display_primaries.x: X cordinate of color primary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * @display_primaries.y: Y cordinate of color primary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) __u16 x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) } display_primaries[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * @white_point: White Point of Colorspace Data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * These are coded as unsigned 16-bit values in units of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * 0.00002, where 0x0000 represents zero and 0xC350
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * represents 1.0000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * @white_point.x: X cordinate of whitepoint of color primary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) * @white_point.y: Y cordinate of whitepoint of color primary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) __u16 x, y;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) } white_point;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * @max_display_mastering_luminance: Max Mastering Display Luminance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) __u16 max_display_mastering_luminance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * @min_display_mastering_luminance: Min Mastering Display Luminance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) * This value is coded as an unsigned 16-bit value in units of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * 0.0001 cd/m2, where 0x0001 represents 0.0001 cd/m2 and 0xFFFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * represents 6.5535 cd/m2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) __u16 min_display_mastering_luminance;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * @max_cll: Max Content Light Level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) __u16 max_cll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * @max_fall: Max Frame Average Light Level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) __u16 max_fall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * struct hdr_output_metadata - HDR output metadata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * Metadata Information to be passed from userspace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) struct hdr_output_metadata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * @metadata_type: Static_Metadata_Descriptor_ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) __u32 metadata_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) * @hdmi_metadata_type1: HDR Metadata Infoframe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) struct hdr_metadata_infoframe hdmi_metadata_type1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) #define DRM_MODE_PAGE_FLIP_EVENT 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) DRM_MODE_PAGE_FLIP_ASYNC | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) DRM_MODE_PAGE_FLIP_TARGET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * Request a page flip on the specified crtc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * This ioctl will ask KMS to schedule a page flip for the specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) * crtc. Once any pending rendering targeting the specified fb (as of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * ioctl time) has completed, the crtc will be reprogrammed to display
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * that fb after the next vertical refresh. The ioctl returns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * immediately, but subsequent rendering to the current fb will block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * in the execbuffer ioctl until the page flip happens. If a page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * flip is already pending as the ioctl is called, EBUSY will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) * returned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * event (see drm.h: struct drm_event_vblank) when the page flip is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) * done. The user_data field passed in with this ioctl will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * returned as the user_data field in the vblank event struct.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) * 'as soon as possible', meaning that it not delay waiting for vblank.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) * This may cause tearing on the screen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) * The reserved field must be zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) struct drm_mode_crtc_page_flip {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) __u32 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) __u64 user_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * Request a page flip on the specified crtc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Same as struct drm_mode_crtc_page_flip, but supports new flags and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * re-purposes the reserved field:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) * The sequence field must be zero unless either of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * the ABSOLUTE flag is specified, the sequence field denotes the absolute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * vblank sequence when the flip should take effect. When the RELATIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * flag is specified, the sequence field denotes the relative (to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * current one when the ioctl is called) vblank sequence when the flip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) * make sure the vblank sequence before the target one has passed before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) * calling this ioctl. The purpose of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) * the target for when code dealing with a page flip runs during a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) * vertical blank period.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) struct drm_mode_crtc_page_flip_target {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) __u32 crtc_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) __u32 fb_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) __u32 sequence;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) __u64 user_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) /* create a dumb scanout buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct drm_mode_create_dumb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) __u32 height;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) __u32 width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) __u32 bpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) /* handle, pitch, size will be returned */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) __u32 pitch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) __u64 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /* set up for mmap of a dumb scanout buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) struct drm_mode_map_dumb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /** Handle for the object being mapped. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) __u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * Fake offset to use for subsequent mmap call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * This is a fixed-size type for 32/64 compatibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) __u64 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) struct drm_mode_destroy_dumb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) __u32 handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) /* page-flip flags are valid, plus: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) #define DRM_MODE_ATOMIC_NONBLOCK 0x0200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) #define DRM_MODE_ATOMIC_FLAGS (\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) DRM_MODE_PAGE_FLIP_EVENT |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) DRM_MODE_PAGE_FLIP_ASYNC |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) DRM_MODE_ATOMIC_TEST_ONLY |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) DRM_MODE_ATOMIC_NONBLOCK |\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) DRM_MODE_ATOMIC_ALLOW_MODESET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) struct drm_mode_atomic {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) __u32 count_objs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) __u64 objs_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) __u64 count_props_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) __u64 props_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) __u64 prop_values_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) __u64 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) __u64 user_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) struct drm_format_modifier_blob {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) #define FORMAT_BLOB_CURRENT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) /* Version of this blob format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) __u32 version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) /* Flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) /* Number of fourcc formats supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) __u32 count_formats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* Where in this blob the formats exist (in bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) __u32 formats_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /* Number of drm_format_modifiers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) __u32 count_modifiers;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* Where in this blob the modifiers exist (in bytes) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) __u32 modifiers_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* __u32 formats[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) /* struct drm_format_modifier modifiers[] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) struct drm_format_modifier {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /* Bitmask of formats in get_plane format list this info applies to. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) * offset allows a sliding window of which 64 formats (bits).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) * Some examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) * In today's world with < 65 formats, and formats 0, and 2 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) * supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) * 0x0000000000000005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) * ^-offset = 0, formats = 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) * If the number formats grew to 128, and formats 98-102 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) * supported with the modifier:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) * 0x0000007c00000000 0000000000000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * ^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) * |__offset = 64, formats = 0x7c00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) __u64 formats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) __u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) __u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* The modifier that applies to the >get_plane format list bitmask. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) __u64 modifier;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) * struct drm_mode_create_blob - Create New block property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * @data: Pointer to data to copy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) * @length: Length of data to copy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) * @blob_id: new property ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * Create a new 'blob' data property, copying length bytes from data pointer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * and returning new blob ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) struct drm_mode_create_blob {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) /** Pointer to data to copy. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) __u64 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) /** Length of data to copy. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) __u32 length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) /** Return: new property ID. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) __u32 blob_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) * struct drm_mode_destroy_blob - Destroy user blob
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) * @blob_id: blob_id to destroy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) * Destroy a user-created blob property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) struct drm_mode_destroy_blob {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) __u32 blob_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) * struct drm_mode_create_lease - Create lease
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) * @object_ids: Pointer to array of object ids.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) * @object_count: Number of object ids.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) * @flags: flags for new FD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) * @lessee_id: unique identifier for lessee.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) * @fd: file descriptor to new drm_master file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) * Lease mode resources, creating another drm_master.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) struct drm_mode_create_lease {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) /** Pointer to array of object ids (__u32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) __u64 object_ids;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) /** Number of object ids */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) __u32 object_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) /** flags for new FD (O_CLOEXEC, etc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) __u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) /** Return: unique identifier for lessee. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) __u32 lessee_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) /** Return: file descriptor to new drm_master file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) __u32 fd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) * struct drm_mode_list_lessees - List lessees
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) * @count_lessees: Number of lessees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) * @pad: pad.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) * @lessees_ptr: Pointer to lessess.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) * List lesses from a drm_master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) struct drm_mode_list_lessees {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) /** Number of lessees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * On input, provides length of the array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * On output, provides total number. No
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * more than the input number will be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) * back, so two calls can be used to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) * the size and then the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) __u32 count_lessees;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) __u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) /** Pointer to lessees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) * pointer to __u64 array of lessee ids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) __u64 lessees_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) * struct drm_mode_get_lease - Get Lease
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) * @count_objects: Number of leased objects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) * @pad: pad.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) * @objects_ptr: Pointer to objects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) * Get leased objects
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) struct drm_mode_get_lease {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) /** Number of leased objects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) * On input, provides length of the array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) * On output, provides total number. No
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) * more than the input number will be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) * back, so two calls can be used to get
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) * the size and then the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) __u32 count_objects;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) __u32 pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) /** Pointer to objects.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) * pointer to __u32 array of object ids
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) __u64 objects_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * struct drm_mode_revoke_lease - Revoke lease
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) * @lessee_id: Unique ID of lessee.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) * Revoke lease
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) struct drm_mode_revoke_lease {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) /** Unique ID of lessee
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) __u32 lessee_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) * struct drm_mode_rect - Two dimensional rectangle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) * @x1: Horizontal starting coordinate (inclusive).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) * @y1: Vertical starting coordinate (inclusive).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) * @x2: Horizontal ending coordinate (exclusive).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) * @y2: Vertical ending coordinate (exclusive).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) * With drm subsystem using struct drm_rect to manage rectangular area this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * export it to user-space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) struct drm_mode_rect {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) __s32 x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) __s32 y1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) __s32 x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) __s32 y2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) #if defined(__cplusplus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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