Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * wm8962.h  --  WM8962 Soc Audio driver platform data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _WM8962_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _WM8962_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define WM8962_MAX_GPIO 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* Use to set GPIO default values to zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define WM8962_GPIO_SET 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define WM8962_GPIO_FN_CLKOUT           0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define WM8962_GPIO_FN_LOGIC            1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define WM8962_GPIO_FN_SDOUT            2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define WM8962_GPIO_FN_IRQ              3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define WM8962_GPIO_FN_THERMAL          4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define WM8962_GPIO_FN_PLL2_LOCK        6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define WM8962_GPIO_FN_PLL3_LOCK        7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define WM8962_GPIO_FN_FLL_LOCK         9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define WM8962_GPIO_FN_DRC_ACT         10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define WM8962_GPIO_FN_WSEQ_DONE       11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define WM8962_GPIO_FN_ALC_NG_ACT      12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define WM8962_GPIO_FN_ALC_PEAK_LIMIT  13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define WM8962_GPIO_FN_ALC_SATURATION  14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define WM8962_GPIO_FN_ALC_LEVEL_THR   15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define WM8962_GPIO_FN_ALC_LEVEL_LOCK  16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define WM8962_GPIO_FN_FIFO_ERR        17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define WM8962_GPIO_FN_OPCLK           18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define WM8962_GPIO_FN_DMICCLK         19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define WM8962_GPIO_FN_DMICDAT         20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define WM8962_GPIO_FN_MICD            21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define WM8962_GPIO_FN_MICSCD          22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct wm8962_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	struct clk *mclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	int gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	u32 gpio_init[WM8962_MAX_GPIO];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	/* Setup for microphone detection, raw value to be written to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	 * R48(0x30) - only microphone related bits will be updated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	 * Detection may be enabled here for use with signals brought
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	 * out on the GPIOs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	u32 mic_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	bool irq_active_low;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	bool spk_mono;   /* Speaker outputs tied together as mono */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	/**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	 * This flag should be set if one or both IN4 inputs is wired
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	 * in a DC measurement configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	bool in4_dc_measure;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif