Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * wm8960.h  --  WM8960 Soc Audio driver platform data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #ifndef _WM8960_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define _WM8960_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define WM8960_DRES_400R 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define WM8960_DRES_200R 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define WM8960_DRES_600R 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define WM8960_DRES_150R 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define WM8960_DRES_MAX  3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct wm8960_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	bool capless;  /* Headphone outputs configured in capless mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	bool shared_lrclk;  /* DAC and ADC LRCLKs are wired together */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	 * Setup for headphone detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	 * hp_cfg[0]: HPSEL[1:0] of R48 (Additional Control 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	 * hp_cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	 * hp_cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	u32 hp_cfg[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	 * Setup for gpio configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 * gpio_cfg[0]: ALRCGPIO of R9 (Audio interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	 * gpio_cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	u32 gpio_cfg[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #endif