Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/sound/wm5100.h -- Platform data for WM5100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2011 Wolfson Microelectronics. PLC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __LINUX_SND_WM5100_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __LINUX_SND_WM5100_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) enum wm5100_in_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	WM5100_IN_SE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	WM5100_IN_DIFF = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	WM5100_IN_DMIC = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum wm5100_dmic_sup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	WM5100_DMIC_SUP_MICVDD = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	WM5100_DMIC_SUP_MICBIAS1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	WM5100_DMIC_SUP_MICBIAS2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	WM5100_DMIC_SUP_MICBIAS3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) enum wm5100_micdet_bias {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	WM5100_MICDET_MICBIAS1 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	WM5100_MICDET_MICBIAS2 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	WM5100_MICDET_MICBIAS3 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct wm5100_jack_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	enum wm5100_micdet_bias bias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	int hp_pol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	int micd_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define WM5100_GPIO_SET 0x10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct wm5100_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	int reset;      /** GPIO controlling /RESET, if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	int ldo_ena;    /** GPIO controlling LODENA, if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	int hp_pol;     /** GPIO controlling headset polarity, if any */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	int irq_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	int gpio_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	struct wm5100_jack_mode jack_modes[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	/* Input pin mode selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	enum wm5100_in_mode in_mode[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	/* DMIC supply selection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	enum wm5100_dmic_sup dmic_sup[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	int gpio_defaults[6];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif