^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Platform header for Texas Instruments TLV320DAC33 codec driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright: (C) 2009 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __TLV320DAC33_PLAT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __TLV320DAC33_PLAT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct tlv320dac33_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) int power_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) int mode1_latency; /* latency caused by the i2c writes in us */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int auto_fifo_config; /* FIFO config based on the period size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) int keep_bclk; /* Keep the BCLK running in FIFO modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u8 burst_bclkdiv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #endif /* __TLV320DAC33_PLAT_H */