^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __SOUND_SND_WAVEFRONT_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __SOUND_SND_WAVEFRONT_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <sound/mpu401.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <sound/hwdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <sound/rawmidi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <sound/wavefront.h> /* generic OSS/ALSA/user-level wavefront header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* MIDI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct _snd_wavefront_midi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) struct _snd_wavefront_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) struct _snd_wavefront;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) typedef struct _snd_wavefront_midi snd_wavefront_midi_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) typedef struct _snd_wavefront_card snd_wavefront_card_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) typedef struct _snd_wavefront snd_wavefront_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) typedef enum { internal_mpu = 0, external_mpu = 1 } snd_wavefront_mpu_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct _snd_wavefront_midi {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long base; /* I/O port address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) char isvirtual; /* doing virtual MIDI stuff ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) char istimer; /* timer is used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) snd_wavefront_mpu_id output_mpu; /* most-recently-used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) snd_wavefront_mpu_id input_mpu; /* most-recently-used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned int mode[2]; /* MPU401_MODE_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct snd_rawmidi_substream *substream_output[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct snd_rawmidi_substream *substream_input[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct timer_list timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) snd_wavefront_card_t *timer_card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) spinlock_t open;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) spinlock_t virtual; /* protects isvirtual */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OUTPUT_READY 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define INPUT_AVAIL 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MPU_ACK 0xFE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define UART_MODE_ON 0x3F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) extern const struct snd_rawmidi_ops snd_wavefront_midi_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) extern const struct snd_rawmidi_ops snd_wavefront_midi_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern void snd_wavefront_midi_enable_virtual (snd_wavefront_card_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern void snd_wavefront_midi_disable_virtual (snd_wavefront_card_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern void snd_wavefront_midi_interrupt (snd_wavefront_card_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern int snd_wavefront_midi_start (snd_wavefront_card_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct _snd_wavefront {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) unsigned long irq; /* "you were one, one of the few ..." */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) unsigned long base; /* low i/o port address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct resource *res_base; /* i/o port resource allocation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define mpu_data_port base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define mpu_command_port base + 1 /* write semantics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define mpu_status_port base + 1 /* read semantics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define data_port base + 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define status_port base + 3 /* read semantics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define control_port base + 3 /* write semantics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define block_port base + 4 /* 16 bit, writeonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define last_block_port base + 6 /* 16 bit, writeonly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* FX ports. These are mapped through the ICS2115 to the YS225.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) The ICS2115 takes care of flipping the relevant pins on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) YS225 so that access to each of these ports does the right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) thing. Note: these are NOT documented by Turtle Beach.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define fx_status base + 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define fx_op base + 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define fx_lcr base + 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define fx_dsp_addr base + 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define fx_dsp_page base + 0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define fx_dsp_lsb base + 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define fx_dsp_msb base + 0xd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define fx_mod_addr base + 0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define fx_mod_data base + 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) volatile int irq_ok; /* set by interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) volatile int irq_cnt; /* ditto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) char debug; /* debugging flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int freemem; /* installed RAM, in bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) char fw_version[2]; /* major = [0], minor = [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) char hw_version[2]; /* major = [0], minor = [1] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) char israw; /* needs Motorola microcode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) char has_fx; /* has FX processor (Tropez+) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) char fx_initialized; /* FX's register pages initialized */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) char prog_status[WF_MAX_PROGRAM]; /* WF_SLOT_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) char patch_status[WF_MAX_PATCH]; /* WF_SLOT_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) char sample_status[WF_MAX_SAMPLE]; /* WF_ST_* | WF_SLOT_* */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int samples_used; /* how many */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) char interrupts_are_midi; /* h/w MPU interrupts enabled ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) char rom_samples_rdonly; /* can we write on ROM samples */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) spinlock_t irq_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) wait_queue_head_t interrupt_sleeper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) snd_wavefront_midi_t midi; /* ICS2115 MIDI interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct _snd_wavefront_card {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) snd_wavefront_t wavefront;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #ifdef CONFIG_PNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct pnp_dev *wss;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct pnp_dev *ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct pnp_dev *mpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct pnp_dev *synth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif /* CONFIG_PNP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) extern void snd_wavefront_internal_interrupt (snd_wavefront_card_t *card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) extern int snd_wavefront_detect_irq (snd_wavefront_t *dev) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) extern int snd_wavefront_check_irq (snd_wavefront_t *dev, int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) extern int snd_wavefront_restart (snd_wavefront_t *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) extern int snd_wavefront_start (snd_wavefront_t *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) extern int snd_wavefront_detect (snd_wavefront_card_t *card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) extern int snd_wavefront_config_midi (snd_wavefront_t *dev) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) extern int snd_wavefront_cmd (snd_wavefront_t *, int, unsigned char *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unsigned char *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) extern int snd_wavefront_synth_ioctl (struct snd_hwdep *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct file *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned long arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) extern int snd_wavefront_synth_open (struct snd_hwdep *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) extern int snd_wavefront_synth_release (struct snd_hwdep *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* FX processor - see also yss225.[ch] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) extern int snd_wavefront_fx_start (snd_wavefront_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) extern int snd_wavefront_fx_detect (snd_wavefront_t *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) extern int snd_wavefront_fx_ioctl (struct snd_hwdep *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct file *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned int cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) unsigned long arg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) extern int snd_wavefront_fx_open (struct snd_hwdep *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) extern int snd_wavefront_fx_release (struct snd_hwdep *, struct file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* prefix in all snd_printk() delivered messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define LOGNAME "WaveFront: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif /* __SOUND_SND_WAVEFRONT_H__ */