Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/sound/rt5682.h -- Platform data for RT5682
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2018 Realtek Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __LINUX_SND_RT5682_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __LINUX_SND_RT5682_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) enum rt5682_dmic1_data_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	RT5682_DMIC1_NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	RT5682_DMIC1_DATA_GPIO2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	RT5682_DMIC1_DATA_GPIO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) enum rt5682_dmic1_clk_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	RT5682_DMIC1_CLK_GPIO1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	RT5682_DMIC1_CLK_GPIO3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) enum rt5682_jd_src {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	RT5682_JD_NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	RT5682_JD1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum rt5682_dai_clks {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	RT5682_DAI_WCLK_IDX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	RT5682_DAI_BCLK_IDX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	RT5682_DAI_NUM_CLKS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct rt5682_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	int ldo1_en; /* GPIO for LDO1_EN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	enum rt5682_dmic1_data_pin dmic1_data_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	enum rt5682_dmic1_clk_pin dmic1_clk_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	enum rt5682_jd_src jd_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned int btndet_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	unsigned int dmic_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	unsigned int dmic_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)