Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * linux/sound/rt5659.h -- Platform data for RT5659
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2013 Realtek Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __LINUX_SND_RT5659_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __LINUX_SND_RT5659_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) enum rt5659_dmic1_data_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	RT5659_DMIC1_NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	RT5659_DMIC1_DATA_IN2N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	RT5659_DMIC1_DATA_GPIO5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	RT5659_DMIC1_DATA_GPIO9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	RT5659_DMIC1_DATA_GPIO11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) enum rt5659_dmic2_data_pin {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	RT5659_DMIC2_NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	RT5659_DMIC2_DATA_IN2P,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	RT5659_DMIC2_DATA_GPIO6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	RT5659_DMIC2_DATA_GPIO10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	RT5659_DMIC2_DATA_GPIO12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) enum rt5659_jd_src {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	RT5659_JD_NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	RT5659_JD3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	RT5659_JD_HDA_HEADER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct rt5659_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	bool in1_diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	bool in3_diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	bool in4_diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	int ldo1_en; /* GPIO for LDO1_EN */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	int reset; /* GPIO for RESET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	enum rt5659_dmic1_data_pin dmic1_data_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	enum rt5659_dmic2_data_pin dmic2_data_pin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	enum rt5659_jd_src jd_src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)