Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Platform data for MAX98088
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2010 Maxim Integrated Products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef __SOUND_MAX98088_PDATA_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define __SOUND_MAX98088_PDATA_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* Equalizer filter response configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) struct max98088_eq_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)        const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)        unsigned int rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)        u16 band1[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)        u16 band2[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)        u16 band3[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)        u16 band4[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)        u16 band5[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* codec platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct max98088_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)        /* Equalizers for DAI1 and DAI2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)        struct max98088_eq_cfg *eq_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)        unsigned int eq_cfgcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)        /* Receiver output can be configured as power amplifier or LINE out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)        /* Set receiver_mode to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)         * 0 = amplifier output, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)         * 1 = LINE level output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)        unsigned int receiver_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)        /* Analog/digital microphone configuration:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)         * 0 = analog microphone input (normal setting)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)         * 1 = digital microphone input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)         */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)        unsigned int digmic_left_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)        unsigned int digmic_right_mode:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif