^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Universal Interface for Intel High Definition Audio Codec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __SOUND_HDA_CODEC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __SOUND_HDA_CODEC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kref.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mod_devicetable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <sound/hwdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <sound/hdaudio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <sound/hda_verbs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <sound/hda_regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) struct hda_bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) struct hda_beep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct hda_codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct hda_pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct hda_pcm_stream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * codec bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * each controller needs to creata a hda_bus to assign the accessor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * A hda_bus contains several codecs in the list codec_list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct hda_bus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct hdac_bus core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct pci_dev *pci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) const char *modelname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct mutex prepare_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) /* assigned PCMs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) DECLARE_BITMAP(pcm_dev_bits, SNDRV_PCM_DEVICES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* misc op flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int allow_bus_reset:1; /* allow bus reset at fatal error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* status for codec/controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned int shutdown :1; /* being unloaded */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned int response_reset:1; /* controller was reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned int in_reset:1; /* during reset operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned int no_response_fallback:1; /* don't fallback at RIRB error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned int bus_probing :1; /* during probing process */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int keep_power:1; /* keep power up for notification */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) int primary_dig_out_type; /* primary digital out PCM type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int mixer_assigned; /* codec addr for mixer name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* from hdac_bus to hda_bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define to_hda_bus(bus) container_of(bus, struct hda_bus, core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * codec preset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * Known codecs have the patch to build and set up the controls/PCMs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * better than the generic parser.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) typedef int (*hda_codec_patch_t)(struct hda_codec *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define HDA_CODEC_ID_SKIP_PROBE 0x00000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define HDA_CODEC_ID_GENERIC_HDMI 0x00000101
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define HDA_CODEC_ID_GENERIC 0x00000201
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define HDA_CODEC_REV_ENTRY(_vid, _rev, _name, _patch) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { .vendor_id = (_vid), .rev_id = (_rev), .name = (_name), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .api_version = HDA_DEV_LEGACY, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .driver_data = (unsigned long)(_patch) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define HDA_CODEC_ENTRY(_vid, _name, _patch) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) HDA_CODEC_REV_ENTRY(_vid, 0, _name, _patch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct hda_codec_driver {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct hdac_driver core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) const struct hda_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int __hda_codec_driver_register(struct hda_codec_driver *drv, const char *name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct module *owner);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define hda_codec_driver_register(drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) __hda_codec_driver_register(drv, KBUILD_MODNAME, THIS_MODULE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) void hda_codec_driver_unregister(struct hda_codec_driver *drv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define module_hda_codec_driver(drv) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) module_driver(drv, hda_codec_driver_register, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) hda_codec_driver_unregister)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* ops set by the preset patch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct hda_codec_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int (*build_controls)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) int (*build_pcms)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int (*init)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void (*free)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) void (*unsol_event)(struct hda_codec *codec, unsigned int res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void (*set_power_state)(struct hda_codec *codec, hda_nid_t fg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) unsigned int power_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int (*suspend)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int (*resume)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int (*check_power_status)(struct hda_codec *codec, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) void (*reboot_notify)(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void (*stream_pm)(struct hda_codec *codec, hda_nid_t nid, bool on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* PCM callbacks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct hda_pcm_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int (*open)(struct hda_pcm_stream *info, struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) int (*close)(struct hda_pcm_stream *info, struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int (*prepare)(struct hda_pcm_stream *info, struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int stream_tag, unsigned int format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int (*cleanup)(struct hda_pcm_stream *info, struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned int (*get_delay)(struct hda_pcm_stream *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /* PCM information for each substream */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct hda_pcm_stream {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned int substreams; /* number of substreams, 0 = not exist*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned int channels_min; /* min. number of channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned int channels_max; /* max. number of channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) hda_nid_t nid; /* default NID to query rates/formats/bps, or set up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) u32 rates; /* supported rates */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u64 formats; /* supported formats (SNDRV_PCM_FMTBIT_) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) unsigned int maxbps; /* supported max. bit per sample */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const struct snd_pcm_chmap_elem *chmap; /* chmap to override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct hda_pcm_ops ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* PCM types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) HDA_PCM_TYPE_AUDIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) HDA_PCM_TYPE_SPDIF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) HDA_PCM_TYPE_HDMI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) HDA_PCM_TYPE_MODEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) HDA_PCM_NTYPES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define SNDRV_PCM_INVALID_DEVICE (-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* for PCM creation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct hda_pcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct hda_pcm_stream stream[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) unsigned int pcm_type; /* HDA_PCM_TYPE_XXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) int device; /* device number to assign */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct snd_pcm *pcm; /* assigned PCM instance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) bool own_chmap; /* codec driver provides own channel maps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /* private: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct hda_codec *codec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct kref kref;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /* codec information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct hda_codec {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct hdac_device core;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct hda_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) unsigned int addr; /* codec addr*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) u32 probe_id; /* overridden id for probing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /* detected preset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) const struct hda_device_id *preset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) const char *modelname; /* model name for preset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /* set by patch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct hda_codec_ops patch_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* PCM to create, set by patch_ops.build_pcms callback */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct list_head pcm_list_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* codec specific info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) void *spec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) /* beep device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) struct hda_beep *beep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) unsigned int beep_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* widget capabilities cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) u32 *wcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) struct snd_array mixers; /* list of assigned mixer elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct snd_array nids; /* list of mapped mixer elements */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) struct list_head conn_list; /* linked-list of connection-list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct mutex spdif_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct mutex control_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) struct snd_array spdif_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) unsigned int spdif_in_enable; /* SPDIF input enable? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) const hda_nid_t *follower_dig_outs; /* optional digital out follower widgets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) struct snd_array init_pins; /* initial (BIOS) pin configurations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) struct snd_array driver_pins; /* pin configs set by codec parser */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct snd_array cvt_setups; /* audio convert setups */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct mutex user_mutex;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #ifdef CONFIG_SND_HDA_RECONFIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct snd_array init_verbs; /* additional init verbs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) struct snd_array hints; /* additional hints */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) struct snd_array user_pins; /* default pin configs to override */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #ifdef CONFIG_SND_HDA_HWDEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) struct snd_hwdep *hwdep; /* assigned hwdep device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* misc flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) unsigned int configured:1; /* codec was configured */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) unsigned int in_freeing:1; /* being released */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) unsigned int registered:1; /* codec was registered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) unsigned int display_power_control:1; /* needs display power */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) unsigned int spdif_status_reset :1; /* needs to toggle SPDIF for each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * status change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * (e.g. Realtek codecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) unsigned int pin_amp_workaround:1; /* pin out-amp takes index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * (e.g. Conexant codecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) unsigned int single_adc_amp:1; /* adc in-amp takes no index
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * (e.g. CX20549 codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) unsigned int no_sticky_stream:1; /* no sticky-PCM stream assignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) unsigned int pins_shutup:1; /* pins are shut up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) unsigned int no_trigger_sense:1; /* don't trigger at pin-sensing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) unsigned int no_jack_detect:1; /* Machine has no jack-detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) unsigned int inv_eapd:1; /* broken h/w: inverted EAPD control */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned int inv_jack_detect:1; /* broken h/w: inverted detection bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) unsigned int pcm_format_first:1; /* PCM format must be set first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) unsigned int cached_write:1; /* write only to caches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) unsigned int dp_mst:1; /* support DP1.2 Multi-stream transport */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) unsigned int dump_coef:1; /* dump processing coefs in codec proc file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) unsigned int power_save_node:1; /* advanced PM for each widget */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) unsigned int auto_runtime_pm:1; /* enable automatic codec runtime pm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) unsigned int force_pin_prefix:1; /* Add location prefix */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) unsigned int link_down_at_suspend:1; /* link down at runtime suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) unsigned int relaxed_resume:1; /* don't resume forcibly for jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) unsigned int forced_resume:1; /* forced resume for jack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) unsigned int mst_no_extra_pcms:1; /* no backup PCMs for DP-MST */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) unsigned long power_on_acct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) unsigned long power_off_acct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) unsigned long power_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) /* filter the requested power state per nid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) unsigned int (*power_filter)(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) unsigned int power_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* codec-specific additional proc output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) void (*proc_widget_hook)(struct snd_info_buffer *buffer,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) struct hda_codec *codec, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* jack detection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) struct snd_array jacktbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) unsigned long jackpoll_interval; /* In jiffies. Zero means no poll, rely on unsol events */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) struct delayed_work jackpoll_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) int depop_delay; /* depop delay in ms, -1 for default delay time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* fix-up list */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) int fixup_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) const struct hda_fixup *fixup_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) const char *fixup_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* additional init verbs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct snd_array verbs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) #define dev_to_hda_codec(_dev) container_of(_dev, struct hda_codec, core.dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #define hda_codec_dev(_dev) (&(_dev)->core.dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) #define hdac_to_hda_priv(_hdac) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) container_of(_hdac, struct hdac_hda_priv, codec.core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) #define hdac_to_hda_codec(_hdac) container_of(_hdac, struct hda_codec, core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #define list_for_each_codec(c, bus) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) list_for_each_entry(c, &(bus)->core.codec_list, core.list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) #define list_for_each_codec_safe(c, n, bus) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) list_for_each_entry_safe(c, n, &(bus)->core.codec_list, core.list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* snd_hda_codec_read/write optional flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define HDA_RW_NO_RESPONSE_FALLBACK (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * constructors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) int snd_hda_codec_new(struct hda_bus *bus, struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) unsigned int codec_addr, struct hda_codec **codecp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) int snd_hda_codec_device_new(struct hda_bus *bus, struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned int codec_addr, struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) int snd_hda_codec_configure(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int snd_hda_codec_update_widgets(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * low level functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) static inline unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) snd_hda_codec_read(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) int flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) unsigned int verb, unsigned int parm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) return snd_hdac_codec_read(&codec->core, nid, flags, verb, parm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) snd_hda_codec_write(struct hda_codec *codec, hda_nid_t nid, int flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) unsigned int verb, unsigned int parm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return snd_hdac_codec_write(&codec->core, nid, flags, verb, parm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) #define snd_hda_param_read(codec, nid, param) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) snd_hdac_read_parm(&(codec)->core, nid, param)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #define snd_hda_get_sub_nodes(codec, nid, start_nid) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) snd_hdac_get_sub_nodes(&(codec)->core, nid, start_nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) int snd_hda_get_connections(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) hda_nid_t *conn_list, int max_conns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) snd_hda_get_num_conns(struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return snd_hda_get_connections(codec, nid, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) #define snd_hda_get_raw_connections(codec, nid, list, max_conns) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) snd_hdac_get_connections(&(codec)->core, nid, list, max_conns)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) #define snd_hda_get_num_raw_conns(codec, nid) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) snd_hdac_get_connections(&(codec)->core, nid, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) int snd_hda_get_conn_list(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) const hda_nid_t **listp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int snd_hda_override_conn_list(struct hda_codec *codec, hda_nid_t nid, int nums,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) const hda_nid_t *list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) int snd_hda_get_conn_index(struct hda_codec *codec, hda_nid_t mux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) hda_nid_t nid, int recursive);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) unsigned int snd_hda_get_num_devices(struct hda_codec *codec, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) int snd_hda_get_devices(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) u8 *dev_list, int max_devices);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int snd_hda_get_dev_select(struct hda_codec *codec, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int snd_hda_set_dev_select(struct hda_codec *codec, hda_nid_t nid, int dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct hda_verb {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) hda_nid_t nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) u32 verb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) u32 param;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) void snd_hda_sequence_write(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) const struct hda_verb *seq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* cached write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) snd_hda_codec_write_cache(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int flags, unsigned int verb, unsigned int parm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) return snd_hdac_regmap_write(&codec->core, nid, verb, parm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /* the struct for codec->pin_configs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct hda_pincfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) hda_nid_t nid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) unsigned char ctrl; /* original pin control value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) unsigned char target; /* target pin control value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) unsigned int cfg; /* default configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) unsigned int snd_hda_codec_get_pincfg(struct hda_codec *codec, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) int snd_hda_codec_set_pincfg(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) unsigned int cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) int snd_hda_add_pincfg(struct hda_codec *codec, struct snd_array *list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) hda_nid_t nid, unsigned int cfg); /* for hwdep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) void snd_hda_shutup_pins(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /* SPDIF controls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct hda_spdif_out {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) hda_nid_t nid; /* Converter nid values relate to */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unsigned int status; /* IEC958 status bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned short ctls; /* SPDIF control bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) struct hda_spdif_out *snd_hda_spdif_out_of_nid(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) void snd_hda_spdif_ctls_unassign(struct hda_codec *codec, int idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) void snd_hda_spdif_ctls_assign(struct hda_codec *codec, int idx, hda_nid_t nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * Mixer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) int snd_hda_codec_build_controls(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * PCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int snd_hda_codec_parse_pcms(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) int snd_hda_codec_build_pcms(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) __printf(2, 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) struct hda_pcm *snd_hda_codec_pcm_new(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) const char *fmt, ...);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) void snd_hda_codec_cleanup_for_unbind(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static inline void snd_hda_codec_pcm_get(struct hda_pcm *pcm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) kref_get(&pcm->kref);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) void snd_hda_codec_pcm_put(struct hda_pcm *pcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) int snd_hda_codec_prepare(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct hda_pcm_stream *hinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) unsigned int stream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) unsigned int format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) void snd_hda_codec_cleanup(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct hda_pcm_stream *hinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) void snd_hda_codec_setup_stream(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u32 stream_tag,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) int channel_id, int format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) void __snd_hda_codec_cleanup_stream(struct hda_codec *codec, hda_nid_t nid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) int do_now);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) #define snd_hda_codec_cleanup_stream(codec, nid) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) __snd_hda_codec_cleanup_stream(codec, nid, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) #define snd_hda_query_supported_pcm(codec, nid, ratesp, fmtsp, bpsp) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) snd_hdac_query_supported_pcm(&(codec)->core, nid, ratesp, fmtsp, bpsp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) #define snd_hda_is_supported_format(codec, nid, fmt) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) snd_hdac_is_supported_format(&(codec)->core, nid, fmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) extern const struct snd_pcm_chmap_elem snd_pcm_2_1_chmaps[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) int snd_hda_attach_pcm_stream(struct hda_bus *_bus, struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) struct hda_pcm *cpcm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) * Misc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) void snd_hda_get_codec_name(struct hda_codec *codec, char *name, int namelen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) void snd_hda_codec_set_power_to_all(struct hda_codec *codec, hda_nid_t fg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) unsigned int power_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) int snd_hda_lock_devices(struct hda_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) void snd_hda_unlock_devices(struct hda_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) void snd_hda_bus_reset(struct hda_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) void snd_hda_bus_reset_codecs(struct hda_bus *bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) int snd_hda_codec_set_name(struct hda_codec *codec, const char *name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) * power management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) extern const struct dev_pm_ops hda_codec_driver_pm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) static inline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) int hda_call_check_power_status(struct hda_codec *codec, hda_nid_t nid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (codec->patch_ops.check_power_status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return codec->patch_ops.check_power_status(codec, nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * power saving
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #define snd_hda_power_up(codec) snd_hdac_power_up(&(codec)->core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) #define snd_hda_power_up_pm(codec) snd_hdac_power_up_pm(&(codec)->core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #define snd_hda_power_down(codec) snd_hdac_power_down(&(codec)->core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) #define snd_hda_power_down_pm(codec) snd_hdac_power_down_pm(&(codec)->core)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) void snd_hda_set_power_save(struct hda_bus *bus, int delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) void snd_hda_update_power_acct(struct hda_codec *codec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static inline void snd_hda_set_power_save(struct hda_bus *bus, int delay) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) static inline bool hda_codec_need_resume(struct hda_codec *codec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return !codec->relaxed_resume && codec->jacktbl.used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #ifdef CONFIG_SND_HDA_PATCH_LOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) * patch firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) int snd_hda_load_patch(struct hda_bus *bus, size_t size, const void *buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #ifdef CONFIG_SND_HDA_DSP_LOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) struct snd_dma_buffer *bufp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) void snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) void snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) struct snd_dma_buffer *dmab);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) snd_hda_codec_load_dsp_prepare(struct hda_codec *codec, unsigned int format,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) unsigned int size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) struct snd_dma_buffer *bufp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return -ENOSYS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) snd_hda_codec_load_dsp_trigger(struct hda_codec *codec, bool start) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) snd_hda_codec_load_dsp_cleanup(struct hda_codec *codec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) struct snd_dma_buffer *dmab) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) #endif /* __SOUND_HDA_CODEC_H */