^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __SOUND_ES1688_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __SOUND_ES1688_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Header file for ES488/ES1688
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define ES1688_HW_AUTO 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define ES1688_HW_688 0x0001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ES1688_HW_1688 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ES1688_HW_UNDEF 0x0003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) struct snd_es1688 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) unsigned long port; /* port of ESS chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct resource *res_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) unsigned long mpu_port; /* MPU-401 port of ESS chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) int irq; /* IRQ number of ESS chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) int mpu_irq; /* MPU IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) int dma8; /* 8-bit DMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned short version; /* version of ESS chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned short hardware; /* see to ES1688_HW_XXXX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned short trigger_value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned char pad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) unsigned int dma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct snd_pcm_substream *playback_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct snd_pcm_substream *capture_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) spinlock_t reg_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) spinlock_t mixer_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* I/O ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define ES1688P(codec, x) ((codec)->port + e_s_s_ESS1688##x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define e_s_s_ESS1688RESET 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define e_s_s_ESS1688READ 0xa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define e_s_s_ESS1688WRITE 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define e_s_s_ESS1688COMMAND 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define e_s_s_ESS1688STATUS 0xc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define e_s_s_ESS1688DATA_AVAIL 0xe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define e_s_s_ESS1688DATA_AVAIL_16 0xf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define e_s_s_ESS1688MIXER_ADDR 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define e_s_s_ESS1688MIXER_DATA 0x5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define e_s_s_ESS1688OPL3_LEFT 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define e_s_s_ESS1688OPL3_RIGHT 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define e_s_s_ESS1688OPL3_BOTH 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define e_s_s_ESS1688ENABLE0 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define e_s_s_ESS1688ENABLE1 0x9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define e_s_s_ESS1688ENABLE2 0xb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define e_s_s_ESS1688INIT1 0x7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define ES1688_DSP_CMD_DMAOFF 0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define ES1688_DSP_CMD_SPKON 0xd1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define ES1688_DSP_CMD_SPKOFF 0xd3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define ES1688_DSP_CMD_DMAON 0xd4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define ES1688_PCM_DEV 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define ES1688_MIC_DEV 0x1a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define ES1688_REC_DEV 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define ES1688_MASTER_DEV 0x32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define ES1688_FM_DEV 0x36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define ES1688_CD_DEV 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define ES1688_AUX_DEV 0x3a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ES1688_SPEAKER_DEV 0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define ES1688_LINE_DEV 0x3e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define ES1688_RECLEV_DEV 0xb4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define ES1688_MIXS_MASK 0x17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define ES1688_MIXS_MIC 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define ES1688_MIXS_MIC_MASTER 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define ES1688_MIXS_CD 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define ES1688_MIXS_AOUT 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define ES1688_MIXS_MIC1 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define ES1688_MIXS_REC_MIX 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define ES1688_MIXS_LINE 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define ES1688_MIXS_MASTER 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define ES1688_MIXS_MUTE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) void snd_es1688_mixer_write(struct snd_es1688 *chip, unsigned char reg, unsigned char data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int snd_es1688_create(struct snd_card *card,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct snd_es1688 *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) unsigned long port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) unsigned long mpu_port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int mpu_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int dma8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned short hardware);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int snd_es1688_pcm(struct snd_card *card, struct snd_es1688 *chip, int device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int snd_es1688_mixer(struct snd_card *card, struct snd_es1688 *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int snd_es1688_reset(struct snd_es1688 *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif /* __SOUND_ES1688_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags