^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012, Analog Devices Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Lars-Peter Clausen <lars@metafoo.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #ifndef __SOUND_DMAENGINE_PCM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define __SOUND_DMAENGINE_PCM_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/soc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/dmaengine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * snd_pcm_substream_to_dma_direction - Get dma_transfer_direction for a PCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * @substream: PCM substream
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline enum dma_transfer_direction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) snd_pcm_substream_to_dma_direction(const struct snd_pcm_substream *substream)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) return DMA_MEM_TO_DEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) return DMA_DEV_TO_MEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int snd_hwparams_to_dma_slave_config(const struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int snd_dmaengine_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) snd_pcm_uframes_t snd_dmaengine_pcm_pointer(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) snd_pcm_uframes_t snd_dmaengine_pcm_pointer_no_residue(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int snd_dmaengine_pcm_open(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct dma_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int snd_dmaengine_pcm_close(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) int snd_dmaengine_pcm_open_request_chan(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) dma_filter_fn filter_fn, void *filter_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) int snd_dmaengine_pcm_close_release_chan(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct dma_chan *snd_dmaengine_pcm_request_channel(dma_filter_fn filter_fn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) void *filter_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * If this flag is set the dmaengine driver won't put any restriction on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * the supported sample formats and set the DMA transfer size to undefined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * The DAI driver is responsible to disable any unsupported formats in it's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * configuration and catch corner cases that are not already handled in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * the ALSA core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define SND_DMAENGINE_PCM_DAI_FLAG_PACK BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @addr: Address of the DAI data source or destination register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @addr_width: Width of the DAI data source or destination register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @maxburst: Maximum number of words(note: words, as in units of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * src_addr_width member, not bytes) that can be send to or received from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * DAI in one burst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * @slave_id: Slave requester id for the DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * @filter_data: Custom DMA channel filter data, this will usually be used when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * requesting the DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * @chan_name: Custom channel name to use when requesting DMA channel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * @fifo_size: FIFO size of the DAI controller in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * @peripheral_config: peripheral configuration for programming peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * for dmaengine transfer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * @peripheral_size: peripheral configuration buffer size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct snd_dmaengine_dai_dma_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) dma_addr_t addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enum dma_slave_buswidth addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 maxburst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned int slave_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) void *filter_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) const char *chan_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned int fifo_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) void *peripheral_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) size_t peripheral_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) void snd_dmaengine_pcm_set_config_from_dai_data(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) const struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) const struct snd_dmaengine_dai_dma_data *dma_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) struct dma_slave_config *config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) int snd_dmaengine_pcm_refine_runtime_hwparams(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct snd_dmaengine_dai_dma_data *dma_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct snd_pcm_hardware *hw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct dma_chan *chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Try to request the DMA channel using compat_request_channel or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * compat_filter_fn if it couldn't be requested through devicetree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define SND_DMAENGINE_PCM_FLAG_COMPAT BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * Don't try to request the DMA channels through devicetree. This flag only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * makes sense if SND_DMAENGINE_PCM_FLAG_COMPAT is set as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define SND_DMAENGINE_PCM_FLAG_NO_DT BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * The PCM is half duplex and the DMA channel is shared between capture and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * playback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * struct snd_dmaengine_pcm_config - Configuration data for dmaengine based PCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * @prepare_slave_config: Callback used to fill in the DMA slave_config for a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * PCM substream. Will be called from the PCM drivers hwparams callback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * @compat_request_channel: Callback to request a DMA channel for platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * which do not use devicetree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * @process: Callback used to apply processing on samples transferred from/to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * user space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * @compat_filter_fn: Will be used as the filter function when requesting a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * channel for platforms which do not use devicetree. The filter parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * will be the DAI's DMA data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * @dma_dev: If set, request DMA channel on this device rather than the DAI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * @chan_names: If set, these custom DMA channel names will be requested at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * registration time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * @pcm_hardware: snd_pcm_hardware struct to be used for the PCM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * @prealloc_buffer_size: Size of the preallocated audio buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * Note: If both compat_request_channel and compat_filter_fn are set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * compat_request_channel will be used to request the channel and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * compat_filter_fn will be ignored. Otherwise the channel will be requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * using dma_request_channel with compat_filter_fn as the filter function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct snd_dmaengine_pcm_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int (*prepare_slave_config)(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) struct dma_slave_config *slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) struct dma_chan *(*compat_request_channel)(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) struct snd_soc_pcm_runtime *rtd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct snd_pcm_substream *substream);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int (*process)(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int channel, unsigned long hwoff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void *buf, unsigned long bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) dma_filter_fn compat_filter_fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct device *dma_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) const char *chan_names[SNDRV_PCM_STREAM_LAST + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) const struct snd_pcm_hardware *pcm_hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) unsigned int prealloc_buffer_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int snd_dmaengine_pcm_register(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) const struct snd_dmaengine_pcm_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned int flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) void snd_dmaengine_pcm_unregister(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) int devm_snd_dmaengine_pcm_register(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) const struct snd_dmaengine_pcm_config *config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct snd_pcm_hw_params *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct dma_slave_config *slave_config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define SND_DMAENGINE_PCM_DRV_NAME "snd_dmaengine_pcm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) struct dmaengine_pcm {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) struct dma_chan *chan[SNDRV_PCM_STREAM_LAST + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) const struct snd_dmaengine_pcm_config *config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) struct snd_soc_component component;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static inline struct dmaengine_pcm *soc_component_to_pcm(struct snd_soc_component *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return container_of(p, struct dmaengine_pcm, component);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #endif