^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * da7218.h - DA7218 ASoC Codec Driver Platform Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2015 Dialog Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _DA7218_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _DA7218_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* Mic Bias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) enum da7218_micbias_voltage {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) DA7218_MICBIAS_1_2V = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) DA7218_MICBIAS_1_6V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) DA7218_MICBIAS_1_8V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) DA7218_MICBIAS_2_0V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) DA7218_MICBIAS_2_2V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) DA7218_MICBIAS_2_4V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) DA7218_MICBIAS_2_6V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) DA7218_MICBIAS_2_8V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) DA7218_MICBIAS_3_0V,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) enum da7218_mic_amp_in_sel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) DA7218_MIC_AMP_IN_SEL_DIFF = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) DA7218_MIC_AMP_IN_SEL_SE_P,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) DA7218_MIC_AMP_IN_SEL_SE_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* DMIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) enum da7218_dmic_data_sel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) DA7218_DMIC_DATA_LRISE_RFALL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) DA7218_DMIC_DATA_LFALL_RRISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) enum da7218_dmic_samplephase {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) DA7218_DMIC_SAMPLE_ON_CLKEDGE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) DA7218_DMIC_SAMPLE_BETWEEN_CLKEDGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum da7218_dmic_clk_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) DA7218_DMIC_CLK_3_0MHZ = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) DA7218_DMIC_CLK_1_5MHZ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Headphone Detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) enum da7218_hpldet_jack_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) DA7218_HPLDET_JACK_RATE_5US = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) DA7218_HPLDET_JACK_RATE_10US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) DA7218_HPLDET_JACK_RATE_20US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) DA7218_HPLDET_JACK_RATE_40US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) DA7218_HPLDET_JACK_RATE_80US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) DA7218_HPLDET_JACK_RATE_160US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) DA7218_HPLDET_JACK_RATE_320US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) DA7218_HPLDET_JACK_RATE_640US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) enum da7218_hpldet_jack_debounce {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) DA7218_HPLDET_JACK_DEBOUNCE_OFF = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) DA7218_HPLDET_JACK_DEBOUNCE_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) DA7218_HPLDET_JACK_DEBOUNCE_3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) DA7218_HPLDET_JACK_DEBOUNCE_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) enum da7218_hpldet_jack_thr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) DA7218_HPLDET_JACK_THR_84PCT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) DA7218_HPLDET_JACK_THR_88PCT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) DA7218_HPLDET_JACK_THR_92PCT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) DA7218_HPLDET_JACK_THR_96PCT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct da7218_hpldet_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enum da7218_hpldet_jack_rate jack_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) enum da7218_hpldet_jack_debounce jack_debounce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum da7218_hpldet_jack_thr jack_thr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) bool comp_inv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) bool hyst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) bool discharge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct da7218_pdata {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* Mic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) enum da7218_micbias_voltage micbias1_lvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) enum da7218_micbias_voltage micbias2_lvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) enum da7218_mic_amp_in_sel mic1_amp_in_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) enum da7218_mic_amp_in_sel mic2_amp_in_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* DMIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) enum da7218_dmic_data_sel dmic1_data_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum da7218_dmic_data_sel dmic2_data_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) enum da7218_dmic_samplephase dmic1_samplephase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) enum da7218_dmic_samplephase dmic2_samplephase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) enum da7218_dmic_clk_rate dmic1_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) enum da7218_dmic_clk_rate dmic2_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* HP Diff Supply - DA7217 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) bool hp_diff_single_supply;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* HP Detect - DA7218 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct da7218_hpldet_pdata *hpldet_pdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif /* _DA7218_PDATA_H */