^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * da7213.h - DA7213 ASoC Codec Driver Platform Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2013 Dialog Semiconductor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _DA7213_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _DA7213_PDATA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) enum da7213_micbias_voltage {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) DA7213_MICBIAS_1_6V = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) DA7213_MICBIAS_2_2V = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) DA7213_MICBIAS_2_5V = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) DA7213_MICBIAS_3_0V = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) enum da7213_dmic_data_sel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) DA7213_DMIC_DATA_LRISE_RFALL = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) DA7213_DMIC_DATA_LFALL_RRISE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) enum da7213_dmic_samplephase {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) DA7213_DMIC_SAMPLE_ON_CLKEDGE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) DA7213_DMIC_SAMPLE_BETWEEN_CLKEDGE = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) enum da7213_dmic_clk_rate {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) DA7213_DMIC_CLK_3_0MHZ = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) DA7213_DMIC_CLK_1_5MHZ = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct da7213_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Mic Bias voltage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) enum da7213_micbias_voltage micbias1_lvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) enum da7213_micbias_voltage micbias2_lvl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* DMIC config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum da7213_dmic_data_sel dmic_data_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) enum da7213_dmic_samplephase dmic_samplephase;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) enum da7213_dmic_clk_rate dmic_clk_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif /* _DA7213_PDATA_H */