Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/sound/cs35l35.h -- Platform data for CS35l35
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (c) 2016 Cirrus Logic Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __CS35L35_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __CS35L35_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) struct classh_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	 * Class H Algorithm Control Variables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	 * You can either have it done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	 * automatically or you can adjust
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	 * these variables for tuning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	 * if you do not enable the internal algorithm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	 * you will get a set of mixer controls for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	 * Class H tuning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	 * Section 4.3 of the datasheet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	bool classh_bst_override;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	bool classh_algo_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	int classh_bst_max_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	int classh_mem_depth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	int classh_release_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	int classh_headroom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	int classh_wk_fet_disable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	int classh_wk_fet_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	int classh_wk_fet_thld;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	int classh_vpch_auto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	int classh_vpch_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	int classh_vpch_man;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) struct monitor_cfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	 * Signal Monitor Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	 * highly configurable signal monitoring
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	 * data positioning and different types of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	 * monitoring data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	 * Section 4.8.2 - 4.8.4 of the datasheet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	bool is_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	bool imon_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	bool vmon_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	bool vpmon_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	bool vbstmon_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	bool vpbrstat_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	bool zerofill_specs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	u8 imon_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	u8 imon_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	u8 imon_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	u8 imon_scale;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	u8 vmon_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u8 vmon_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	u8 vmon_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	u8 vpmon_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	u8 vpmon_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	u8 vpmon_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	u8 vbstmon_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	u8 vbstmon_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	u8 vbstmon_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	u8 vpbrstat_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	u8 vpbrstat_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	u8 vpbrstat_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	u8 zerofill_dpth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	u8 zerofill_loc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 zerofill_frm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) struct cs35l35_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	/* Stereo (2 Device) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	bool stereo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	/* serial port drive strength */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int sp_drv_str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* serial port drive in unused slots */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	int sp_drv_unused;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	/* Boost Power Down with FET */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	bool bst_pdn_fet_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	/* Boost Voltage : used if ClassH Algo Enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	int bst_vctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	/* Boost Converter Peak Current CTRL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	int bst_ipk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	/* Amp Gain Zero Cross */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	bool gain_zc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	/* Audio Input Location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	int aud_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	/* Advisory Input Location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	int adv_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	/* Shared Boost for stereo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	bool shared_bst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/* Specifies this amp is using an external boost supply */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	bool ext_bst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	/* Inductor Value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	int boost_ind;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	/* ClassH Algorithm */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	struct classh_cfg classh_algo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	/* Monitor Config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	struct monitor_cfg mon_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif /* __CS35L35_H */