^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef __SOUND_AD1816A_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define __SOUND_AD1816A_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ad1816a.h - definitions for ADI SoundPort AD1816A chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <sound/control.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <sound/pcm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <sound/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define AD1816A_REG(r) (chip->port + r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define AD1816A_CHIP_STATUS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define AD1816A_INDIR_ADDR 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define AD1816A_INTERRUPT_STATUS 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define AD1816A_INDIR_DATA_LOW 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define AD1816A_INDIR_DATA_HIGH 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define AD1816A_PIO_DEBUG 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define AD1816A_PIO_STATUS 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AD1816A_PIO_DATA 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define AD1816A_RESERVED_7 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define AD1816A_PLAYBACK_CONFIG 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define AD1816A_CAPTURE_CONFIG 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define AD1816A_RESERVED_10 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define AD1816A_RESERVED_11 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define AD1816A_JOYSTICK_RAW_DATA 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define AD1816A_JOYSTICK_CTRL 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define AD1816A_JOY_POS_DATA_LOW 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define AD1816A_JOY_POS_DATA_HIGH 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define AD1816A_LOW_BYTE_TMP 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define AD1816A_INTERRUPT_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define AD1816A_EXTERNAL_CTRL 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define AD1816A_PLAYBACK_SAMPLE_RATE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define AD1816A_CAPTURE_SAMPLE_RATE 0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define AD1816A_VOICE_ATT 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define AD1816A_FM_ATT 0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define AD1816A_I2S_1_ATT 0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define AD1816A_I2S_0_ATT 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define AD1816A_PLAYBACK_BASE_COUNT 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define AD1816A_PLAYBACK_CURR_COUNT 0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define AD1816A_CAPTURE_BASE_COUNT 0x0a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define AD1816A_CAPTURE_CURR_COUNT 0x0b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define AD1816A_TIMER_BASE_COUNT 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define AD1816A_TIMER_CURR_COUNT 0x0d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define AD1816A_MASTER_ATT 0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define AD1816A_CD_GAIN_ATT 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define AD1816A_SYNTH_GAIN_ATT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define AD1816A_VID_GAIN_ATT 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define AD1816A_LINE_GAIN_ATT 0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define AD1816A_MIC_GAIN_ATT 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define AD1816A_PHONE_IN_GAIN_ATT 0x13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define AD1816A_ADC_SOURCE_SEL 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define AD1816A_ADC_PGA 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define AD1816A_CHIP_CONFIG 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define AD1816A_DSP_CONFIG 0x21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define AD1816A_FM_SAMPLE_RATE 0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define AD1816A_I2S_1_SAMPLE_RATE 0x23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define AD1816A_I2S_0_SAMPLE_RATE 0x24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define AD1816A_RESERVED_37 0x25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define AD1816A_PROGRAM_CLOCK_RATE 0x26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define AD1816A_3D_PHAT_CTRL 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define AD1816A_PHONE_OUT_ATT 0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define AD1816A_RESERVED_40 0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define AD1816A_HW_VOL_BUT 0x29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define AD1816A_DSP_MAILBOX_0 0x2a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define AD1816A_DSP_MAILBOX_1 0x2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define AD1816A_POWERDOWN_CTRL 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define AD1816A_TIMER_CTRL 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define AD1816A_VERSION_ID 0x2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define AD1816A_RESERVED_46 0x2e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define AD1816A_READY 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define AD1816A_PLAYBACK_IRQ_PENDING 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define AD1816A_CAPTURE_IRQ_PENDING 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define AD1816A_TIMER_IRQ_PENDING 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define AD1816A_PLAYBACK_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define AD1816A_PLAYBACK_PIO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define AD1816A_CAPTURE_ENABLE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define AD1816A_CAPTURE_PIO 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define AD1816A_FMT_LINEAR_8 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define AD1816A_FMT_ULAW_8 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define AD1816A_FMT_LINEAR_16_LIT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define AD1816A_FMT_ALAW_8 0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define AD1816A_FMT_LINEAR_16_BIG 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define AD1816A_FMT_ALL 0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define AD1816A_FMT_STEREO 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define AD1816A_PLAYBACK_IRQ_ENABLE 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define AD1816A_CAPTURE_IRQ_ENABLE 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define AD1816A_TIMER_IRQ_ENABLE 0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define AD1816A_TIMER_ENABLE 0x0080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define AD1816A_SRC_LINE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define AD1816A_SRC_OUT 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define AD1816A_SRC_CD 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define AD1816A_SRC_SYNTH 0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define AD1816A_SRC_VIDEO 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define AD1816A_SRC_MIC 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define AD1816A_SRC_MONO 0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define AD1816A_SRC_PHONE_IN 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define AD1816A_SRC_MASK 0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define AD1816A_CAPTURE_NOT_EQUAL 0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define AD1816A_WSS_ENABLE 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) struct snd_ad1816a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) unsigned long port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) struct resource *res_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int dma1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int dma2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned short hardware;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned short version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned short mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned int clock_freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct snd_card *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) struct snd_pcm *pcm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct snd_pcm_substream *playback_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct snd_pcm_substream *capture_substream;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned int p_dma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) unsigned int c_dma_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) struct snd_timer *timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) unsigned short image[48];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define AD1816A_HW_AUTO 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define AD1816A_HW_AD1816A 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define AD1816A_HW_AD1815 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define AD1816A_HW_AD18MAX10 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define AD1816A_MODE_PLAYBACK 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define AD1816A_MODE_CAPTURE 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define AD1816A_MODE_TIMER 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define AD1816A_MODE_OPEN (AD1816A_MODE_PLAYBACK | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) AD1816A_MODE_CAPTURE | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) AD1816A_MODE_TIMER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) extern int snd_ad1816a_create(struct snd_card *card, unsigned long port,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int irq, int dma1, int dma2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct snd_ad1816a *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) extern int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) extern int snd_ad1816a_mixer(struct snd_ad1816a *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) extern int snd_ad1816a_timer(struct snd_ad1816a *chip, int device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #ifdef CONFIG_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) extern void snd_ad1816a_suspend(struct snd_ad1816a *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) extern void snd_ad1816a_resume(struct snd_ad1816a *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #endif /* __SOUND_AD1816A_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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