^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef __SOC_TEGRA_BPMP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define __SOC_TEGRA_BPMP_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mailbox_client.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/pm_domain.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/reset-controller.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/semaphore.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <soc/tegra/bpmp-abi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) struct tegra_bpmp_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) struct tegra_bpmp_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) struct tegra_bpmp_soc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) unsigned int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) unsigned int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) } cpu_tx, thread, cpu_rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) } channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) const struct tegra_bpmp_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned int num_resets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct tegra_bpmp_mb_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u8 data[MSG_DATA_MIN_SZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct tegra_bpmp_channel {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct tegra_bpmp *bpmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct tegra_bpmp_mb_data *ib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct tegra_bpmp_mb_data *ob;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) struct completion completion;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct tegra_ivc *ivc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) unsigned int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) typedef void (*tegra_bpmp_mrq_handler_t)(unsigned int mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct tegra_bpmp_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct tegra_bpmp_mrq {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned int mrq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) tegra_bpmp_mrq_handler_t handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct tegra_bpmp {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) const struct tegra_bpmp_soc *soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) void *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct mbox_client client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct mbox_chan *channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) } mbox;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) spinlock_t atomic_tx_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct tegra_bpmp_channel *tx_channel, *rx_channel, *threaded_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) unsigned long *allocated;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned long *busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned int count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct semaphore lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) } threaded;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) struct list_head mrqs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) spinlock_t lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct tegra_bpmp_clk **clocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned int num_clocks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct reset_controller_dev rstc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct genpd_onecell_data genpd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct dentry *debugfs_mirror;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct tegra_bpmp_message {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) unsigned int mrq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) const void *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) } tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) void *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) size_t size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) } rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #if IS_ENABLED(CONFIG_TEGRA_BPMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct tegra_bpmp *tegra_bpmp_get(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void tegra_bpmp_put(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct tegra_bpmp_message *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct tegra_bpmp_message *msg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel, int code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) const void *data, size_t size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tegra_bpmp_mrq_handler_t handler, void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp, unsigned int mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) void *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp, unsigned int mrq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static inline struct tegra_bpmp *tegra_bpmp_get(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return ERR_PTR(-ENOTSUPP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static inline void tegra_bpmp_put(struct tegra_bpmp *bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static inline int tegra_bpmp_transfer_atomic(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) struct tegra_bpmp_message *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static inline int tegra_bpmp_transfer(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct tegra_bpmp_message *msg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static inline void tegra_bpmp_mrq_return(struct tegra_bpmp_channel *channel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int code, const void *data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) size_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static inline int tegra_bpmp_request_mrq(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) unsigned int mrq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) tegra_bpmp_mrq_handler_t handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static inline void tegra_bpmp_free_mrq(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) unsigned int mrq, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static inline bool tegra_bpmp_mrq_is_supported(struct tegra_bpmp *bpmp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) unsigned int mrq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) void tegra_bpmp_handle_rx(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #if IS_ENABLED(CONFIG_CLK_TEGRA_BPMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static inline int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #if IS_ENABLED(CONFIG_RESET_TEGRA_BPMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #if IS_ENABLED(CONFIG_SOC_TEGRA_POWERGATE_BPMP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static inline int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #if IS_ENABLED(CONFIG_DEBUG_FS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int tegra_bpmp_init_debugfs(struct tegra_bpmp *bpmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) static inline int tegra_bpmp_init_debugfs(struct tegra_bpmp *bpmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #endif /* __SOC_TEGRA_BPMP_H */