Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2021 Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #ifndef __SOC_ROCKCHIP_IOMMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #define __SOC_ROCKCHIP_IOMMU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) struct device;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #if IS_ENABLED(CONFIG_ROCKCHIP_IOMMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) int rockchip_iommu_enable(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) int rockchip_iommu_disable(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) int rockchip_pagefault_done(struct device *master_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) void __iomem *rockchip_get_iommu_base(struct device *master_dev, int idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) bool rockchip_iommu_is_enabled(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) void rockchip_iommu_mask_irq(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) void rockchip_iommu_unmask_irq(struct device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static inline int rockchip_iommu_enable(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static inline int rockchip_iommu_disable(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static inline int rockchip_pagefault_done(struct device *master_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static inline void __iomem *rockchip_get_iommu_base(struct device *master_dev, int idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static inline bool rockchip_iommu_is_enabled(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static inline void rockchip_iommu_mask_irq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static inline void rockchip_iommu_unmask_irq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #endif