^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * under the terms and conditions of the GNU General Public License,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * version 2, as published by the Free Software Foundation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This program is distributed in the hope it will be useful, but WITHOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifndef __SOC_ROCKCHIP_DMC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define __SOC_ROCKCHIP_DMC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/devfreq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* for lcdc_type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SCREEN_NULL 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SCREEN_RGB 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SCREEN_LVDS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SCREEN_DUAL_LVDS 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SCREEN_MCU 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define SCREEN_TVOUT 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SCREEN_HDMI 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SCREEN_MIPI 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SCREEN_DUAL_MIPI 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SCREEN_EDP 9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define SCREEN_TVOUT_TEST 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define SCREEN_LVDS_10BIT 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define SCREEN_DUAL_LVDS_10BIT 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define SCREEN_DP 13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define DMCFREQ_TABLE_END ~1u
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct freq_map_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int min;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned int max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) unsigned long freq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct rl_map_table {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) unsigned int pn; /* panel number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) unsigned int rl; /* readlatency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct dmcfreq_common_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct devfreq *devfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) struct freq_map_table *vop_bw_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct freq_map_table *vop_frame_bw_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct rl_map_table *vop_pn_rl_tbl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct delayed_work msch_rl_work;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) unsigned long vop_req_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned int read_latency;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned int auto_freq_en;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) bool is_msch_rl_work_started;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int (*set_msch_readlatency)(unsigned int rl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct dmcfreq_vop_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned int line_bw_mbyte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) unsigned int frame_bw_mbyte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) unsigned int plane_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #if IS_REACHABLE(CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void rockchip_dmcfreq_lock(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void rockchip_dmcfreq_lock_nested(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void rockchip_dmcfreq_unlock(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int rockchip_dmcfreq_write_trylock(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) void rockchip_dmcfreq_write_unlock(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int rockchip_dmcfreq_wait_complete(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int rockchip_dmcfreq_vop_bandwidth_init(struct dmcfreq_common_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) int rockchip_dmcfreq_vop_bandwidth_request(struct dmcfreq_vop_info *vop_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) void rockchip_dmcfreq_vop_bandwidth_update(struct dmcfreq_vop_info *vop_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static inline void rockchip_dmcfreq_lock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static inline void rockchip_dmcfreq_lock_nested(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static inline void rockchip_dmcfreq_unlock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline int rockchip_dmcfreq_write_trylock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static inline void rockchip_dmcfreq_write_unlock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static inline int rockchip_dmcfreq_wait_complete(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) rockchip_dmcfreq_vop_bandwidth_request(struct dmcfreq_vop_info *vop_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) rockchip_dmcfreq_vop_bandwidth_update(struct dmcfreq_vop_info *vop_info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) rockchip_dmcfreq_vop_bandwidth_init(struct dmcfreq_common_info *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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