Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Microsemi Ocelot Switch driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * License: Dual MIT/GPL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (c) 2017 Microsemi Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright 2020 NXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _MSCC_OCELOT_PTP_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _MSCC_OCELOT_PTP_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/ptp_clock_kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <soc/mscc/ocelot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PTP_PIN_CFG_RSZ			0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PTP_PIN_TOD_SEC_MSB_RSZ		PTP_PIN_CFG_RSZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PTP_PIN_TOD_SEC_LSB_RSZ		PTP_PIN_CFG_RSZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PTP_PIN_TOD_NSEC_RSZ		PTP_PIN_CFG_RSZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define PTP_PIN_WF_HIGH_PERIOD_RSZ	PTP_PIN_CFG_RSZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define PTP_PIN_WF_LOW_PERIOD_RSZ	PTP_PIN_CFG_RSZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define PTP_PIN_CFG_DOM			BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define PTP_PIN_CFG_SYNC		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define PTP_PIN_CFG_ACTION(x)		((x) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define PTP_PIN_CFG_ACTION_MASK		PTP_PIN_CFG_ACTION(0x7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	PTP_PIN_ACTION_IDLE = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	PTP_PIN_ACTION_LOAD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	PTP_PIN_ACTION_SAVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	PTP_PIN_ACTION_CLOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	PTP_PIN_ACTION_DELTA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	PTP_PIN_ACTION_NOSYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	PTP_PIN_ACTION_SYNC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PTP_CFG_MISC_PTP_EN		BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define PSEC_PER_SEC			1000000000000LL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define PTP_CFG_CLK_ADJ_CFG_ENA		BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define PTP_CFG_CLK_ADJ_CFG_DIR		BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define PTP_CFG_CLK_ADJ_FREQ_NS		BIT(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int ocelot_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int ocelot_ptp_settime64(struct ptp_clock_info *ptp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			 const struct timespec64 *ts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) int ocelot_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) int ocelot_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) int ocelot_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		      enum ptp_pin_function func, unsigned int chan);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) int ocelot_ptp_enable(struct ptp_clock_info *ptp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		      struct ptp_clock_request *rq, int on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int ocelot_init_timestamp(struct ocelot *ocelot,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 			  const struct ptp_clock_info *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int ocelot_deinit_timestamp(struct ocelot *ocelot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #endif